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| author | Asen Dimov <dimov@ronetix.at> | 2011-07-26 04:48:41 +0000 |
|---|---|---|
| committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2011-09-03 22:40:44 +0200 |
| commit | f47316a8ba3e83e136be33a7610cbdd0a8ca7990 (patch) | |
| tree | a078b6b7af036bdccca748913254a255acfcc6d8 /include | |
| parent | 65b0f87a806f849670cbe23e7bbda15314621d70 (diff) | |
| download | u-boot-imx-f47316a8ba3e83e136be33a7610cbdd0a8ca7990.zip u-boot-imx-f47316a8ba3e83e136be33a7610cbdd0a8ca7990.tar.gz u-boot-imx-f47316a8ba3e83e136be33a7610cbdd0a8ca7990.tar.bz2 | |
pm9261: compiles with the AT91 reworked scheme
Signed-off-by: Asen Chavdarov Dimov <dimov@ronetix.at>
Diffstat (limited to 'include')
| -rw-r--r-- | include/configs/pm9261.h | 18 |
1 files changed, 10 insertions, 8 deletions
diff --git a/include/configs/pm9261.h b/include/configs/pm9261.h index 26e5049..3a8b095 100644 --- a/include/configs/pm9261.h +++ b/include/configs/pm9261.h @@ -28,25 +28,29 @@ #ifndef __CONFIG_H #define __CONFIG_H +/* + * SoC must be defined first, before hardware.h is included. + * In this case SoC is defined in boards.cfg. + */ + +#include <asm/hardware.h> /* ARM asynchronous clock */ -#define CONFIG_SYS_AT91_CPU_NAME "AT91SAM9261" #define CONFIG_DISPLAY_BOARDINFO #define MASTER_PLL_DIV 15 #define MASTER_PLL_MUL 162 #define MAIN_PLL_DIV 2 +#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */ #define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 #define CONFIG_SYS_HZ 1000 -#define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */ -#define CONFIG_AT91SAM9261 1 /* It's an Atmel AT91SAM9261 SoC*/ +#define CONFIG_SYS_AT91_CPU_NAME "AT91SAM9261" #define CONFIG_PM9261 1 /* on a Ronetix PM9261 Board */ #define CONFIG_ARCH_CPU_INIT #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ #define CONFIG_SYS_TEXT_BASE 0 -#define CONFIG_AT91FAMILY /* clocks */ /* CKGR_MOR - enable main osc. */ @@ -160,10 +164,8 @@ */ #define CONFIG_AT91_GPIO 1 #define CONFIG_ATMEL_USART 1 -#undef CONFIG_USART0 -#undef CONFIG_USART1 -#undef CONFIG_USART2 -#define CONFIG_USART3 1 /* USART 3 is DBGU */ +#define CONFIG_USART_BASE ATMEL_BASE_DBGU +#define CONFIG_USART_ID ATMEL_ID_SYS /* LCD */ #define CONFIG_LCD 1 |