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| author | Stefan Roese <sr@denx.de> | 2014-11-07 13:50:34 +0100 |
|---|---|---|
| committer | Marek Vasut <marex@denx.de> | 2014-12-06 13:52:47 +0100 |
| commit | a6e7359181637f8186d1c1fe7acb442a263e8c40 (patch) | |
| tree | bc772bd6be124a61601de749759b29fa8b6ee0a4 /include | |
| parent | 369164042eb80cae88e141866ebba407b00ad2a5 (diff) | |
| download | u-boot-imx-a6e7359181637f8186d1c1fe7acb442a263e8c40.zip u-boot-imx-a6e7359181637f8186d1c1fe7acb442a263e8c40.tar.gz u-boot-imx-a6e7359181637f8186d1c1fe7acb442a263e8c40.tar.bz2 | |
arm: socfpga: Add Designware (DW) SPI support to config header
Enable support for the DW master SPI controller in the config header
for the SoCFPGA. This controller can only be enabled, if DT support
is enabled.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Vince Bridgers <vbridger@altera.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Pavel Machek <pavel@denx.de>
Diffstat (limited to 'include')
| -rw-r--r-- | include/configs/socfpga_common.h | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index 2b7534b..afe363c 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -209,6 +209,18 @@ unsigned int cm_get_qspi_controller_clk_hz(void); #define CONFIG_CMD_SF #endif +#ifdef CONFIG_OF_CONTROL /* DW SPI is controlled via DT */ +#define CONFIG_CMD_DM +#define CONFIG_DM +#define CONFIG_DM_SPI +#define CONFIG_DESIGNWARE_SPI +#ifndef __ASSEMBLY__ +unsigned int cm_get_spi_controller_clk_hz(void); +#define CONFIG_DW_SPI_REF_CLK cm_get_spi_controller_clk_hz() +#endif +#define CONFIG_CMD_SPI +#endif + /* * Serial Driver */ |