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| author | Prabhakar Kushwaha <prabhakar@freescale.com> | 2013-12-26 12:40:55 +0530 |
|---|---|---|
| committer | York Sun <yorksun@freescale.com> | 2014-01-02 14:10:14 -0800 |
| commit | 8c618dd66adfab736b88a86f51c057b019988a90 (patch) | |
| tree | bdb67da577d3b5139c21a9f9317cc914cb33f708 /include | |
| parent | 3bce144b46c29e75e729f23a3728923e50a41df3 (diff) | |
| download | u-boot-imx-8c618dd66adfab736b88a86f51c057b019988a90.zip u-boot-imx-8c618dd66adfab736b88a86f51c057b019988a90.tar.gz u-boot-imx-8c618dd66adfab736b88a86f51c057b019988a90.tar.bz2 | |
board/t1040qds: Enable memory reset control
Define QIXIS_RST_FORCE_MEM to reset on-board DDR-DIMM before start
accessing it.
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Diffstat (limited to 'include')
| -rw-r--r-- | include/configs/T1040QDS.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/configs/T1040QDS.h b/include/configs/T1040QDS.h index 8ecf188..7d0bc04 100644 --- a/include/configs/T1040QDS.h +++ b/include/configs/T1040QDS.h @@ -233,6 +233,7 @@ unsigned long get_board_ddr_clk(void); #define QIXIS_RCFG_CTL_RECONFIG_IDLE 0x20 #define QIXIS_RCFG_CTL_RECONFIG_START 0x21 #define QIXIS_RCFG_CTL_WATCHDOG_ENBLE 0x08 +#define QIXIS_RST_FORCE_MEM 0x01 #define CONFIG_SYS_CSPR3_EXT (0xf) #define CONFIG_SYS_CSPR3 (CSPR_PHYS_ADDR(QIXIS_BASE_PHYS) \ |