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authorRichard Zhu <r65037@freescale.com>2014-07-15 14:19:03 +0800
committerRichard Zhu <r65037@freescale.com>2014-07-31 15:17:00 +0800
commitec78595a24b5ff1020baa97b6d6e79a3a3326307 (patch)
treeddb3512104efc1056df8fe1e6d145be363fcb672 /include
parenta09f718e5ace202dd14426a030268ea11c7a9ba5 (diff)
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ENGR00325255 pcie:enable pcie support on imx6sx sd
Enable pcie support in uboot on imx6sx sd boards - enable_pcie_clock should be call before ssp_en is set, since that ssp_en control the phy_ref clk gate, turn on it after the source of the pcie clks are stable. - add debug info - add rx_eq of gpr12 on imx6sx - there are random link down issue on imx6sx. It's pcie ep reset issue. solution:reset ep, then retry link can fix it. Signed-off-by: Richard Zhu <r65037@freescale.com>
Diffstat (limited to 'include')
-rw-r--r--include/configs/mx6sxsabresd.h10
1 files changed, 10 insertions, 0 deletions
diff --git a/include/configs/mx6sxsabresd.h b/include/configs/mx6sxsabresd.h
index 97c5a5b..96a81c0 100644
--- a/include/configs/mx6sxsabresd.h
+++ b/include/configs/mx6sxsabresd.h
@@ -367,6 +367,16 @@
#define CONFIG_MXC_USB_FLAGS 0
#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
+#define CONFIG_CMD_PCI
+#ifdef CONFIG_CMD_PCI
+#define CONFIG_PCI
+#define CONFIG_PCI_PNP
+#define CONFIG_PCI_SCAN_SHOW
+#define CONFIG_PCIE_IMX
+#define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(2, 1)
+#define CONFIG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(2, 0)
+#endif
+
#if defined(CONFIG_ANDROID_SUPPORT)
#include "mx6sxsabresdandroid.h"
#endif