Merge branch 'master' of /home/stefan/git/u-boot/u-boot

23 files changed, 93 insertions, 229 deletions

diff --git a/include/asm-sparc/io.h b/include/asm-sparc/io.h
index 2a27d06..ede0b1a 100644
--- a/include/asm-sparc/io.h
+++ b/include/asm-sparc/io.h
@@ -70,7 +70,6 @@
  * that can be used to access the memory range with the caching
  * properties specified by "flags".
  */
-typedef unsigned long phys_addr_t;
 
 #define MAP_NOCACHE	(0)
 #define MAP_WRCOMBINE	(0)
diff --git a/include/asm-sparc/types.h b/include/asm-sparc/types.h
index 69f93d6..2cf974a 100644
--- a/include/asm-sparc/types.h
+++ b/include/asm-sparc/types.h
@@ -65,6 +65,9 @@ typedef unsigned long long u64;
 /* DMA addresses are 32-bits wide */
 typedef u32 dma_addr_t;
 
+typedef unsigned long phys_addr_t;
+typedef unsigned long phys_size_t;
+
 #endif				/* __KERNEL__ */
 #endif				/* __ASSEMBLY__ */
 
diff --git a/include/common.h b/include/common.h
index 10b997e..2fcb1fd 100644
--- a/include/common.h
+++ b/include/common.h
@@ -607,8 +607,10 @@ ulong	simple_strtoul(const char *cp,char **endp,unsigned int base);
 unsigned long long	simple_strtoull(const char *cp,char **endp,unsigned int base);
 #endif
 long	simple_strtol(const char *cp,char **endp,unsigned int base);
-void	panic(const char *fmt, ...);
-int	sprintf(char * buf, const char *fmt, ...);
+void	panic(const char *fmt, ...)
+		__attribute__ ((format (__printf__, 1, 2)));
+int	sprintf(char * buf, const char *fmt, ...)
+		__attribute__ ((format (__printf__, 2, 3)));
 int	vsprintf(char *buf, const char *fmt, va_list args);
 
 /* lib_generic/crc32.c */
@@ -630,7 +632,8 @@ int	disable_ctrlc (int);	/* 1 to disable, 0 to enable Control-C detect */
  */
 
 /* serial stuff */
-void	serial_printf (const char *fmt, ...);
+void	serial_printf (const char *fmt, ...)
+		__attribute__ ((format (__printf__, 1, 2)));
 
 /* stdin */
 int	getc(void);
@@ -639,7 +642,8 @@ int	tstc(void);
 /* stdout */
 void	putc(const char c);
 void	puts(const char *s);
-void	printf(const char *fmt, ...);
+void	printf(const char *fmt, ...)
+		__attribute__ ((format (__printf__, 1, 2)));
 void	vprintf(const char *fmt, va_list args);
 
 /* stderr */
@@ -656,7 +660,8 @@ void	vprintf(const char *fmt, va_list args);
 #define stderr		2
 #define MAX_FILES	3
 
-void	fprintf(int file, const char *fmt, ...);
+void	fprintf(int file, const char *fmt, ...)
+		__attribute__ ((format (__printf__, 2, 3)));
 void	fputs(int file, const char *s);
 void	fputc(int file, const char c);
 int	ftstc(int file);
diff --git a/include/configs/MPC8260ADS.h b/include/configs/MPC8260ADS.h
index 23508f9..59d0bdb 100644
--- a/include/configs/MPC8260ADS.h
+++ b/include/configs/MPC8260ADS.h
@@ -197,6 +197,13 @@
 
 #define CONFIG_BAUDRATE		115200
 
+#define CONFIG_OF_LIBFDT	1
+#define CONFIG_OF_BOARD_SETUP	1
+#if defined(CONFIG_OF_LIBFDT)
+#define OF_CPU			"cpu@0"
+#define OF_TBCLK		(bd->bi_busfreq / 4)
+#endif
+
 /*
  * BOOTP options
  */
diff --git a/include/configs/MigoR.h b/include/configs/MigoR.h
index 99e1179..fa0e5db 100644
--- a/include/configs/MigoR.h
+++ b/include/configs/MigoR.h
@@ -45,10 +45,6 @@
 #define CONFIG_BAUDRATE		115200
 #define CONFIG_BOOTDELAY	3
 #define CONFIG_BOOTARGS		"console=ttySC0,115200 root=1f01"
-#define CONFIG_NETMASK		255.255.255.0
-#define CONFIG_IPADDR		192.168.10.100
-#define CONFIG_SERVERIP		192.168.10.77
-#define CONFIG_GATEWAYIP	192.168.10.77
 
 #define CONFIG_VERSION_VARIABLE
 #undef  CONFIG_SHOW_BOOT_PROGRESS
diff --git a/include/configs/atngw100.h b/include/configs/atngw100.h
index 7ac51b5..84d235e 100644
--- a/include/configs/atngw100.h
+++ b/include/configs/atngw100.h
@@ -128,6 +128,7 @@
 #define CFG_NR_PIOS			5
 #define CFG_HSDRAMC			1
 #define CONFIG_MMC			1
+#define CONFIG_ATMEL_MCI		1
 #define CONFIG_ATMEL_SPI		1
 
 #define CONFIG_SPI_FLASH		1
diff --git a/include/configs/atstk1002.h b/include/configs/atstk1002.h
index ba18eb6..90910bb 100644
--- a/include/configs/atstk1002.h
+++ b/include/configs/atstk1002.h
@@ -153,6 +153,7 @@
 #define CFG_NR_PIOS			5
 #define CFG_HSDRAMC			1
 #define CONFIG_MMC			1
+#define CONFIG_ATMEL_MCI		1
 
 #define CFG_DCACHE_LINESZ		32
 #define CFG_ICACHE_LINESZ		32
diff --git a/include/configs/atstk1003.h b/include/configs/atstk1003.h
index a528ddf..03472a8 100644
--- a/include/configs/atstk1003.h
+++ b/include/configs/atstk1003.h
@@ -136,6 +136,7 @@
 #define CONFIG_PIO2			1
 #define CFG_HSDRAMC			1
 #define CONFIG_MMC			1
+#define CONFIG_ATMEL_MCI		1
 
 #define CFG_DCACHE_LINESZ		32
 #define CFG_ICACHE_LINESZ		32
diff --git a/include/configs/atstk1004.h b/include/configs/atstk1004.h
index fc9585e..07add82 100644
--- a/include/configs/atstk1004.h
+++ b/include/configs/atstk1004.h
@@ -136,6 +136,7 @@
 #define CONFIG_PIO2			1
 #define CFG_HSDRAMC			1
 #define CONFIG_MMC			1
+#define CONFIG_ATMEL_MCI		1
 
 #define CFG_DCACHE_LINESZ		32
 #define CFG_ICACHE_LINESZ		32
diff --git a/include/configs/atstk1006.h b/include/configs/atstk1006.h
index 9fd49a5..f9af675 100644
--- a/include/configs/atstk1006.h
+++ b/include/configs/atstk1006.h
@@ -153,6 +153,7 @@
 #define CFG_NR_PIOS			5
 #define CFG_HSDRAMC			1
 #define CONFIG_MMC			1
+#define CONFIG_ATMEL_MCI		1
 
 #define CFG_DCACHE_LINESZ		32
 #define CFG_ICACHE_LINESZ		32
diff --git a/include/configs/davinci_sffsdr.h b/include/configs/davinci_sffsdr.h
index 41a6763..0e49e6c 100644
--- a/include/configs/davinci_sffsdr.h
+++ b/include/configs/davinci_sffsdr.h
@@ -1,6 +1,9 @@
 /*
  * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
  *
+ * Copyright (C) 2008 Lyrtech <www.lyrtech.com>
+ * Copyright (C) 2008 Philip Balister, OpenSDR <philip@opensdr.com>
+ *
  * This program is free software; you can redistribute it and/or
  * modify it under the terms of the GNU General Public License as
  * published by the Free Software Foundation; either version 2 of
@@ -21,30 +24,24 @@
 #define __CONFIG_H
 #include <asm/sizes.h>
 
-/*=======*/
 /* Board */
-/*=======*/
 #define SFFSDR
 #define CFG_NAND_LARGEPAGE
 #define CFG_USE_NAND
-/*===================*/
+#define CFG_USE_DSPLINK		/* This is to prevent U-Boot from
+				 * powering ON the DSP. */
 /* SoC Configuration */
-/*===================*/
 #define CONFIG_ARM926EJS			/* arm926ejs CPU core */
 #define CONFIG_SYS_CLK_FREQ	297000000	/* Arm Clock frequency */
 #define CFG_TIMERBASE		0x01c21400	/* use timer 0 */
 #define CFG_HZ_CLOCK		27000000	/* Timer Input clock freq */
 #define CFG_HZ			1000
-/*==================================================*/
-/* EEPROM definitions for Atmel 24LC64 EEPROM chip  */
-/*==================================================*/
+/* EEPROM definitions for Atmel 24LC64 EEPROM chip */
 #define CFG_I2C_EEPROM_ADDR_LEN		2
 #define CFG_I2C_EEPROM_ADDR		0x50
 #define CFG_EEPROM_PAGE_WRITE_BITS	5
 #define CFG_EEPROM_PAGE_WRITE_DELAY_MS	20
-/*=============*/
 /* Memory Info */
-/*=============*/
 #define CFG_MALLOC_LEN		(0x10000 + 256*1024)	/* malloc() len */
 #define CFG_GBL_DATA_SIZE	128		/* reserved for initial data */
 #define CFG_MEMTEST_START	0x80000000	/* memtest start address */
@@ -54,9 +51,7 @@
 #define PHYS_SDRAM_1		0x80000000	/* DDR Start */
 #define PHYS_SDRAM_1_SIZE	0x08000000	/* DDR size 128MB */
 #define DDR_4BANKS				/* 4-bank DDR2 (128MB) */
-/*====================*/
 /* Serial Driver info */
-/*====================*/
 #define CFG_NS16550
 #define CFG_NS16550_SERIAL
 #define CFG_NS16550_REG_SIZE	4		/* NS16550 register size */
@@ -65,16 +60,12 @@
 #define CONFIG_CONS_INDEX	1		/* use UART0 for console */
 #define CONFIG_BAUDRATE		115200		/* Default baud rate */
 #define CFG_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200 }
-/*===================*/
 /* I2C Configuration */
-/*===================*/
 #define CONFIG_HARD_I2C
 #define CONFIG_DRIVER_DAVINCI_I2C
 #define CFG_I2C_SPEED		80000	/* 100Kbps won't work, silicon bug */
 #define CFG_I2C_SLAVE		10	/* Bogus, master-only in U-Boot */
-/*==================================*/
 /* Network & Ethernet Configuration */
-/*==================================*/
 #define CONFIG_DRIVER_TI_EMAC
 #define CONFIG_MII
 #define CONFIG_BOOTP_DEFAULT
@@ -83,9 +74,7 @@
 #define CONFIG_BOOTP_SEND_HOSTNAME
 #define CONFIG_NET_RETRY_COUNT	10
 #define CONFIG_OVERWRITE_ETHADDR_ONCE
-/*=====================*/
 /* Flash & Environment */
-/*=====================*/
 #undef CFG_ENV_IS_IN_FLASH
 #define CFG_NO_FLASH
 #define CFG_ENV_IS_IN_NAND		/* U-Boot env in NAND Flash  */
@@ -98,28 +87,19 @@
 #define CFG_MAX_NAND_DEVICE	1	/* Max number of NAND devices */
 #define NAND_MAX_CHIPS		1
 #define CFG_ENV_OFFSET		0x0	/* Block 0--not used by bootcode */
-/*=====================*/
-/* Board related stuff */
-/*=====================*/
-/*==========================================*/
-/* I2C switch definitions for PCA9543 chip  */
-/* on Lyrtech SFF SDR board.                */
-/* This chip has a single register.         */
-/*==========================================*/
+/* I2C switch definitions for PCA9543 chip */
 #define CFG_I2C_PCA9543_ADDR		0x70
-#define CFG_I2C_PCA9543_ADDR_LEN	0
+#define CFG_I2C_PCA9543_ADDR_LEN	0	/* Single register. */
 #define CFG_I2C_PCA9543_ENABLE_CH0	0x01	/* Enable channel 0. */
-/*==============================*/
 /* U-Boot general configuration */
-/*==============================*/
-#undef CONFIG_USE_IRQ                  /* No IRQ/FIQ in U-Boot */
+#undef CONFIG_USE_IRQ				/* No IRQ/FIQ in U-Boot */
 #define CONFIG_MISC_INIT_R
-#undef CONFIG_BOOTDELAY
+#define CONFIG_BOOTDELAY	5		/* Autoboot after 5 seconds. */
 #define CONFIG_BOOTFILE		"uImage"	/* Boot file name */
 #define CFG_PROMPT		"U-Boot > "	/* Monitor Command Prompt */
 #define CFG_CBSIZE		1024		/* Console I/O Buffer Size  */
-/* Print buffer size */
-#define CFG_PBSIZE		(CFG_CBSIZE + sizeof(CFG_PROMPT) + 16)
+#define CFG_PBSIZE							\
+		(CFG_CBSIZE + sizeof(CFG_PROMPT) + 16)	/* Print buffer size */
 #define CFG_MAXARGS		16		/* max number of command args */
 #define CFG_BARGSIZE		CFG_CBSIZE	/* Boot Argument Buffer Size */
 #define CFG_LOAD_ADDR		0x80700000	/* Default Linux kernel
@@ -133,25 +113,20 @@
 #define CFG_LONGHELP
 #define CONFIG_CRC32_VERIFY
 #define CONFIG_MX_CYCLIC
-/*
- * Define this to load an Integrity kernel.
- *
-#define CONFIG_CMD_ELF
- */
-
-/*===================*/
 /* Linux Information */
-/*===================*/
 #define LINUX_BOOT_PARAM_ADDR	0x80000100
 #define CONFIG_CMDLINE_TAG
 #define CONFIG_SETUP_MEMORY_TAGS
-#define CONFIG_BOOTARGS							\
-	"mem=56M console=ttyS0,115200n8 root=/dev/hda1 rw noinitrd ip=dhcp"
-#define CONFIG_BOOTCOMMAND	"setenv setboot setenv bootargs \\$(bootargs) video=dm64xxfb:output=\\$(videostd);run setboot"
-
-/*=================*/
+#define CONFIG_BOOTARGS			\
+	"mem=56M "			\
+	"console=ttyS0,115200n8 "	\
+	"root=/dev/nfs rw noinitrd ip=dhcp "	\
+	"nfsroot=${serverip}:/nfsroot/sffsdr "	\
+	"eth0=${ethaddr}"
+#define CONFIG_BOOTCOMMAND	\
+	"nand read 87A00000 100000 300000;"	\
+	"bootelf 87A00000"
 /* U-Boot commands */
-/*=================*/
 #include <config_cmd_default.h>
 #define CONFIG_CMD_ASKENV
 #define CONFIG_CMD_DHCP
@@ -167,9 +142,7 @@
 #undef CONFIG_CMD_SETGETDCR
 #undef CONFIG_CMD_FLASH
 #undef CONFIG_CMD_IMLS
-/*=======================*/
 /* KGDB support (if any) */
-/*=======================*/
 #ifdef CONFIG_CMD_KGDB
 #define CONFIG_KGDB_BAUDRATE	115200	/* speed to run kgdb serial port */
 #define CONFIG_KGDB_SER_INDEX	1	/* which serial port to use */
diff --git a/include/configs/ms7722se.h b/include/configs/ms7722se.h
index 8d92a13..7298e55 100644
--- a/include/configs/ms7722se.h
+++ b/include/configs/ms7722se.h
@@ -40,10 +40,6 @@
 #define CONFIG_BAUDRATE		115200
 #define CONFIG_BOOTDELAY	3
 #define CONFIG_BOOTARGS		"console=ttySC0,115200 root=1f01"
-#define CONFIG_NETMASK          255.255.255.0
-#define CONFIG_IPADDR		192.168.0.22
-#define CONFIG_SERVERIP		192.168.0.1
-#define CONFIG_GATEWAYIP	192.168.0.1
 
 #define CONFIG_VERSION_VARIABLE
 #undef  CONFIG_SHOW_BOOT_PROGRESS
diff --git a/include/configs/r2dplus.h b/include/configs/r2dplus.h
index c20baca..e269336 100644
--- a/include/configs/r2dplus.h
+++ b/include/configs/r2dplus.h
@@ -35,12 +35,6 @@
 #define CONFIG_BOOTARGS		"console=ttySC0,115200"
 #define CONFIG_ENV_OVERWRITE	1
 
-/* Network setting */
-#define CONFIG_NETMASK		255.0.0.0
-#define CONFIG_IPADDR		10.0.192.51
-#define CONFIG_SERVERIP		10.0.0.1
-#define CONFIG_GATEWAYIP	10.0.0.1
-
 /* SDRAM */
 #define CFG_SDRAM_BASE		(0x8C000000)
 #define CFG_SDRAM_SIZE		(0x04000000)
@@ -60,45 +54,27 @@
 #define CFG_LOAD_ADDR		(CFG_SDRAM_BASE + 32 * 1024 * 1024)
 /* Address of u-boot image in Flash */
 #define CFG_MONITOR_BASE	(CFG_FLASH_BASE)
-#define CFG_MONITOR_LEN		(128 * 1024)
+#define CFG_MONITOR_LEN		(256 * 1024)
 /* Size of DRAM reserved for malloc() use */
-#define CFG_MALLOC_LEN		(256 * 1024)
+#define CFG_MALLOC_LEN		(1024 * 1024)
 /* size in bytes reserved for initial data */
 #define CFG_GBL_DATA_SIZE	(256)
 #define CFG_BOOTMAPSZ		(8 * 1024 * 1024)
 
 /*
- * NOR Flash
+ * NOR Flash ( Spantion S29GL256P )
  */
 #define CFG_FLASH_CFI
 #define CFG_FLASH_CFI_DRIVER
-
-#if defined(CONFIG_R2DPLUS_OLD)
-#define CFG_FLASH_BASE		(0xA0000000)
-#define CFG_MAX_FLASH_BANKS (1)	/* Max number of
-				 * Flash memory banks
-				 */
-#define CFG_MAX_FLASH_SECT  142
-#define CFG_FLASH_BANKS_LIST    { CFG_FLASH_BASE }
-
-#else /* CONFIG_R2DPLUS_OLD */
-
 #define CFG_FLASH_BASE		(0xA0000000)
-#define CFG_FLASH_CFI_WIDTH	0x04	/* 32bit */
-#define CFG_MAX_FLASH_BANKS	(2)
-#define CFG_MAX_FLASH_SECT	270
-#define CFG_FLASH_BANKS_LIST    { CFG_FLASH_BASE,\
-			CFG_FLASH_BASE + 0x100000,\
-			CFG_FLASH_BASE + 0x400000,\
-			CFG_FLASH_BASE + 0x700000, }
-#endif /* CONFIG_R2DPLUS_OLD */
+#define CFG_MAX_FLASH_BANKS (1)
+#define CFG_MAX_FLASH_SECT  256
+#define CFG_FLASH_BANKS_LIST	{ CFG_FLASH_BASE }
 
 #define CFG_ENV_IS_IN_FLASH
-#define CFG_ENV_SECT_SIZE	0x20000
-#define CFG_ENV_SIZE		(CFG_ENV_SECT_SIZE)
-#define CFG_ENV_ADDR		(CFG_MONITOR_BASE + CFG_MONITOR_LEN)
-#define CFG_FLASH_ERASE_TOUT	120000
-#define CFG_FLASH_WRITE_TOUT	500
+#define CFG_ENV_SECT_SIZE	0x40000
+#define CFG_ENV_SIZE        (CFG_ENV_SECT_SIZE)
+#define CFG_ENV_ADDR        (CFG_MONITOR_BASE + CFG_MONITOR_LEN)
 
 /*
  * SuperH Clock setting
diff --git a/include/configs/r7780mp.h b/include/configs/r7780mp.h
index 4e89580..4c82c5a 100644
--- a/include/configs/r7780mp.h
+++ b/include/configs/r7780mp.h
@@ -1,7 +1,7 @@
 /*
  * Configuation settings for the Renesas R7780MP board
  *
- * Copyright (C) 2007 Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+ * Copyright (C) 2007,2008 Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
  * Copyright (C) 2008 Yusuke Goda <goda.yusuke@renesas.com>
  *
  * See file CREDITS for list of people who contributed to this
@@ -31,7 +31,8 @@
 #define CONFIG_SH4A		1
 #define CONFIG_CPU_SH7780	1
 #define CONFIG_R7780MP		1
-#define __LITTLE_ENDIAN 1
+#define CFG_R7780MP_OLD_FLASH	1
+#define __LITTLE_ENDIAN__ 1
 
 /*
  * Command line configuration.
@@ -59,12 +60,6 @@
 /* check for keypress on bootdelay==0 */
 /*#define CONFIG_ZERO_BOOTDELAY_CHECK*/
 
-/* Network setting */
-#define CONFIG_NETMASK		255.0.0.0
-#define CONFIG_IPADDR		10.0.192.82
-#define CONFIG_SERVERIP		10.0.0.1
-#define CONFIG_GATEWAYIP	10.0.0.1
-
 #define CFG_SDRAM_BASE		(0x08000000)
 #define CFG_SDRAM_SIZE		(128 * 1024 * 1024)
 
@@ -80,22 +75,30 @@
 #define CFG_MEMTEST_START	(CFG_SDRAM_BASE)
 #define CFG_MEMTEST_END		(TEXT_BASE - 0x100000)
 
-/* NOR Flash (S29PL127J60TFI130) */
+/* Flash board support */
 #define CFG_FLASH_BASE		(0xA0000000)
-#define CFG_FLASH_CFI_WIDTH FLASH_CFI_32BIT
-#define CFG_MAX_FLASH_BANKS (2)
-#define CFG_MAX_FLASH_SECT  270
-#define CFG_FLASH_BANKS_LIST    { CFG_FLASH_BASE,\
+#ifdef CFG_R7780MP_OLD_FLASH
+/* NOR Flash (S29PL127J60TFI130) */
+# define CFG_FLASH_CFI_WIDTH	FLASH_CFI_32BIT
+# define CFG_MAX_FLASH_BANKS	(2)
+# define CFG_MAX_FLASH_SECT	270
+# define CFG_FLASH_BANKS_LIST	{ CFG_FLASH_BASE,\
 				CFG_FLASH_BASE + 0x100000,\
 				CFG_FLASH_BASE + 0x400000,\
 				CFG_FLASH_BASE + 0x700000, }
+#else /* CFG_R7780MP_OLD_FLASH */
+/* NOR Flash (Spantion S29GL256P) */
+# define CFG_MAX_FLASH_BANKS	(1)
+# define CFG_MAX_FLASH_SECT		256
+# define CFG_FLASH_BANKS_LIST	{ CFG_FLASH_BASE }
+#endif /* CFG_R7780MP_OLD_FLASH */
 
 #define CFG_LOAD_ADDR		(CFG_SDRAM_BASE + 4 * 1024 * 1024)
 /* Address of u-boot image in Flash */
 #define CFG_MONITOR_BASE	(CFG_FLASH_BASE)
-#define CFG_MONITOR_LEN		(112 * 1024)
+#define CFG_MONITOR_LEN		(256 * 1024)
 /* Size of DRAM reserved for malloc() use */
-#define CFG_MALLOC_LEN		(256 * 1024)
+#define CFG_MALLOC_LEN		(1204 * 1024)
 
 /* size in bytes reserved for initial data */
 #define CFG_GBL_DATA_SIZE	(256)
@@ -110,7 +113,7 @@
 #define CFG_FLASH_EMPTY_INFO
 
 #define CFG_ENV_IS_IN_FLASH
-#define CFG_ENV_SECT_SIZE	(16 * 1024)
+#define CFG_ENV_SECT_SIZE	(256 * 1024)
 #define CFG_ENV_SIZE		(CFG_ENV_SECT_SIZE)
 #define CFG_ENV_ADDR		(CFG_MONITOR_BASE + CFG_MONITOR_LEN)
 #define CFG_FLASH_ERASE_TOUT	120000
@@ -141,8 +144,10 @@
 #endif /* CONFIG_CMD_PCI */
 
 #if defined(CONFIG_CMD_NET)
-/* #define CONFIG_NET_MULTI
-   #define CONFIG_RTL8169 */
+/*
+#define CONFIG_NET_MULTI
+#define CONFIG_RTL8169
+*/
 /* AX88696L Support(NE2000 base chip) */
 #define CONFIG_DRIVER_NE2000
 #define CONFIG_DRIVER_AX88796L
diff --git a/include/configs/sh7763rdp.h b/include/configs/sh7763rdp.h
index d537071..7713eaa 100644
--- a/include/configs/sh7763rdp.h
+++ b/include/configs/sh7763rdp.h
@@ -38,11 +38,7 @@
 #define CONFIG_CMD_SDRAM
 #define CONFIG_CMD_FLASH
 #define CONFIG_CMD_MEMORY
-#define CONFIG_CMD_NET
-#define CONFIG_CMD_PING
 #define CONFIG_CMD_ENV
-#define CONFIG_CMD_NFS
-#define CONFIG_CMD_JFFS2
 
 #define CONFIG_BOOTDELAY        -1
 #define CONFIG_BOOTARGS         "console=ttySC2,115200 root=1f01"
@@ -66,12 +62,6 @@
 #define CFG_BAUDRATE_TABLE	{ 115200 }	/* List of legal baudrate
 												settings for this board */
 
-/* Ethernet */
-#define CONFIG_SH_ETHER 1
-#define CONFIG_SH_ETHER_USE_PORT (1)
-#define CONFIG_SH_ETHER_PHY_ADDR (0x01)
-#define CFG_RX_ETH_BUFFER	(8)
-
 /* SDRAM */
 #define CFG_SDRAM_BASE		(0x8C000000)
 #define CFG_SDRAM_SIZE		(64 * 1024 * 1024)
diff --git a/include/environment.h b/include/environment.h
index bf9f669..481ea73 100644
--- a/include/environment.h
+++ b/include/environment.h
@@ -107,8 +107,8 @@ typedef	struct environment_s {
 	unsigned char	data[ENV_SIZE]; /* Environment data		*/
 } env_t;
 
-/* Pointer to function that returns a character from the environment */
-extern unsigned char (*env_get_char)(int);
+/* Function that returns a character from the environment */
+unsigned char env_get_char (int);
 
 /* Function that returns a pointer to a value from the environment */
 unsigned char *env_get_addr(int);
@@ -117,4 +117,7 @@ unsigned char env_get_char_memory (int index);
 /* Function that updates CRC of the enironment */
 void env_crc_update (void);
 
+/* [re]set to the default environment */
+void set_default_env(void);
+
 #endif	/* _ENVIRONMENT_H_ */
diff --git a/include/linux/mtd/mtd.h b/include/linux/mtd/mtd.h
index 71cb2d5..05ba375 100644
--- a/include/linux/mtd/mtd.h
+++ b/include/linux/mtd/mtd.h
@@ -201,13 +201,13 @@ static inline void mtd_erase_callback(struct erase_info *instr)
 #define MTD_DEBUG_LEVEL3	(3)	/* Noisy   */
 
 #ifdef CONFIG_MTD_DEBUG
-#define DEBUG(n, args...)				\
+#define MTDDEBUG(n, args...)				\
 	do {						\
 		if (n <= CONFIG_MTD_DEBUG_VERBOSE)	\
 			printk(KERN_INFO args);		\
 	} while(0)
 #else /* CONFIG_MTD_DEBUG */
-#define DEBUG(n, args...) do { } while(0)
+#define MTDDEBUG(n, args...) do { } while(0)
 
 #endif /* CONFIG_MTD_DEBUG */
 
diff --git a/include/lmb.h b/include/lmb.h
index 0283075..14e8727 100644
--- a/include/lmb.h
+++ b/include/lmb.h
@@ -43,7 +43,7 @@ extern phys_addr_t lmb_alloc_base(struct lmb *lmb, phys_size_t size, ulong align
 extern phys_addr_t __lmb_alloc_base(struct lmb *lmb, phys_size_t size, ulong align,
 			      phys_addr_t max_addr);
 extern int lmb_is_reserved(struct lmb *lmb, phys_addr_t addr);
-extern long lmb_free(struct lmb *lmb, u64 base, u64 size);
+extern long lmb_free(struct lmb *lmb, phys_addr_t base, phys_size_t size);
 
 extern void lmb_dump_all(struct lmb *lmb);
 
diff --git a/include/lxt971a.h b/include/lxt971a.h
index f76c336..72145e0 100644
--- a/include/lxt971a.h
+++ b/include/lxt971a.h
@@ -30,15 +30,6 @@
 #define __LXT971A_H__
 
 /* PHY definitions (LXT971A) [2] */
-#define PHY_COMMON_CTRL			(0x00)
-#define PHY_COMMON_STAT			(0x01)
-#define PHY_COMMON_ID1			(0x02)
-#define PHY_COMMON_ID2			(0x03)
-#define PHY_COMMON_AUTO_ADV		(0x04)
-#define PHY_COMMON_AUTO_LNKB		(0x05)
-#define PHY_COMMON_AUTO_EXP		(0x06)
-#define PHY_COMMON_AUTO_NEXT		(0x07)
-#define PHY_COMMON_AUTO_LNKN		(0x08)
 #define PHY_LXT971_PORT_CFG		(0x10)
 #define PHY_LXT971_STAT2		(0x11)
 #define PHY_LXT971_INT_ENABLE		(0x12)
@@ -47,97 +38,6 @@
 #define PHY_LXT971_DIG_CFG		(0x1A)
 #define PHY_LXT971_TX_CTRL		(0x1E)
 
-/* CTRL PHY Control Register Bit Fields */
-#define PHY_COMMON_CTRL_RESET		(0x8000)
-#define PHY_COMMON_CTRL_LOOPBACK	(0x4000)
-#define PHY_COMMON_CTRL_SPD_MA		(0x2040)
-#define PHY_COMMON_CTRL_SPD_10		(0x0000)
-#define PHY_COMMON_CTRL_SPD_100		(0x2000)
-#define PHY_COMMON_CTRL_SPD_1000	(0x0040)
-#define PHY_COMMON_CTRL_SPD_RES		(0x2040)
-#define PHY_COMMON_CTRL_AUTO_NEG	(0x1000)
-#define PHY_COMMON_CTRL_POWER_DN	(0x0800)
-#define PHY_COMMON_CTRL_ISOLATE		(0x0400)
-#define PHY_COMMON_CTRL_RES_AUTO	(0x0200)
-#define PHY_COMMON_CTRL_DUPLEX		(0x0100)
-#define PHY_COMMON_CTRL_COL_TEST	(0x0080)
-#define PHY_COMMON_CTRL_RES1		(0x003F)
-
-/* STAT Status Register Bit Fields */
-#define PHY_COMMON_STAT_100BT4		(0x8000)
-#define PHY_COMMON_STAT_100BXFD		(0x4000)
-#define PHY_COMMON_STAT_100BXHD		(0x2000)
-#define PHY_COMMON_STAT_10BTFD		(0x1000)
-#define PHY_COMMON_STAT_10BTHD		(0x0800)
-#define PHY_COMMON_STAT_100BT2FD	(0x0400)
-#define PHY_COMMON_STAT_100BT2HD	(0x0200)
-#define PHY_COMMON_STAT_EXT_STAT	(0x0100)
-#define PHY_COMMON_STAT_RES1		(0x0080)
-#define PHY_COMMON_STAT_MF_PSUP		(0x0040)
-#define PHY_COMMON_STAT_AN_COMP		(0x0020)
-#define PHY_COMMON_STAT_RMT_FLT		(0x0010)
-#define PHY_COMMON_STAT_AN_CAP		(0x0008)
-#define PHY_COMMON_STAT_LNK_STAT	(0x0004)
-#define PHY_COMMON_STAT_JAB_DTCT	(0x0002)
-#define PHY_COMMON_STAT_EXT_CAP		(0x0001)
-
-/* AUTO_ADV Auto-neg Advert Register Bit Fields */
-#define PHY_COMMON_AUTO_ADV_NP		(0x8000)
-#define PHY_COMMON_AUTO_ADV_RES1        (0x4000)
-#define PHY_COMMON_AUTO_ADV_RMT_FLT     (0x2000)
-#define PHY_COMMON_AUTO_ADV_RES2        (0x1000)
-#define PHY_COMMON_AUTO_ADV_AS_PAUSE    (0x0800)
-#define PHY_COMMON_AUTO_ADV_PAUSE       (0x0400)
-#define PHY_COMMON_AUTO_ADV_100BT4      (0x0200)
-#define PHY_COMMON_AUTO_ADV_100BTXFD	(0x0100)
-#define PHY_COMMON_AUTO_ADV_100BTX      (0x0080)
-#define PHY_COMMON_AUTO_ADV_10BTFD	(0x0040)
-#define PHY_COMMON_AUTO_ADV_10BT	(0x0020)
-#define PHY_COMMON_AUTO_ADV_SEL_FLD_MA  (0x001F)
-#define PHY_COMMON_AUTO_ADV_802_9       (0x0002)
-#define PHY_COMMON_AUTO_ADV_802_3       (0x0001)
-
-/* AUTO_LNKB Auto-neg Link Ability Register Bit Fields */
-#define PHY_COMMON_AUTO_LNKB_NP		(0x8000)
-#define PHY_COMMON_AUTO_LNKB_ACK        (0x4000)
-#define PHY_COMMON_AUTO_LNKB_RMT_FLT    (0x2000)
-#define PHY_COMMON_AUTO_LNKB_RES2       (0x1000)
-#define PHY_COMMON_AUTO_LNKB_AS_PAUSE   (0x0800)
-#define PHY_COMMON_AUTO_LNKB_PAUSE      (0x0400)
-#define PHY_COMMON_AUTO_LNKB_100BT4     (0x0200)
-#define PHY_COMMON_AUTO_LNKB_100BTXFD   (0x0100)
-#define PHY_COMMON_AUTO_LNKB_100BTX     (0x0080)
-#define PHY_COMMON_AUTO_LNKB_10BTFD	(0x0040)
-#define PHY_COMMON_AUTO_LNKB_10BT	(0x0020)
-#define PHY_COMMON_AUTO_LNKB_SEL_FLD_MA (0x001F)
-#define PHY_COMMON_AUTO_LNKB_802_9      (0x0002)
-#define PHY_COMMON_AUTO_LNKB_802_3      (0x0001)
-
-/* AUTO_EXP Auto-neg Expansion Register Bit Fields */
-#define PHY_COMMON_AUTO_EXP_RES1        (0xFFC0)
-#define PHY_COMMON_AUTO_EXP_BASE_PAGE   (0x0020)
-#define PHY_COMMON_AUTO_EXP_PAR_DT_FLT  (0x0010)
-#define PHY_COMMON_AUTO_EXP_LNK_NP_CAP  (0x0008)
-#define PHY_COMMON_AUTO_EXP_NP_CAP      (0x0004)
-#define PHY_COMMON_AUTO_EXP_PAGE_REC    (0x0002)
-#define PHY_COMMON_AUTO_EXP_LNK_AN_CAP  (0x0001)
-
-/* AUTO_NEXT Aut-neg Next Page Tx Register Bit Fields */
-#define PHY_COMMON_AUTO_NEXT_NP         (0x8000)
-#define PHY_COMMON_AUTO_NEXT_RES1       (0x4000)
-#define PHY_COMMON_AUTO_NEXT_MSG_PAGE   (0x2000)
-#define PHY_COMMON_AUTO_NEXT_ACK_2      (0x1000)
-#define PHY_COMMON_AUTO_NEXT_TOGGLE     (0x0800)
-#define PHY_COMMON_AUTO_NEXT_MSG        (0x07FF)
-
-/* AUTO_LNKN Auto-neg Link Partner Rx Reg Bit Fields */
-#define PHY_COMMON_AUTO_LNKN_NP         (0x8000)
-#define PHY_COMMON_AUTO_LNKN_ACK        (0x4000)
-#define PHY_COMMON_AUTO_LNKN_MSG_PAGE   (0x2000)
-#define PHY_COMMON_AUTO_LNKN_ACK_2      (0x1000)
-#define PHY_COMMON_AUTO_LNKN_TOGGLE     (0x0800)
-#define PHY_COMMON_AUTO_LNKN_MSG        (0x07FF)
-
 /* PORT_CFG Port Configuration Register Bit Fields */
 #define PHY_LXT971_PORT_CFG_RES1        (0x8000)
 #define PHY_LXT971_PORT_CFG_FORCE_LNK   (0x4000)
diff --git a/include/nand.h b/include/nand.h
index 247d346..e1285cd 100644
--- a/include/nand.h
+++ b/include/nand.h
@@ -24,6 +24,9 @@
 #ifndef _NAND_H_
 #define _NAND_H_
 
+extern void nand_init(void);
+
+#ifndef CFG_NAND_LEGACY
 #include <linux/mtd/compat.h>
 #include <linux/mtd/mtd.h>
 #include <linux/mtd/nand.h>
@@ -32,7 +35,6 @@ typedef struct mtd_info nand_info_t;
 
 extern int nand_curr_device;
 extern nand_info_t nand_info[];
-extern void nand_init(void);
 
 static inline int nand_read(nand_info_t *info, off_t ofs, size_t *len, u_char *buf)
 {
@@ -122,4 +124,5 @@ int nand_get_lock_status(nand_info_t *meminfo, ulong offset);
 void board_nand_select_device(struct nand_chip *nand, int chip);
 #endif
 
+#endif /* !CFG_NAND_LEGACY */
 #endif
diff --git a/include/ns7520_eth.h b/include/ns7520_eth.h
index 123e6f4..b509697 100644
--- a/include/ns7520_eth.h
+++ b/include/ns7520_eth.h
@@ -24,6 +24,7 @@
 
 #ifdef CONFIG_DRIVER_NS7520_ETHERNET
 
+#include <miiphy.h>
 #include "lxt971a.h"
 
 /* The port addresses */
diff --git a/include/ns9750_eth.h b/include/ns9750_eth.h
index a6e5889..80c721b 100644
--- a/include/ns9750_eth.h
+++ b/include/ns9750_eth.h
@@ -31,6 +31,7 @@
 
 #ifdef CONFIG_DRIVER_NS9750_ETHERNET
 
+#include <miiphy.h>
 #include "lxt971a.h"
 
 #define	NS9750_ETH_MODULE_BASE		(0xA0600000)
diff --git a/include/pci_ids.h b/include/pci_ids.h
index d061017..165456b 100644
--- a/include/pci_ids.h
+++ b/include/pci_ids.h
@@ -1827,6 +1827,7 @@
 #define PCI_DEVICE_ID_INTEL_82545EM_FIBER	0x1011
 #define PCI_DEVICE_ID_INTEL_82546EB_FIBER	0x1012
 #define PCI_DEVICE_ID_INTEL_82540EM_LOM		0x1015
+#define PCI_DEVICE_ID_INTEL_82545GM_COPPER	0x1026
 #define PCI_DEVICE_ID_INTEL_82559		0x1030
 
 #define PCI_DEVICE_ID_INTEL_82562ET	0x1031