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authorHolger Brunck <holger.brunck@keymile.com>2011-12-14 16:21:45 +0100
committerKim Phillips <kim.phillips@freescale.com>2012-01-09 20:10:34 -0600
commitf5a474bd7ac44385ea8e852129ab4f6ae5c6d6d3 (patch)
treeb984711d50991f45c771898b5e758c6323e2af06 /include
parent5f2a44d5ea2893370b5c443cc659b3ab6b3944e2 (diff)
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powerpc/83xx/km: add support for 8321 based tuge1 board
This board is similar to our tuxx1 target. But on this board there is only one application specific chip select configured. Signed-off-by: Holger Brunck <holger.brunck@keymile.com> cc: Valentin Longchamp <valentin.longchamp@keymile.com> Acked-by: Heiko Schocher <hs@denx.de> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Diffstat (limited to 'include')
-rw-r--r--include/configs/tuxx1.h24
1 files changed, 19 insertions, 5 deletions
diff --git a/include/configs/tuxx1.h b/include/configs/tuxx1.h
index b07f6b3..f6d2b17 100644
--- a/include/configs/tuxx1.h
+++ b/include/configs/tuxx1.h
@@ -27,9 +27,13 @@
/*
* High Level Configuration Options
*/
-#define CONFIG_TUXXX /* TUXX1 board specific */
+#define CONFIG_TUXXX /* TUXX1 board (tuxa1/tuda1) specific */
#define CONFIG_HOSTNAME tuxx1
+#ifdef CONFIG_KM_DISABLE_APP2
+#define CONFIG_KM_BOARD_NAME "tuge1"
+#else
#define CONFIG_KM_BOARD_NAME "tuxx1"
+#endif
#define CONFIG_SYS_TEXT_BASE 0xF0000000
@@ -38,16 +42,18 @@
#define CONFIG_SYS_APP1_BASE 0xA0000000 /* PAXG */
#define CONFIG_SYS_APP1_SIZE 256 /* Megabytes */
+#ifndef CONFIG_KM_DISABLE_APP2
#define CONFIG_SYS_APP2_BASE 0xB0000000 /* PINC3 */
#define CONFIG_SYS_APP2_SIZE 256 /* Megabytes */
+#endif
/*
* Init Local Bus Memory Controller:
*
- * Bank Bus Machine PortSz Size Device on TUDA1 TUXA1
- * ---- --- ------- ------ ----- ---------------------
- * 2 Local GPCM 8 bit 256MB PAXG LPXF
- * 3 Local GPCM 8 bit 256MB PINC3 PINC2
+ * Bank Bus Machine PortSz Size Device on TUDA1 TUXA1 TUGE1
+ * ---- --- ------- ------ ----- ----------------------------
+ * 2 Local GPCM 8 bit 256MB PAXG LPXF PAXI
+ * 3 Local GPCM 8 bit 256MB PINC3 PINC2 unused
*
*/
@@ -71,6 +77,7 @@
OR_GPCM_TRLX_SET | \
OR_GPCM_EHTR_CLEAR | \
OR_GPCM_EAD)
+#ifndef CONFIG_KM_DISABLE_APP2
/*
* Configuration for C3 on the local bus
*/
@@ -94,6 +101,7 @@
#define CONFIG_SYS_MAMR (MxMR_GPL_x4DIS | \
0x0000c000 | \
MxMR_WLFx_2X)
+#endif
/*
* MMU Setup
@@ -113,6 +121,11 @@
BATL_GUARDEDSTORAGE)
#define CONFIG_SYS_DBAT5U CONFIG_SYS_IBAT5U
+#ifdef CONFIG_KM_DISABLE_APP2
+#define CONFIG_SYS_IBAT6L (0)
+#define CONFIG_SYS_IBAT6U (0)
+#define CONFIG_SYS_DBAT6L CONFIG_SYS_IBAT6L
+#else
/* APP2: icache cacheable, but dcache-inhibit and guarded */
#define CONFIG_SYS_IBAT6L (CONFIG_SYS_APP2_BASE | \
BATL_PP_RW | \
@@ -125,6 +138,7 @@
BATL_PP_RW | \
BATL_CACHEINHIBIT | \
BATL_GUARDEDSTORAGE)
+#endif
#define CONFIG_SYS_DBAT6U CONFIG_SYS_IBAT6U
#define CONFIG_SYS_IBAT7L (0)