Merge branch 'master' of git://git.denx.de/u-boot-arm

25 files changed, 1514 insertions, 53 deletions

diff --git a/include/bootstage.h b/include/bootstage.h
index a000538..db94a95 100644
--- a/include/bootstage.h
+++ b/include/bootstage.h
@@ -210,6 +210,7 @@ enum bootstage_id {
  */
 ulong timer_get_boot_us(void);
 
+#ifndef CONFIG_SPL_BUILD
 /*
  * Board code can implement show_boot_progress() if needed.
  *
@@ -217,8 +218,11 @@ ulong timer_get_boot_us(void);
  *		has occurred.
  */
 void show_boot_progress(int val);
+#else
+#define show_boot_progress(val) do {} while (0)
+#endif
 
-#ifdef CONFIG_BOOTSTAGE
+#if defined(CONFIG_BOOTSTAGE) && !defined(CONFIG_SPL_BUILD)
 /* This is the full bootstage implementation */
 
 /*
diff --git a/include/config_uncmd_spl.h b/include/config_uncmd_spl.h
new file mode 100644
index 0000000..bab3ddf
--- /dev/null
+++ b/include/config_uncmd_spl.h
@@ -0,0 +1,44 @@
+/*
+ * (C) Copyright 2012
+ * Ilya Yanok, ilya.yanok@gmail.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc.
+ *
+ * We don't use any commands in SPL, but generic networking code
+ * has some features enabled/disabled based on CONFIG_CMD_*
+ * options. As we want a minimal set of features included
+ * into network SPL image, we undefine some config options here.
+ */
+
+#ifndef __CONFIG_UNCMD_SPL_H__
+#define __CONFIG_UNCMD_SPL_H__
+
+#ifdef CONFIG_SPL_BUILD
+/* SPL needs only BOOTP + TFTP so undefine other stuff to save space */
+#undef CONFIG_CMD_CDP
+#undef CONFIG_CMD_DHCP
+#undef CONFIG_CMD_DNS
+#undef CONFIG_CMD_LINK_LOCAL
+#undef CONFIG_CMD_NFS
+#undef CONFIG_CMD_PING
+#undef CONFIG_CMD_RARP
+#undef CONFIG_CMD_SNTP
+#undef CONFIG_CMD_TFTPPUT
+#undef CONFIG_CMD_TFTPSRV
+#endif /* CONFIG_SPL_BUILD */
+#endif /* __CONFIG_UNCMD_SPL_H__ */
diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h
index 263a5ad..339d4bd 100644
--- a/include/configs/am335x_evm.h
+++ b/include/configs/am335x_evm.h
@@ -45,7 +45,7 @@
 #define CONFIG_VERSION_VARIABLE
 
 /* set to negative value for no autoboot */
-#define CONFIG_BOOTDELAY		3
+#define CONFIG_BOOTDELAY		1
 #define CONFIG_EXTRA_ENV_SETTINGS \
 	"loadaddr=0x80200000\0" \
 	"fdtaddr=0x80F80000\0" \
@@ -54,7 +54,7 @@
 	"console=ttyO0,115200n8\0" \
 	"optargs=\0" \
 	"mmcdev=0\0" \
-	"mmcroot=/dev/mmcblk0p2 rw\0" \
+	"mmcroot=/dev/mmcblk0p2 ro\0" \
 	"mmcrootfstype=ext4 rootwait\0" \
 	"ramroot=/dev/ram0 rw ramdisk_size=65536 initrd=${rdaddr},64M\0" \
 	"ramrootfstype=ext2\0" \
@@ -195,7 +195,7 @@
 #define CONFIG_SPL
 #define CONFIG_SPL_FRAMEWORK
 #define CONFIG_SPL_TEXT_BASE		0x402F0400
-#define CONFIG_SPL_MAX_SIZE		(46 * 1024)
+#define CONFIG_SPL_MAX_SIZE		(101 * 1024)
 #define CONFIG_SPL_STACK		CONFIG_SYS_INIT_SP_ADDR
 
 #define CONFIG_SPL_BSS_START_ADDR	0x80000000
@@ -215,6 +215,9 @@
 #define CONFIG_SPL_SERIAL_SUPPORT
 #define CONFIG_SPL_GPIO_SUPPORT
 #define CONFIG_SPL_YMODEM_SUPPORT
+#define CONFIG_SPL_NET_SUPPORT
+#define CONFIG_SPL_NET_VCI_STRING	"AM335x U-Boot SPL"
+#define CONFIG_SPL_ETH_SUPPORT
 #define CONFIG_SPL_LDSCRIPT		"$(CPUDIR)/omap-common/u-boot-spl.lds"
 
 /*
diff --git a/include/configs/armadillo-800eva.h b/include/configs/armadillo-800eva.h
new file mode 100644
index 0000000..b4402dd
--- /dev/null
+++ b/include/configs/armadillo-800eva.h
@@ -0,0 +1,160 @@
+/*
+ * Configuation settings for the bonito board
+ *
+ * Copyright (C) 2012 Renesas Solutions Corp.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __ARMADILLO_800EVA_H
+#define __ARMADILLO_800EVA_H
+
+#undef DEBUG
+#define CONFIG_ARMV7
+#define CONFIG_R8A7740
+#define CONFIG_RMOBILE
+#define CONFIG_RMOBILE_BOARD_STRING "Armadillo-800EVA Board\n"
+#define CONFIG_SH_GPIO_PFC
+
+#include <asm/arch/rmobile.h>
+
+#define CONFIG_CMD_MEMORY
+#define CONFIG_CMD_DFL
+#define CONFIG_CMD_SDRAM
+#define CONFIG_CMD_RUN
+#define CONFIG_CMD_LOADS
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_BOOTZ
+
+#define CONFIG_OF_LIBFDT
+#define BOARD_LATE_INIT
+
+#define CONFIG_BAUDRATE		115200
+#define CONFIG_BOOTDELAY	3
+#define CONFIG_BOOTARGS		""
+
+#define CONFIG_VERSION_VARIABLE
+#undef	CONFIG_SHOW_BOOT_PROGRESS
+
+#define CONFIG_ARCH_CPU_INIT
+#define CONFIG_DISPLAY_CPUINFO
+#define CONFIG_DISPLAY_BOARDINFO
+#define CONFIG_BOARD_EARLY_INIT_F
+#define CONFIG_USE_ARCH_MEMSET
+#define CONFIG_USE_ARCH_MEMCPY
+#define CONFIG_TMU_TIMER
+#define CONFIG_SYS_DCACHE_OFF
+
+/* STACK */
+#define CONFIG_SYS_INIT_SP_ADDR		0xE8083000
+#define STACK_AREA_SIZE				0xC000
+#define LOW_LEVEL_MERAM_STACK	\
+		(CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4)
+
+/* MEMORY */
+#define ARMADILLO_800EVA_SDRAM_BASE	0x40000000
+#define ARMADILLO_800EVA_SDRAM_SIZE	(512 * 1024 * 1024)
+
+#define CONFIG_SYS_LONGHELP
+#define CONFIG_SYS_PROMPT		"=> "
+#define CONFIG_SYS_CBSIZE		256
+#define CONFIG_SYS_PBSIZE		256
+#define CONFIG_SYS_MAXARGS		16
+#define CONFIG_SYS_BARGSIZE		512
+#define CONFIG_SYS_BAUDRATE_TABLE	{ 115200 }
+
+/* SCIF */
+#define CONFIG_SCIF_CONSOLE
+#define CONFIG_CONS_SCIF1
+#define SCIF0_BASE		0xe6c40000
+#define SCIF1_BASE		0xe6c50000
+#define SCIF2_BASE		0xe6c60000
+#define SCIF4_BASE		0xe6c80000
+#define	CONFIG_SCIF_A
+#undef	CONFIG_SYS_CONSOLE_INFO_QUIET
+#undef	CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
+#undef	CONFIG_SYS_CONSOLE_ENV_OVERWRITE
+
+#define CONFIG_SYS_MEMTEST_START	(ARMADILLO_800EVA_SDRAM_BASE)
+#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + \
+					 504 * 1024 * 1024)
+#undef	CONFIG_SYS_ALT_MEMTEST
+#undef	CONFIG_SYS_MEMTEST_SCRATCH
+#undef	CONFIG_SYS_LOADS_BAUD_CHANGE
+
+#define CONFIG_SYS_SDRAM_BASE		(ARMADILLO_800EVA_SDRAM_BASE)
+#define CONFIG_SYS_SDRAM_SIZE		(ARMADILLO_800EVA_SDRAM_SIZE)
+#define CONFIG_SYS_LOAD_ADDR		(CONFIG_SYS_SDRAM_BASE + \
+					 64 * 1024 * 1024)
+#define CONFIG_NR_DRAM_BANKS		1
+
+#define CONFIG_SYS_MONITOR_BASE		0x00000000
+#define CONFIG_SYS_MONITOR_LEN		(256 * 1024)
+#define CONFIG_SYS_MALLOC_LEN		(1 * 1024 * 1024)
+#define CONFIG_SYS_GBL_DATA_SIZE	(256)
+#define CONFIG_SYS_BOOTMAPSZ		(8 * 1024 * 1024)
+#define CONFIG_SYS_TEXT_BASE	0xE80C0000
+
+/* FLASH */
+#define CONFIG_SYS_NO_FLASH
+#define CONFIG_SYS_FLASH_CFI
+#define CONFIG_SYS_FLASH_CFI_WIDTH	FLASH_CFI_16BIT
+#define CONFIG_SYS_FLASH_BASE		0x00000000
+#define CONFIG_SYS_MAX_FLASH_SECT	512
+#define CONFIG_SYS_MAX_FLASH_BANKS	1
+#define CONFIG_SYS_FLASH_BANKS_LIST	{ (CONFIG_SYS_FLASH_BASE) }
+
+#define CONFIG_SYS_FLASH_ERASE_TOUT	3000
+#define CONFIG_SYS_FLASH_WRITE_TOUT	3000
+#define CONFIG_SYS_FLASH_LOCK_TOUT	3000
+#define CONFIG_SYS_FLASH_UNLOCK_TOUT	3000
+
+/* ENV setting */
+#define CONFIG_ENV_IS_IN_FLASH
+#define CONFIG_ENV_OVERWRITE	1
+#define CONFIG_ENV_SECT_SIZE	(128 * 1024)
+#define CONFIG_ENV_ADDR		(CONFIG_SYS_FLASH_BASE + \
+				 CONFIG_SYS_MONITOR_LEN)
+#define CONFIG_ENV_OFFSET	(CONFIG_ENV_ADDR)
+#define CONFIG_ENV_SIZE		(CONFIG_ENV_SECT_SIZE)
+#define CONFIG_ENV_SIZE_REDUND	(CONFIG_ENV_SECT_SIZE)
+
+/* SH Ether */
+#define	CONFIG_NET_MULTI
+#define CONFIG_SH_ETHER
+#define CONFIG_SH_ETHER_USE_PORT	0
+#define CONFIG_SH_ETHER_PHY_ADDR	0x0
+#define CONFIG_SH_ETHER_BASE_ADDR	0xe9a00000
+#define CONFIG_SH_ETHER_SH7734_MII	(0x01)
+#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII
+#define CONFIG_PHYLIB
+#define CONFIG_PHY_SMSC
+#define CONFIG_BITBANGMII
+#define CONFIG_BITBANGMII_MULTI
+
+/* Board Clock */
+#define CONFIG_SYS_CLK_FREQ	50000000
+#define CONFIG_SYS_TMU_CLK_DIV	4
+#define CONFIG_SYS_HZ		1000
+
+#endif	/* __ARMADILLO_800EVA_H */
diff --git a/include/configs/at91sam9261ek.h b/include/configs/at91sam9261ek.h
index 1e1fbe5..611e3e2 100644
--- a/include/configs/at91sam9261ek.h
+++ b/include/configs/at91sam9261ek.h
@@ -48,6 +48,8 @@
 
 #define CONFIG_DISPLAY_CPUINFO
 
+#define CONFIG_OF_LIBFDT
+
 #define CONFIG_ATMEL_LEGACY
 #define CONFIG_SYS_TEXT_BASE		0x21f00000
 
diff --git a/include/configs/at91sam9m10g45ek.h b/include/configs/at91sam9m10g45ek.h
index 4ca280a..e988d81 100644
--- a/include/configs/at91sam9m10g45ek.h
+++ b/include/configs/at91sam9m10g45ek.h
@@ -47,6 +47,8 @@
 #define CONFIG_BOARD_EARLY_INIT_F
 #define CONFIG_DISPLAY_CPUINFO
 
+#define CONFIG_OF_LIBFDT
+
 /* general purpose I/O */
 #define CONFIG_ATMEL_LEGACY		/* required until (g)pio is fixed */
 #define CONFIG_AT91_GPIO
diff --git a/include/configs/at91sam9x5ek.h b/include/configs/at91sam9x5ek.h
index 1ceb31a..cbdc3e9 100644
--- a/include/configs/at91sam9x5ek.h
+++ b/include/configs/at91sam9x5ek.h
@@ -42,6 +42,8 @@
 #define CONFIG_BOARD_EARLY_INIT_F
 #define CONFIG_DISPLAY_CPUINFO
 
+#define CONFIG_OF_LIBFDT
+
 /* general purpose I/O */
 #define CONFIG_ATMEL_LEGACY		/* required until (g)pio is fixed */
 #define CONFIG_AT91_GPIO
diff --git a/include/configs/devkit8000.h b/include/configs/devkit8000.h
index 2d2ee5f..1e65806 100644
--- a/include/configs/devkit8000.h
+++ b/include/configs/devkit8000.h
@@ -198,6 +198,7 @@
 		"run commonargs; " \
 		"setenv bootargs ${bootargs} " \
 		"root=/dev/mmcblk0p2 " \
+		"rootwait " \
 		"${kernelopts}\0" \
 	"nandargs=" \
 		"run commonargs; " \
diff --git a/include/configs/ea20.h b/include/configs/ea20.h
index 337d504..c82b5b6 100644
--- a/include/configs/ea20.h
+++ b/include/configs/ea20.h
@@ -30,6 +30,7 @@
 #define CONFIG_USE_SPIFLASH
 #define	CONFIG_SYS_USE_NAND
 #define CONFIG_DRIVER_TI_EMAC_USE_RMII
+#define CONFIG_DRIVER_TI_EMAC_RMII_NO_NEGOTIATE
 #define CONFIG_BOARD_EARLY_INIT_F
 #define CONFIG_BOARD_LATE_INIT
 #define CONFIG_VIDEO
@@ -97,6 +98,7 @@
  * Network & Ethernet Configuration
  */
 #ifdef CONFIG_DRIVER_TI_EMAC
+#define CONFIG_EMAC_MDIO_PHY_NUM	0
 #define CONFIG_MII
 #define CONFIG_BOOTP_DEFAULT
 #define CONFIG_BOOTP_DNS
@@ -120,10 +122,14 @@
 #define CONFIG_VIDEO_DA8XX
 #define CONFIG_CFB_CONSOLE
 #define CONFIG_VGA_AS_SINGLE_DEVICE
-#define CONFIG_SPLASH_SCREEN
+#define CONFIG_SPLASH_SCREEN_ALIGN
 #define CONFIG_VIDEO_LOGO
+#define CONFIG_SYS_CONSOLE_INFO_QUIET
 #define CONFIG_VIDEO_BMP_RLE8
+#define CONFIG_VIDEO_BMP_LOGO
 #define CONFIG_CMD_BMP
+#define CONFIG_SYS_CONSOLE_IS_IN_ENV
+#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
 #endif
 
 /*
@@ -194,6 +200,7 @@
 
 #define CONFIG_NAND_DAVINCI
 #define	CONFIG_SYS_NAND_PAGE_2K
+#define CONFIG_SYS_NAND_NO_SUBPAGE
 #define CONFIG_SYS_NAND_CS		2
 #define CONFIG_SYS_NAND_BASE		DAVINCI_ASYNC_EMIF_DATA_CE2_BASE
 #undef CONFIG_SYS_NAND_HW_ECC
@@ -232,31 +239,39 @@
 #define xstr(s)	str(s)
 #define str(s)	#s
 
-
 #define CONFIG_HOSTNAME ea20
-#define	CONFIG_EXTRA_ENV_SETTINGS					\
+#define	CONFIG_EXTRA_ENV_SETTINGS				\
 	"as=3\0"							\
-	"netdev=eth0\0"							\
+	"netdev=eth0\0"						\
 	"nfsargs=setenv bootargs root=/dev/nfs rw "			\
 		"nfsroot=${serverip}:${rootpath}\0"			\
 	"rfsbargs=setenv bootargs root=/dev/nfs rw "			\
 	"nfsroot=${serverip}:${rfsbpath}\0"				\
-	"ramargs=setenv bootargs root=/dev/ram rw\0"			\
-	"mtdids=nand0=davinci_nand.0\0"					\
-	"mtdparts=mtdparts=davinci_nand.0:8m(Settings),8m(aKernel),"	\
-	"8m(bKernel),76m(aRootfs),76m(bRootfs),-(MassSD)\0"		\
+	"testrfsargs=setenv bootargs root=/dev/nfs rw "		\
+	"nfsroot=${serverip}:${testrfspath}\0"				\
+	"ramargs=setenv bootargs root=/dev/ram rw initrd="		\
+	"0x${ramdisk_addr_r},4M\0"					\
+	"mtdids=nand0=davinci_nand.0\0"				\
+	"serverip=192.168.5.249\0"					\
+	"ipaddr=192.168.5.248\0"					\
+	"rootpath=/opt/eldk/arm\0"					\
+	"splashpos=230,180\0"						\
+	"testrfspath=/opt/eldk/test_arm\0"				\
+	"tempmac=setenv ethaddr 02:ea:20:ff:ff:ff\0"			\
 	"nandargs=setenv bootargs rootfstype=ubifs ro chk_data_crc "	\
 	"ubi.mtd=${as} root=ubi0:rootfs\0"				\
+	"nandrwargs=setenv bootargs rootfstype=ubifs rw chk_data_crc "	\
+	"ubi.mtd=${as} root=ubi0:rootfs\0"				\
 	"addip_sta=setenv bootargs ${bootargs} "			\
 		"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}"	\
 		":${hostname}:${netdev}:off panic=1\0"			\
 	"addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0"		\
-	"addip=if test -n ${ipdyn};then run addip_dyn;"			\
+	"addip=if test -n ${ipdyn};then run addip_dyn;"		\
 		"else run addip_sta;fi\0"				\
 	"addmtd=setenv bootargs ${bootargs} ${mtdparts}\0"		\
 	"addtty=setenv bootargs ${bootargs}"				\
 		" console=${consoledev},${baudrate}n8\0"		\
-	"addmisc=setenv bootargs ${bootargs} ${misc}\0"			\
+	"addmisc=setenv bootargs ${bootargs} ${misc}\0"		\
 	"addmem=setenv bootargs ${bootargs} mem=${memory}\0"		\
 	"consoledev=ttyS0\0"						\
 	"loadaddr=c0000014\0"						\
@@ -264,44 +279,57 @@
 	"kernel_addr_r=c0700000\0"					\
 	"hostname=" xstr(CONFIG_HOSTNAME) "\0"				\
 	"bootfile=" xstr(CONFIG_HOSTNAME) "/uImage\0"			\
-	"ramdisk_file=" xstr(CONFIG_HOSTNAME) "/uRamdisk\0"		\
+	"ramdisk_file=" xstr(CONFIG_HOSTNAME) "/image.ext2\0"		\
 	"flash_self=run ramargs addip addtty addmtd addmisc addmem;"	\
-		"bootm ${kernel_addr} ${ramdisk_addr}\0"		\
+			"bootm ${kernel_addr_r}\0"			\
 	"flash_nfs=run nfsargs addip addtty addmtd addmisc addmem;"	\
 		"bootm ${kernel_addr}\0"				\
-	"net_nfs=tftp ${kernel_addr_r} ${bootfile}; "                   \
+	"net_nfs=tftp ${kernel_addr_r} ${bootfile}; "			\
 		"run nfsargs addip addtty addmtd addmisc addmem;"	\
-		"bootm ${kernel_addr_r}\0"                              \
-	"net_rfsb=tftp ${kernel_addr_r} ${bootfile}; "                  \
-		"run rfsbargs addip addtty addmtd addmisc addmem; "     \
-		"bootm ${kernel_addr_r}\0"                              \
+		"bootm ${kernel_addr_r}\0"				\
+	"net_rfsb=tftp ${kernel_addr_r} ${bootfile}; "			\
+		"run rfsbargs addip addtty addmtd addmisc addmem; "	\
+		"bootm ${kernel_addr_r}\0"				\
+	"net_testrfs=tftp ${kernel_addr_r} ${bootfile}; "		\
+		"run testrfsargs addip addtty addmtd addmisc addmem; "	\
+		"bootm ${kernel_addr_r}\0"				\
 	"net_self_load=tftp ${kernel_addr_r} ${bootfile};"		\
 		"tftp ${ramdisk_addr_r} ${ramdisk_file};\0"		\
-	"nand_nand=ubi part nand0,${as};ubifsmount rootfs;"             \
-		"ubifsload ${kernel_addr_r} /boot/uImage;"              \
-		"ubifsumount; run nandargs addip addtty "               \
-		"addmtd addmisc addmem;bootm ${kernel_addr_r}\0"        \
-	"u-boot=" xstr(CONFIG_HOSTNAME) "/u-boot.bin\0"			\
-	"load_magic=if sf probe 0;then sf "                             \
-		"read c0000000 0x10000 0x60000;fi\0"                    \
-	"load_nand=ubi part nand0,${as};ubifsmount rootfs;"             \
-		"if ubifsload c0000014 /boot/u-boot.bin;"               \
-		"then mw c0000008 ${filesize};else echo Error reading " \
-		"u-boot from nand!;fi\0"                                \
-	"load_net=if sf probe 0;then sf read c0000000 0x10000 0x60000;"	\
-		"tftp c0000014 ${u-boot};"				\
-		"mw c0000008 ${filesize};"				\
-		"fi\0"		                                        \
-	"upd=if sf probe 0;then sf erase 10000 60000;"		        \
-		"sf write c0000000 10000 60000;"			\
-		"fi\0"							\
-	"ubootupd_net=if run load_net;then echo Updating u-boot;"       \
-		"if run upd; then echo U-Boot updated;"			\
+	"nand_nand=ubi part nand0,${as};ubifsmount rootfs;"		\
+		"ubifsload ${kernel_addr_r} /boot/uImage;"		\
+		"ubifsumount; run nandargs addip addtty "		\
+		"addmtd addmisc addmem;clrlogo;"			\
+		"bootm ${kernel_addr_r}\0"				\
+	"nand_nandrw=ubi part nand0,${as};ubifsmount rootfs;"		\
+		"ubifsload ${kernel_addr_r} /boot/uImage;"		\
+		"ubifsumount; run nandrwargs addip addtty "		\
+		"addmtd addmisc addmem;clrlogo;"			\
+		"bootm ${kernel_addr_r}\0"				\
+	"net_nandrw=tftp ${kernel_addr_r} ${bootfile}; run nandrwargs"	\
+		" addip addtty addmtd addmisc addmem;"			\
+		"clrlogo;bootm ${kernel_addr_r}\0"			\
+	"u-boot=" xstr(CONFIG_HOSTNAME) "/u-boot.bin\0"		\
+	"load_magic=if sf probe 0;then sf "				\
+		"read c0000000 0x10000 0x60000;fi\0"			\
+	"load_nand=ubi part nand0,${as};ubifsmount rootfs;"		\
+		"if ubifsload c0000014 /boot/u-boot.bin;"		\
+		"then mw c0000008 ${filesize};else echo Error reading"	\
+		" u-boot from nand!;fi\0"				\
+	"load_net=if sf probe 0;then sf read c0000000 0x10000 "	\
+		"0x60000;tftp c0000014 ${u-boot};"			\
+		"mw c0000008 ${filesize};fi\0"				\
+	"upd=if sf probe 0;then sf erase 10000 60000;"			\
+		"sf write c0000000 10000 60000;fi\0"			\
+	"ublupdate=if tftp C0700000 ${ublname};then sf probe 0; "	\
+		"sf erase 0 10000;"					\
+		"sf write 0xc0700000 0 ${filesize};fi\0"		\
+	"ubootupd_net=if run load_net;then echo Updating u-boot;"	\
+		"if run upd; then echo U-Boot updated;"		\
 			"else echo Error updating u-boot !;"		\
 			"echo Board without bootloader !!;"		\
 		"fi;"							\
-		"else echo U-Boot not downloaded..exiting;fi\0"		\
-	"ubootupd_nand=echo run load_magic,run load_nand,run upd;\0"    \
-	"bootcmd=run net_nfs\0"
+		"else echo U-Boot not downloaded..exiting;fi\0"	\
+	"ubootupd_nand=echo run load_magic,run load_nand,run upd;\0"	\
+	"bootcmd=run tempmac;run net_testrfs\0"
 
 #endif /* __CONFIG_H */
diff --git a/include/configs/edminiv2.h b/include/configs/edminiv2.h
index f2cfaf8..adb505e 100644
--- a/include/configs/edminiv2.h
+++ b/include/configs/edminiv2.h
@@ -222,7 +222,7 @@
 /*
  * Size of malloc() pool
  */
-#define CONFIG_SYS_MALLOC_LEN	(1024 * 128) /* 128kB for malloc() */
+#define CONFIG_SYS_MALLOC_LEN	(1024 * 256) /* 256kB for malloc() */
 
 /*
  * Other required minimal configurations
diff --git a/include/configs/iconnect.h b/include/configs/iconnect.h
new file mode 100644
index 0000000..2b523c9
--- /dev/null
+++ b/include/configs/iconnect.h
@@ -0,0 +1,129 @@
+/*
+ * (C) Copyright 2009-2012
+ * Wojciech Dubowik <wojciech.dubowik@neratec.com>
+ * Luka Perkov <uboot@lukaperkov.net>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef _CONFIG_ICONNECT_H
+#define _CONFIG_ICONNECT_H
+
+/*
+ * Version number information
+ */
+#define CONFIG_IDENT_STRING	" Iomega iConnect"
+
+/*
+ * High level configuration options
+ */
+#define CONFIG_FEROCEON_88FR131		/* CPU Core subversion */
+#define CONFIG_KIRKWOOD			/* SOC Family Name */
+#define CONFIG_KW88F6281		/* SOC Name */
+#define CONFIG_SKIP_LOWLEVEL_INIT	/* disable board lowlevel_init */
+
+/*
+ * Machine type
+ */
+#define CONFIG_MACH_TYPE	MACH_TYPE_ICONNECT
+
+/*
+ * Compression configuration
+ */
+#define CONFIG_BZIP2
+#define CONFIG_LZMA
+#define CONFIG_LZO
+
+/*
+ * Commands configuration
+ */
+#define CONFIG_SYS_NO_FLASH		/* declare no flash (NOR/SPI) */
+#define CONFIG_SYS_MVFS
+#include <config_cmd_default.h>
+#define CONFIG_CMD_ENV
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_NAND
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_USB
+
+/*
+ * mv-common.h should be defined after CMD configs since it used them
+ * to enable certain macros
+ */
+#include "mv-common.h"
+
+#undef CONFIG_SYS_PROMPT
+#define CONFIG_SYS_PROMPT	"iconnect => "
+
+/*
+ * Environment variables configuration
+ */
+#ifdef CONFIG_CMD_NAND
+#define CONFIG_ENV_IS_IN_NAND
+#define CONFIG_ENV_SECT_SIZE	0x20000
+#else
+#define CONFIG_ENV_IS_NOWHERE
+#endif
+#define CONFIG_ENV_SIZE		0x20000
+#define CONFIG_ENV_OFFSET	0x80000
+
+/*
+ * Default environment variables
+ */
+#define CONFIG_BOOTCOMMAND \
+	"setenv bootargs ${console} ${mtdparts} ${bootargs_root}; "	\
+	"ubi part rootfs; "						\
+	"ubifsmount rootfs; "						\
+	"ubifsload 0x800000 ${kernel}; "				\
+	"bootm 0x800000"
+
+#define CONFIG_MTDPARTS \
+	"mtdparts=orion_nand:"		\
+	"0x80000@0x0(uboot),"		\
+	"0x20000@0x80000(uboot_env),"	\
+	"-@0xa0000(rootfs)\0"
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+	"console=console=ttyS0,115200\0"	\
+	"mtdids=nand0=orion_nand\0"		\
+	"mtdparts="CONFIG_MTDPARTS		\
+	"kernel=/boot/uImage\0"			\
+	"bootargs_root=noinitrd ubi.mtd=2 root=ubi0:rootfs rootfstype=ubifs\0"
+
+/*
+ * Ethernet driver configuration
+ */
+#ifdef CONFIG_CMD_NET
+#define CONFIG_MVGBE_PORTS	{1, 0}	/* enable port 0 only */
+#define CONFIG_PHY_BASE_ADR	11
+#undef CONFIG_RESET_PHY_R
+#endif /* CONFIG_CMD_NET */
+
+/*
+ * File system
+ */
+#define CONFIG_CMD_EXT2
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_JFFS2
+#define CONFIG_CMD_UBI
+#define CONFIG_CMD_UBIFS
+#define CONFIG_RBTREE
+#define CONFIG_MTD_DEVICE
+#define CONFIG_MTD_PARTITIONS
+#define CONFIG_CMD_MTDPARTS
+
+#endif /* _CONFIG_ICONNECT_H */
diff --git a/include/configs/km_kirkwood.h b/include/configs/km_kirkwood.h
index fba181f..762cc10 100644
--- a/include/configs/km_kirkwood.h
+++ b/include/configs/km_kirkwood.h
@@ -62,6 +62,8 @@
 #define CONFIG_KM_ENV_IS_IN_SPI_NOR
 #define CONFIG_KM_FPGA_CONFIG
 #define CONFIG_KM_PIGGY4_88E6352
+#define CONFIG_MV88E6352_SWITCH
+#define CONFIG_KM_MVEXTSW_ADDR		0x10
 
 /* KM_MGCOGE3UN */
 #elif defined(CONFIG_KM_MGCOGE3UN)
diff --git a/include/configs/kzm9g.h b/include/configs/kzm9g.h
new file mode 100644
index 0000000..3a882e3
--- /dev/null
+++ b/include/configs/kzm9g.h
@@ -0,0 +1,169 @@
+/*
+ * Copyright (C) 2012 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
+ * Copyright (C) 2012 Renesas Solutions Corp.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __KZM9G_H
+#define __KZM9G_H
+
+#undef DEBUG
+
+#define CONFIG_RMOBILE
+#define CONFIG_SH73A0
+#define CONFIG_KZM_A9_GT
+#define CONFIG_RMOBILE_BOARD_STRING	"KMC KZM-A9-GT"
+#define CONFIG_MACH_TYPE MACH_TYPE_KZM9G
+
+#include <asm/arch/rmobile.h>
+
+#define CONFIG_ARCH_CPU_INIT
+#define CONFIG_DISPLAY_CPUINFO
+#define CONFIG_DISPLAY_BOARDINFO
+#define CONFIG_BOARD_EARLY_INIT_F
+#define CONFIG_L2_OFF
+#define CONFIG_OF_LIBFDT
+
+#include <config_cmd_default.h>
+#define CONFIG_CMDLINE_TAG
+#define CONFIG_SETUP_MEMORY_TAGS
+#define CONFIG_INITRD_TAG
+#define CONFIG_DOS_PARTITION
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_BOOTZ
+
+#define CONFIG_BAUDRATE		115200
+#define CONFIG_BOOTARGS		"root=/dev/null console=ttySC4,115200"
+#define CONFIG_BOOTDELAY 3
+
+#define CONFIG_VERSION_VARIABLE
+#undef  CONFIG_SHOW_BOOT_PROGRESS
+
+/* MEMORY */
+#define KZM_SDRAM_BASE	(0x40000000)
+#define PHYS_SDRAM		KZM_SDRAM_BASE
+#define PHYS_SDRAM_SIZE		(512 * 1024 * 1024)
+#define CONFIG_NR_DRAM_BANKS	(1)
+
+/* NOR Flash */
+#define KZM_FLASH_BASE	(0x00000000)
+#define CONFIG_SYS_FLASH_BASE		(KZM_FLASH_BASE)
+#define CONFIG_SYS_FLASH_CFI_WIDTH	(FLASH_CFI_16BIT)
+#define CONFIG_SYS_MAX_FLASH_BANKS	(1)
+#define CONFIG_SYS_MAX_FLASH_SECT	(512)
+
+/* prompt */
+#define CONFIG_SYS_LONGHELP
+#define CONFIG_SYS_PROMPT		"KZM-A9-GT# "
+#define CONFIG_SYS_CBSIZE		256
+#define CONFIG_SYS_PBSIZE		256
+#define CONFIG_SYS_MAXARGS		16
+#define CONFIG_SYS_BARGSIZE		512
+#define CONFIG_SYS_BAUDRATE_TABLE	{ 115200 }
+
+/* SCIF */
+#define CONFIG_SCIF_CONSOLE
+#define CONFIG_CONS_SCIF4
+#undef  CONFIG_SYS_CONSOLE_INFO_QUIET
+#undef  CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
+#undef  CONFIG_SYS_CONSOLE_ENV_OVERWRITE
+
+#define CONFIG_SYS_MEMTEST_START	(KZM_SDRAM_BASE)
+#define CONFIG_SYS_MEMTEST_END \
+	(CONFIG_SYS_MEMTEST_START + (60 * 1024 * 1024))
+#undef  CONFIG_SYS_ALT_MEMTEST
+#undef  CONFIG_SYS_MEMTEST_SCRATCH
+#undef  CONFIG_SYS_LOADS_BAUD_CHANGE
+
+#define CONFIG_SYS_INIT_RAM_ADDR	(0xE5600000) /* on MERAM */
+#define CONFIG_SYS_INIT_RAM_SIZE	(0x10000)
+#define LOW_LEVEL_MERAM_STACK		(CONFIG_SYS_INIT_RAM_ADDR - 4)
+#define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_INIT_RAM_ADDR + \
+					 CONFIG_SYS_INIT_RAM_SIZE - \
+					 GENERATED_GBL_DATA_SIZE)
+#define CONFIG_SDRAM_OFFSET_FOR_RT	(16 * 1024 * 1024)
+#define CONFIG_SYS_SDRAM_BASE	(KZM_SDRAM_BASE + CONFIG_SDRAM_OFFSET_FOR_RT)
+#define CONFIG_SYS_SDRAM_SIZE	(PHYS_SDRAM_SIZE - CONFIG_SDRAM_OFFSET_FOR_RT)
+#define CONFIG_SYS_LOAD_ADDR	(CONFIG_SYS_SDRAM_BASE + 32 * 1024 * 1024)
+
+#define CONFIG_SYS_MONITOR_BASE	(KZM_FLASH_BASE)
+#define CONFIG_SYS_MALLOC_LEN	(CONFIG_ENV_SIZE + 128 * 1024)
+#define CONFIG_SYS_GBL_DATA_SIZE	(256)
+#define CONFIG_SYS_BOOTMAPSZ	(8 * 1024 * 1024)
+
+#define CONFIG_SYS_TEXT_BASE		0x00000000
+#define CONFIG_STANDALONE_LOAD_ADDR	0x41000000
+
+/* FLASH */
+#define CONFIG_FLASH_CFI_DRIVER
+#define CONFIG_SYS_FLASH_CFI
+#undef  CONFIG_SYS_FLASH_QUIET_TEST
+#define CONFIG_SYS_FLASH_EMPTY_INFO
+#define FLASH_SECTOR_SIZE	(256 * 1024)	/* 256 KB sectors */
+#define CONFIG_ENV_SIZE		FLASH_SECTOR_SIZE
+#define CONFIG_ENV_OFFSET	FLASH_SECTOR_SIZE
+#define CONFIG_ENV_ADDR		(CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET)
+
+/* Timeout for Flash erase operations (in ms) */
+#define CONFIG_SYS_FLASH_ERASE_TOUT	(3 * 1000)
+/* Timeout for Flash write operations (in ms) */
+#define CONFIG_SYS_FLASH_WRITE_TOUT	(3 * 1000)
+/* Timeout for Flash set sector lock bit operations (in ms) */
+#define CONFIG_SYS_FLASH_LOCK_TOUT		(3 * 1000)
+/* Timeout for Flash clear lock bit operations (in ms) */
+#define CONFIG_SYS_FLASH_UNLOCK_TOUT	(3 * 1000)
+
+#undef  CONFIG_SYS_FLASH_PROTECTION
+#undef  CONFIG_SYS_DIRECT_FLASH_TFTP
+#define CONFIG_ENV_IS_IN_FLASH
+
+/* GPIO / PFC */
+#define CONFIG_SH_GPIO_PFC
+
+/* Clock */
+#define CONFIG_GLOBAL_TIMER
+#define CONFIG_SYS_CLK_FREQ	(48000000)
+#define CONFIG_SYS_CPU_CLK	(1196000000)
+#define TMU_CLK_DIVIDER		(4)	/* 4 (default), 16, 64, 256 or 1024 */
+#define CFG_HZ              (1000)
+#define CONFIG_SYS_HZ		CFG_HZ
+
+/* Ether */
+#define CONFIG_NET_MULTI
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_DHCP
+#define CONFIG_SMC911X
+#define CONFIG_SMC911X_BASE	(0x10000000)
+#define CONFIG_SMC911X_32_BIT
+#define CONFIG_NFS_TIMEOUT 10000UL
+
+/* I2C */
+#define CONFIG_CMD_I2C
+#define CONFIG_SH_I2C 1
+#define CONFIG_HARD_I2C
+#define CONFIG_I2C_MULTI_BUS
+#define CONFIG_SYS_MAX_I2C_BUS  (2)
+#define CONFIG_SYS_I2C_MODULE
+#define CONFIG_SYS_I2C_SPEED    (100000) /* 100 kHz */
+#define CONFIG_SYS_I2C_SLAVE    (0x7F)
+#define CONFIG_SH_I2C_DATA_HIGH (4)
+#define CONFIG_SH_I2C_DATA_LOW  (5)
+#define CONFIG_SH_I2C_CLOCK     (41666666)
+#define CONFIG_SH_I2C_BASE0     (0xE6820000)
+#define CONFIG_SH_I2C_BASE1     (0xE6822000)
+
+#endif /* __KZM9G_H */
diff --git a/include/configs/lacie_kw.h b/include/configs/lacie_kw.h
index c35c2db..09b5798 100644
--- a/include/configs/lacie_kw.h
+++ b/include/configs/lacie_kw.h
@@ -27,9 +27,20 @@
 #elif defined(CONFIG_NETSPACE_V2)
 #define CONFIG_MACH_TYPE		MACH_TYPE_NETSPACE_V2
 #define CONFIG_IDENT_STRING		" NS v2"
+#elif defined(CONFIG_NETSPACE_LITE_V2)
+#define MACH_TYPE_NETSPACE_LITE_V2	2983 /* missing in mach-types.h */
+#define CONFIG_MACH_TYPE		MACH_TYPE_NETSPACE_LITE_V2
+#define CONFIG_IDENT_STRING		" NS v2 Lite"
+#elif defined(CONFIG_NETSPACE_MINI_V2)
+#define MACH_TYPE_NETSPACE_MINI_V2	2831 /* missing in mach-types.h */
+#define CONFIG_MACH_TYPE		MACH_TYPE_NETSPACE_MINI_V2
+#define CONFIG_IDENT_STRING		" NS v2 Mini"
 #elif defined(CONFIG_NETSPACE_MAX_V2)
 #define CONFIG_MACH_TYPE		MACH_TYPE_NETSPACE_MAX_V2
 #define CONFIG_IDENT_STRING		" NS Max v2"
+#elif defined(CONFIG_D2NET_V2)
+#define CONFIG_MACH_TYPE		MACH_TYPE_D2NET_V2
+#define CONFIG_IDENT_STRING		" D2 v2"
 #elif defined(CONFIG_NET2BIG_V2)
 #define CONFIG_MACH_TYPE		MACH_TYPE_NET2BIG_V2
 #define CONFIG_IDENT_STRING		" 2Big v2"
@@ -41,8 +52,13 @@
  * High Level Configuration Options (easy to change)
  */
 #define CONFIG_FEROCEON_88FR131		/* CPU Core subversion */
-#define CONFIG_KIRKWOOD			/* SOC Family Name */
-#define CONFIG_KW88F6281		/* SOC Name */
+#define CONFIG_KIRKWOOD			/* SoC Family Name */
+/* SoC name */
+#if defined(CONFIG_NETSPACE_LITE_V2) || defined(CONFIG_NETSPACE_MINI_V2)
+#define CONFIG_KW88F6192
+#else
+#define CONFIG_KW88F6281
+#endif
 #define CONFIG_SKIP_LOWLEVEL_INIT	/* disable board lowlevel_init */
 
 /*
@@ -56,7 +72,9 @@
 #define CONFIG_CMD_SF
 #define CONFIG_CMD_I2C
 #define CONFIG_CMD_IDE
+#ifndef CONFIG_NETSPACE_MINI_V2 /* No USB ports on Network Space v2 Mini */
 #define CONFIG_CMD_USB
+#endif
 
 /*
  * Core clock definition
@@ -68,9 +86,14 @@
  */
 #define CONFIG_NR_DRAM_BANKS		1
 
-#ifdef CONFIG_INETSPACE_V2
-/* Different SDRAM configuration and size for Internet Space v2 */
+/*
+ * Different SDRAM configuration and size for some of the boards derived
+ * from the Network Space v2
+ */
+#if defined(CONFIG_INETSPACE_V2)
 #define CONFIG_SYS_KWD_CONFIG $(SRCTREE)/$(CONFIG_BOARDDIR)/kwbimage-is2.cfg
+#elif defined(CONFIG_NETSPACE_LITE_V2) || defined(CONFIG_NETSPACE_MINI_V2)
+#define CONFIG_SYS_KWD_CONFIG $(SRCTREE)/$(CONFIG_BOARDDIR)/kwbimage-ns2l.cfg
 #endif
 
 /*
@@ -88,7 +111,9 @@
 #define CONFIG_ENV_SPI_MAX_HZ           20000000 /* 20Mhz */
 #define CONFIG_SYS_IDE_MAXBUS           1
 #define CONFIG_SYS_IDE_MAXDEVICE        1
-#if defined(CONFIG_NET2BIG_V2)
+#if defined(CONFIG_D2NET_V2)
+#define CONFIG_SYS_PROMPT		"d2v2> "
+#elif defined(CONFIG_NET2BIG_V2)
 #define CONFIG_SYS_PROMPT		"2big2> "
 #else
 #define CONFIG_SYS_PROMPT		"ns2> "
@@ -108,7 +133,8 @@
  */
 #ifdef CONFIG_MVSATA_IDE
 #define CONFIG_SYS_ATA_IDE0_OFFSET      MV_SATA_PORT0_OFFSET
-#if defined(CONFIG_NETSPACE_MAX_V2) || defined(CONFIG_NET2BIG_V2)
+#if defined(CONFIG_NETSPACE_MAX_V2) || defined(CONFIG_D2NET_V2) || \
+	defined(CONFIG_NET2BIG_V2)
 #define CONFIG_SYS_ATA_IDE1_OFFSET      MV_SATA_PORT1_OFFSET
 #endif
 #endif /* CONFIG_MVSATA_IDE */
@@ -130,6 +156,12 @@
 #endif /* CONFIG_CMD_I2C */
 
 /*
+ * Partition support
+ */
+#define CONFIG_DOS_PARTITION
+#define CONFIG_EFI_PARTITION
+
+/*
  * File systems support
  */
 #define CONFIG_CMD_EXT2
diff --git a/include/configs/mini2440.h b/include/configs/mini2440.h
new file mode 100644
index 0000000..980b4a5
--- /dev/null
+++ b/include/configs/mini2440.h
@@ -0,0 +1,186 @@
+/*
+ * (C) Copyright 2002
+ * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
+ * Marius Groeger <mgroeger@sysgo.de>
+ * Gary Jennejohn <gj@denx.de>
+ * David Mueller <d.mueller@elsoft.ch>
+ *
+ * (C) Copyright 2009-2010
+ * Michel Pollet <buserror@gmail.com>
+ *
+ * (C) Copyright 2012
+ * Gabriel Huau <contact@huau-gabriel.fr>
+ *
+ * Configuation settings for the MINI2440 board.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#define CONFIG_SYS_TEXT_BASE 0x0
+#define CONFIG_S3C2440_GPIO
+
+/*
+ * High Level Configuration Options
+ */
+#define CONFIG_ARM920T			/* This is an ARM920T Core	*/
+#define CONFIG_S3C24X0			/* in a SAMSUNG S3C24X0 SoC */
+#define CONFIG_S3C2440			/* in a SAMSUNG S3C2440 SoC */
+#define CONFIG_MINI2440			/* on a MIN2440 Board       */
+
+#define MACH_TYPE_MINI2440	1999
+#define CONFIG_MACH_TYPE	MACH_TYPE_MINI2440
+
+/*
+ * We don't use lowlevel_init
+ */
+#define CONFIG_SKIP_LOWLEVEL_INIT
+#define CONFIG_BOARD_EARLY_INIT_F
+
+/*
+ * input clock of PLL
+ */
+/* MINI2440 has 12.0000MHz input clock */
+#define CONFIG_SYS_CLK_FREQ	12000000
+
+/*
+ * Size of malloc() pool
+ */
+#define CONFIG_SYS_MALLOC_LEN	(CONFIG_ENV_SIZE + 2048*1024)
+
+/*
+ * Hardware drivers
+ */
+#define CONFIG_DRIVER_DM9000
+#define CONFIG_DRIVER_DM9000_NO_EEPROM
+#define CONFIG_DM9000_BASE				0x20000300
+#define DM9000_IO		CONFIG_DM9000_BASE
+#define DM9000_DATA		(CONFIG_DM9000_BASE+4)
+
+/*
+ * select serial console configuration
+ */
+#define CONFIG_S3C24X0_SERIAL
+#define CONFIG_SERIAL1
+
+/*
+ * allow to overwrite serial and ethaddr
+ */
+#define CONFIG_ENV_OVERWRITE
+
+/*
+ * Command definition
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_PORTIO
+#define CONFIG_CMD_REGINFO
+#define CONFIG_CMD_SAVES
+
+/*
+ * Miscellaneous configurable options
+ */
+#define CONFIG_LONGHELP
+#define CONFIG_SYS_PROMPT	"MINI2440 => "
+#define CONFIG_SYS_CBSIZE	256
+#define CONFIG_SYS_PBSIZE	(CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
+#define CONFIG_SYS_MAXARGS	32
+#define CONFIG_SYS_BARGSIZE	CONFIG_SYS_CBSIZE
+
+#define CONFIG_SYS_MEMTEST_START	0x30000000
+#define CONFIG_SYS_MEMTEST_END		0x34000000	/* 64MB in DRAM	*/
+
+/* default load address	*/
+#define CONFIG_SYS_LOAD_ADDR		0x32000000
+
+/* boot parameters address */
+#define CONFIG_BOOT_PARAM_ADDR		0x30000100
+
+/*
+ * the PWM TImer 4 uses a counter of 15625 for 10 ms, so we need
+ * it to wrap 100 times (total 1562500) to get 1 sec.
+ */
+#define CONFIG_SYS_HZ			1562500
+
+/*
+ * valid baudrates
+ */
+#define CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200 }
+#define CONFIG_BAUDRATE		115200
+
+/*
+ * Stack sizes
+ * The stack sizes are set up in start.S using the settings below
+ */
+#define CONFIG_STACKSIZE	(128*1024)	/* regular stack */
+#ifdef CONFIG_USE_IRQ
+#define CONFIG_STACKSIZE_IRQ	(8*1024)	/* IRQ stack */
+#define CONFIG_STACKSIZE_FIQ	(4*1024)	/* FIQ stack */
+#endif
+
+/*
+ * Physical Memory Map
+ */
+#define CONFIG_NR_DRAM_BANKS        1          /* we have 1 bank of DRAM */
+#define PHYS_SDRAM_SIZE             (64*1024*1024) /* 64MB of DRAM */
+#define CONFIG_SYS_SDRAM_BASE       0x30000000
+#define CONFIG_SYS_FLASH_BASE		0x0
+
+/*
+ * Stack should be on the SRAM because
+ * DRAM is not init
+ */
+#define CONFIG_SYS_INIT_SP_ADDR		(0x40001000 - GENERATED_GBL_DATA_SIZE)
+
+/*
+ * NOR FLASH organization
+ * Now uses the standard CFI interface
+ * FLASH and environment organization
+ */
+#define CONFIG_SYS_FLASH_CFI
+#define CONFIG_FLASH_CFI_DRIVER
+#define CONFIG_SYS_FLASH_CFI_WIDTH	FLASH_CFI_16BIT
+#define CONFIG_SYS_MONITOR_BASE		0x0
+/* max number of memory banks */
+#define CONFIG_SYS_MAX_FLASH_BANKS	1
+/* 512 * 4096 sectors, or 32 * 64k blocks */
+#define CONFIG_SYS_MAX_FLASH_SECT	512
+#define CONFIG_FLASH_SHOW_PROGRESS  1
+
+/*
+ * Config for NOR flash
+ */
+#define CONFIG_ENV_IS_IN_FLASH
+#define CONFIG_MY_ENV_OFFSET	0x40000
+/* addr of environment */
+#define CONFIG_ENV_ADDR		(CONFIG_SYS_FLASH_BASE + CONFIG_MY_ENV_OFFSET)
+/* 16k Total Size of Environment Sector */
+#define CONFIG_ENV_SIZE		0x4000
+
+/* ATAG configuration */
+#define CONFIG_INITRD_TAG
+#define CONFIG_SETUP_MEMORY_TAGS
+#define CONFIG_CMDLINE_TAG
+#define CONFIG_CMDLINE_EDITING
+#define CONFIG_AUTO_COMPLETE
+
+#endif	/* __CONFIG_H */
diff --git a/include/configs/mx28evk.h b/include/configs/mx28evk.h
index dffb744..7cdbec6 100644
--- a/include/configs/mx28evk.h
+++ b/include/configs/mx28evk.h
@@ -63,6 +63,7 @@
 #define CONFIG_CMD_NET
 #define CONFIG_CMD_NFS
 #define CONFIG_CMD_PING
+#define CONFIG_CMD_SETEXPR
 #define CONFIG_CMD_SF
 #define CONFIG_CMD_SPI
 #define CONFIG_CMD_USB
diff --git a/include/configs/mx51evk.h b/include/configs/mx51evk.h
index ba4a4a6..7b027b4 100644
--- a/include/configs/mx51evk.h
+++ b/include/configs/mx51evk.h
@@ -44,6 +44,7 @@
 #define CONFIG_CMDLINE_TAG			/* enable passing of ATAGs */
 #define CONFIG_SETUP_MEMORY_TAGS
 #define CONFIG_INITRD_TAG
+#define CONFIG_REVISION_TAG
 
 #define CONFIG_OF_LIBFDT
 
diff --git a/include/configs/omap4_panda.h b/include/configs/omap4_panda.h
index b4756be..eacb5f5 100644
--- a/include/configs/omap4_panda.h
+++ b/include/configs/omap4_panda.h
@@ -31,7 +31,6 @@
 /*
  * High Level Configuration Options
  */
-#define CONFIG_PANDA	/* working with Panda */
 
 /* USB UHH support options */
 #define CONFIG_CMD_USB
diff --git a/include/configs/socfpga_cyclone5.h b/include/configs/socfpga_cyclone5.h
new file mode 100644
index 0000000..d9eb5d9
--- /dev/null
+++ b/include/configs/socfpga_cyclone5.h
@@ -0,0 +1,236 @@
+/*
+ *  Copyright (C) 2012 Altera Corporation <www.altera.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#include <asm/arch/socfpga_base_addrs.h>
+
+/*
+ * High level configuration
+ */
+
+#define CONFIG_ARMV7
+#define CONFIG_L2_OFF
+#define CONFIG_SYS_DCACHE_OFF
+#undef CONFIG_USE_IRQ
+
+#define CONFIG_MISC_INIT_R
+#define CONFIG_SINGLE_BOOTLOADER
+#define CONFIG_SOCFPGA
+
+#define CONFIG_SYS_TEXT_BASE		0x08000040
+#define V_NS16550_CLK			1000000
+#define CONFIG_BAUDRATE			57600
+#define CONFIG_SYS_HZ			1000
+#define CONFIG_TIMER_CLOCK_KHZ		2400
+#define CONFIG_SYS_LOAD_ADDR		0x7fc0
+
+/* Console I/O Buffer Size */
+#define CONFIG_SYS_CBSIZE		256
+/* Monitor Command Prompt */
+#define CONFIG_SYS_PROMPT		"SOCFPGA_CYCLONE5 # "
+#define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
+					sizeof(CONFIG_SYS_PROMPT) + 16)
+
+/*
+ * Display CPU and Board Info
+ */
+#define CONFIG_DISPLAY_CPUINFO
+#define CONFIG_DISPLAY_BOARDINFO
+
+/*
+ * Enable early stage initialization at C environment
+ */
+#define CONFIG_BOARD_EARLY_INIT_F
+
+/* flat device tree */
+#define CONFIG_OF_LIBFDT
+/* skip updating the FDT blob */
+#define CONFIG_FDT_BLOB_SKIP_UPDATE
+/* Initial Memory map size for Linux, minus 4k alignment for DFT blob */
+#define CONFIG_SYS_BOOTMAPSZ		((256*1024*1024) - (4*1024))
+
+#define CONFIG_SPL_RAM_DEVICE
+#define CONFIG_SPL_STACK (&__stack_start)
+#define CONFIG_SYS_SPL_MALLOC_START ((unsigned long) (&__malloc_start))
+#define CONFIG_SYS_SPL_MALLOC_SIZE (&__malloc_end - &__malloc_start)
+
+/*
+ * Memory allocation (MALLOC)
+ */
+/* Room required on the stack for the environment data */
+#define CONFIG_ENV_SIZE			1024
+/* Size of DRAM reserved for malloc() use */
+#define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + 128*1024)
+
+/* SP location before relocation, must use scratch RAM */
+#define CONFIG_SYS_INIT_RAM_ADDR	0xFFFF0000
+/* Reserving 0x100 space at back of scratch RAM for debug info */
+#define CONFIG_SYS_INIT_RAM_SIZE	(0x10000 - 0x100)
+/* Stack pointer prior relocation, must situated at on-chip RAM */
+#define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_INIT_RAM_ADDR + \
+					 CONFIG_SYS_INIT_RAM_SIZE - \
+					 GENERATED_GBL_DATA_SIZE)
+
+
+/*
+ * Command line configuration.
+ */
+#define CONFIG_SYS_NO_FLASH
+#include <config_cmd_default.h>
+/* FAT file system support */
+#define CONFIG_CMD_FAT
+
+
+/*
+ * Misc
+ */
+#define CONFIG_DOS_PARTITION            1
+
+#ifdef CONFIG_SPL_BUILD
+#undef CONFIG_PARTITIONS
+#endif
+
+/*
+ * Environment setup
+ */
+
+/* Delay before automatically booting the default image */
+#define CONFIG_BOOTDELAY		3
+/* Enable auto completion of commands using TAB */
+#define CONFIG_AUTO_COMPLETE
+/* use "hush" command parser */
+#define CONFIG_SYS_HUSH_PARSER
+#define CONFIG_SYS_PROMPT_HUSH_PS2	"> "
+#define CONFIG_CMD_RUN
+
+#define CONFIG_BOOTCOMMAND "run ramboot"
+
+/*
+ * arguments passed to the bootm command. The value of
+ * CONFIG_BOOTARGS goes into the environment value "bootargs".
+ * Do note the value will overide also the chosen node in FDT blob.
+ */
+#define CONFIG_BOOTARGS "console=ttyS0,57600,mem=256M@0x0"
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+	"verify=n\0" \
+	"loadaddr= " MK_STR(CONFIG_SYS_LOAD_ADDR) "\0" \
+	"ramboot=setenv bootargs " CONFIG_BOOTARGS ";" \
+		"bootm ${loadaddr} - ${fdt_addr}\0" \
+	"bootimage=uImage\0" \
+	"fdt_addr=100\0" \
+	"fsloadcmd=ext2load\0" \
+		"bootm ${loadaddr} - ${fdt_addr}\0" \
+	"qspiroot=/dev/mtdblock0\0" \
+	"qspirootfstype=jffs2\0" \
+	"qspiboot=setenv bootargs " CONFIG_BOOTARGS \
+		" root=${qspiroot} rw rootfstype=${qspirootfstype};"\
+		"bootm ${loadaddr} - ${fdt_addr}\0"
+
+/* using environment setting for stdin, stdout, stderr */
+#define CONFIG_SYS_CONSOLE_IS_IN_ENV
+/* Enable the call to overwrite_console() */
+#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
+/* Enable overwrite of previous console environment settings */
+#define CONFIG_SYS_CONSOLE_ENV_OVERWRITE
+
+/* max number of command args	 */
+#define CONFIG_SYS_MAXARGS		16
+
+
+/*
+ * Hardware drivers
+ */
+
+/*
+ * SDRAM Memory Map
+ */
+/* We have 1 bank of DRAM */
+#define CONFIG_NR_DRAM_BANKS		1
+/* SDRAM Bank #1 */
+#define CONFIG_SYS_SDRAM_BASE		0x00000000
+/* SDRAM memory size */
+#define PHYS_SDRAM_1_SIZE		0x80000000
+
+#define PHYS_SDRAM_1			CONFIG_SYS_SDRAM_BASE
+#define CONFIG_SYS_MEMTEST_START	0x00000000
+#define CONFIG_SYS_MEMTEST_END		PHYS_SDRAM_1_SIZE
+
+/*
+ * NS16550 Configuration
+ */
+#define UART0_BASE			SOCFPGA_UART0_ADDRESS
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE	-4
+#define CONFIG_SYS_NS16550_CLK          V_NS16550_CLK
+#define CONFIG_CONS_INDEX               1
+#define CONFIG_SYS_NS16550_COM1		UART0_BASE
+
+#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600, 115200}
+
+/*
+ * FLASH
+ */
+#define CONFIG_SYS_NO_FLASH
+
+/*
+ * L4 OSC1 Timer 0
+ */
+/* This timer use eosc1 where the clock frequency is fixed
+ * throughout any condition */
+#define CONFIG_SYS_TIMERBASE		SOCFPGA_OSC1TIMER0_ADDRESS
+
+/* reload value when timer count to zero */
+#define TIMER_LOAD_VAL			0xFFFFFFFF
+
+#define CONFIG_ENV_IS_NOWHERE
+
+/*
+ * SPL "Second Program Loader" aka Initial Software
+ */
+
+/* Enable building of SPL globally */
+#define CONFIG_SPL
+#define CONFIG_SPL_FRAMEWORK
+
+/* TEXT_BASE for linking the SPL binary */
+#define CONFIG_SPL_TEXT_BASE		0xFFFF0000
+
+/* Stack size for SPL */
+#define CONFIG_SPL_STACK_SIZE		(4 * 1024)
+
+/* MALLOC size for SPL */
+#define CONFIG_SPL_MALLOC_SIZE		(5 * 1024)
+
+#define CONFIG_SPL_SERIAL_SUPPORT
+#define CONFIG_SPL_BOARD_INIT
+
+#define CHUNKSZ_CRC32			(1 * 1024)
+
+#define CONFIG_CRC32_VERIFY
+
+/* Linker script for SPL */
+#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/socfpga/u-boot-spl.lds"
+
+/* Support for common/libcommon.o in SPL binary */
+#define CONFIG_SPL_LIBCOMMON_SUPPORT
+/* Support for lib/libgeneric.o in SPL binary */
+#define CONFIG_SPL_LIBGENERIC_SUPPORT
+
+#endif	/* __CONFIG_H */
diff --git a/include/configs/x600.h b/include/configs/x600.h
new file mode 100644
index 0000000..3082aaa
--- /dev/null
+++ b/include/configs/x600.h
@@ -0,0 +1,339 @@
+/*
+ * (C) Copyright 2009
+ * Vipin Kumar, STMicroelectronics, <vipin.kumar@st.com>
+ *
+ * Copyright (C) 2012 Stefan Roese <sr@denx.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/*
+ * High Level Configuration Options
+ * (easy to change)
+ */
+#define CONFIG_SPEAR600				/* SPEAr600 SoC */
+#define CONFIG_X600				/* on X600 board */
+
+#include <asm/arch/hardware.h>
+
+/* Timer, HZ specific defines */
+#define CONFIG_SYS_HZ				1000
+#define CONFIG_SYS_HZ_CLOCK			8300000
+
+#define	CONFIG_SYS_TEXT_BASE			0x00800040
+#define CONFIG_SYS_FLASH_BASE			0xf8000000
+/* Reserve 8KiB for SPL */
+#define CONFIG_SPL_PAD_TO			8192	/* decimal for 'dd' */
+#define CONFIG_SYS_SPL_LEN			CONFIG_SPL_PAD_TO
+#define CONFIG_SYS_UBOOT_BASE			(CONFIG_SYS_FLASH_BASE + \
+						 CONFIG_SYS_SPL_LEN)
+#define CONFIG_SYS_MONITOR_BASE			CONFIG_SYS_FLASH_BASE
+#define CONFIG_SYS_MONITOR_LEN			0x60000
+
+#define CONFIG_ENV_IS_IN_FLASH
+
+/* Serial Configuration (PL011) */
+#define CONFIG_SYS_SERIAL0			0xD0000000
+#define CONFIG_SYS_SERIAL1			0xD0080000
+#define CONFIG_PL01x_PORTS			{ (void *)CONFIG_SYS_SERIAL0, \
+						(void *)CONFIG_SYS_SERIAL1 }
+#define CONFIG_PL011_SERIAL
+#define CONFIG_PL011_CLOCK			(48 * 1000 * 1000)
+#define CONFIG_CONS_INDEX			0
+#define CONFIG_BAUDRATE				115200
+#define CONFIG_SYS_BAUDRATE_TABLE		{ 9600, 19200, 38400, \
+						  57600, 115200 }
+#define CONFIG_SYS_LOADS_BAUD_CHANGE
+
+/* NOR FLASH config options */
+#define CONFIG_ST_SMI
+#define CONFIG_SYS_MAX_FLASH_BANKS		1
+#define CONFIG_SYS_FLASH_BANK_SIZE		0x01000000
+#define CONFIG_SYS_FLASH_ADDR_BASE		{ CONFIG_SYS_FLASH_BASE }
+#define CONFIG_SYS_MAX_FLASH_SECT		128
+#define CONFIG_SYS_FLASH_EMPTY_INFO
+#define CONFIG_SYS_FLASH_ERASE_TOUT		(3 * CONFIG_SYS_HZ)
+#define CONFIG_SYS_FLASH_WRITE_TOUT		(3 * CONFIG_SYS_HZ)
+
+/* NAND FLASH config options */
+#define CONFIG_NAND_FSMC
+#define CONFIG_SYS_NAND_SELF_INIT
+#define CONFIG_SYS_MAX_NAND_DEVICE		1
+#define CONFIG_SYS_NAND_BASE			CONFIG_FSMC_NAND_BASE
+#define CONFIG_MTD_ECC_SOFT
+#define CONFIG_SYS_FSMC_NAND_8BIT
+#define CONFIG_SYS_NAND_ONFI_DETECTION
+
+/* UBI/UBI config options */
+#define CONFIG_MTD_DEVICE
+#define CONFIG_MTD_PARTITIONS
+#define CONFIG_RBTREE
+
+/* Ethernet config options */
+#define CONFIG_MII
+#define CONFIG_DESIGNWARE_ETH
+#define CONFIG_DW_SEARCH_PHY
+#define CONFIG_NET_MULTI
+#define CONFIG_PHY_RESET_DELAY			10000		/* in usec */
+#define CONFIG_DW_AUTONEG
+#define CONFIG_PHY_ADDR		0	/* PHY address */
+#define CONFIG_PHY_GIGE			/* Include GbE speed/duplex detection */
+
+#define CONFIG_SPEAR_GPIO
+
+/* I2C config options */
+#define CONFIG_HARD_I2C
+#define CONFIG_DW_I2C
+#define CONFIG_SYS_I2C_SPEED			400000
+#define CONFIG_SYS_I2C_SLAVE			0x02
+#define CONFIG_I2C_CHIPADDRESS			0x50
+
+#define CONFIG_RTC_M41T62	1
+#define CONFIG_SYS_I2C_RTC_ADDR	0x68
+
+/* FPGA config options */
+#define CONFIG_FPGA
+#define CONFIG_FPGA_XILINX
+#define CONFIG_FPGA_SPARTAN3
+#define CONFIG_FPGA_COUNT	1
+
+/*
+ * Command support defines
+ */
+#define CONFIG_CMD_CACHE
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_ENV
+#define CONFIG_CMD_FPGA
+#define CONFIG_CMD_GPIO
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_MEMORY
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_MTDPARTS
+#define CONFIG_CMD_NAND
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_RUN
+#define CONFIG_CMD_SAVES
+#define CONFIG_CMD_UBI
+#define CONFIG_CMD_UBIFS
+#define CONFIG_LZO
+
+/* This must be included AFTER the definition of CONFIG_COMMANDS (if any) */
+#include <config_cmd_default.h>
+
+#define CONFIG_BOOTDELAY			3
+
+#define CONFIG_SYS_HUSH_PARSER			/* Use the HUSH parser	*/
+#define	CONFIG_SYS_PROMPT_HUSH_PS2	"> "
+
+/*
+ * U-Boot Environment placing definitions.
+ */
+#define CONFIG_ENV_SECT_SIZE			0x00010000
+#define CONFIG_ENV_ADDR				(CONFIG_SYS_MONITOR_BASE + \
+						 CONFIG_SYS_MONITOR_LEN)
+#define CONFIG_ENV_SIZE				0x02000
+#define CONFIG_ENV_ADDR_REDUND			(CONFIG_ENV_ADDR + \
+						 CONFIG_ENV_SECT_SIZE)
+#define CONFIG_ENV_SIZE_REDUND			(CONFIG_ENV_SIZE)
+
+/* Miscellaneous configurable options */
+#define CONFIG_ARCH_CPU_INIT
+#define CONFIG_DISPLAY_CPUINFO
+#define CONFIG_BOOT_PARAMS_ADDR			0x00000100
+#define CONFIG_CMDLINE_TAG
+#define CONFIG_OF_LIBFDT		/* enable passing of devicetree */
+#define CONFIG_SETUP_MEMORY_TAGS
+#define CONFIG_MISC_INIT_R
+#define CONFIG_BOARD_LATE_INIT
+#define CONFIG_LOOPW			/* enable loopw command         */
+#define CONFIG_MX_CYCLIC		/* enable mdc/mwc commands      */
+#define CONFIG_ZERO_BOOTDELAY_CHECK
+#define CONFIG_AUTOBOOT_KEYED
+#define CONFIG_AUTOBOOT_STOP_STR		" "
+#define CONFIG_AUTOBOOT_PROMPT			\
+		"Hit SPACE in %d seconds to stop autoboot.\n", bootdelay
+
+#define CONFIG_SYS_MEMTEST_START		0x00800000
+#define CONFIG_SYS_MEMTEST_END			0x04000000
+#define CONFIG_SYS_MALLOC_LEN			(1024 * 1024)
+#define CONFIG_IDENT_STRING			"-SPEAr"
+#define CONFIG_SYS_LONGHELP
+#define CONFIG_SYS_PROMPT			"X600> "
+#define CONFIG_CMDLINE_EDITING
+#define CONFIG_SYS_CBSIZE			256
+#define CONFIG_SYS_PBSIZE			(CONFIG_SYS_CBSIZE + \
+						 sizeof(CONFIG_SYS_PROMPT) + 16)
+#define CONFIG_SYS_MAXARGS			16
+#define CONFIG_SYS_BARGSIZE			CONFIG_SYS_CBSIZE
+#define CONFIG_SYS_LOAD_ADDR			0x00800000
+#define CONFIG_SYS_CONSOLE_INFO_QUIET
+#define CONFIG_SYS_64BIT_VSPRINTF
+
+/* Use last 2 lwords in internal SRAM for bootcounter */
+#define CONFIG_BOOTCOUNT_LIMIT
+#define CONFIG_SYS_BOOTCOUNT_ADDR	0xd2801ff8
+
+#define CONFIG_HOSTNAME				x600
+#define CONFIG_UBI_PART				ubi0
+#define CONFIG_UBIFS_VOLUME			rootfs
+
+#define xstr(s)	str(s)
+#define str(s)	#s
+
+#define MTDIDS_DEFAULT		"nand0=nand"
+#define MTDPARTS_DEFAULT	"mtdparts=nand:64M(ubi0),64M(ubi1)"
+
+#define	CONFIG_EXTRA_ENV_SETTINGS					\
+	"u-boot_addr=1000000\0"						\
+	"u-boot=" xstr(CONFIG_HOSTNAME) "/u-boot.spr\0"			\
+	"load=tftp ${u-boot_addr} ${u-boot}\0"				\
+	"update=protect off " xstr(CONFIG_SYS_MONITOR_BASE) " +${filesize};"\
+		"erase " xstr(CONFIG_SYS_MONITOR_BASE) " +${filesize};"	\
+		"cp.b ${u-boot_addr} " xstr(CONFIG_SYS_MONITOR_BASE)	\
+		" ${filesize};"						\
+		"protect on " xstr(CONFIG_SYS_MONITOR_BASE)		\
+		" +${filesize}\0"					\
+	"upd=run load update\0"						\
+	"ubifs=" xstr(CONFIG_HOSTNAME) "/ubifs.img\0"			\
+	"part=" xstr(CONFIG_UBI_PART) "\0"				\
+	"vol=" xstr(CONFIG_UBIFS_VOLUME) "\0"				\
+	"load_ubifs=tftp ${kernel_addr} ${ubifs}\0"			\
+	"update_ubifs=ubi part ${part};ubi write ${kernel_addr} ${vol}"	\
+		" ${filesize}\0"					\
+	"upd_ubifs=run load_ubifs update_ubifs\0"			\
+	"init_ubifs=nand erase.part ubi0;ubi part ${part};"		\
+		"ubi create ${vol} 4000000\0"				\
+	"netdev=eth0\0"							\
+	"rootpath=/opt/eldk-4.2/arm\0"					\
+	"nfsargs=setenv bootargs root=/dev/nfs rw "			\
+		"nfsroot=${serverip}:${rootpath}\0"			\
+	"ramargs=setenv bootargs root=/dev/ram rw\0"			\
+	"boot_part=0\0"							\
+	"altbootcmd=if test $boot_part -eq 0;then "			\
+			"echo Switching to partition 1!;"		\
+			"setenv boot_part 1;"				\
+		"else; "						\
+			"echo Switching to partition 0!;"		\
+			"setenv boot_part 0;"				\
+		"fi;"							\
+		"saveenv;boot\0"					\
+	"ubifsargs=set bootargs ubi.mtd=ubi${boot_part} "		\
+		"root=ubi0:rootfs rootfstype=ubifs\0"			\
+	"kernel=" xstr(CONFIG_HOSTNAME) "/uImage\0"			\
+	"kernel_fs=/boot/uImage \0"					\
+	"kernel_addr=1000000\0"						\
+	"dtb=" xstr(CONFIG_HOSTNAME) "/" xstr(CONFIG_HOSTNAME) ".dtb\0"	\
+	"dtb_fs=/boot/" xstr(CONFIG_HOSTNAME) ".dtb\0"			\
+	"dtb_addr=1800000\0"						\
+	"load_kernel=tftp ${kernel_addr} ${kernel}\0"			\
+	"load_dtb=tftp ${dtb_addr} ${dtb}\0"				\
+	"addip=setenv bootargs ${bootargs} "				\
+		"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}"	\
+		":${hostname}:${netdev}:off panic=1\0"			\
+	"addcon=setenv bootargs ${bootargs} console=ttyAMA0,"		\
+		"${baudrate}\0"						\
+	"addmtd=setenv bootargs ${bootargs} ${mtdparts}\0"		\
+	"net_nfs=run load_dtb load_kernel; "				\
+		"run nfsargs addip addcon addmtd addmisc;"		\
+		"bootm ${kernel_addr} - ${dtb_addr}\0"			\
+	"mtdids=" MTDIDS_DEFAULT "\0"					\
+	"mtdparts=" MTDPARTS_DEFAULT "\0"				\
+	"nand_ubifs=run ubifs_mount ubifs_load ubifsargs addip"		\
+		" addcon addmisc addmtd;"				\
+		"bootm ${kernel_addr} - ${dtb_addr}\0"			\
+	"ubifs_mount=ubi part ubi${boot_part};ubifsmount rootfs\0"	\
+	"ubifs_load=ubifsload ${kernel_addr} ${kernel_fs};"		\
+		"ubifsload ${dtb_addr} ${dtb_fs};\0"			\
+	"nand_ubifs=run ubifs_mount ubifs_load ubifsargs addip addcon "	\
+		"addmtd addmisc;bootm ${kernel_addr} - ${dtb_addr}\0"	\
+	"bootcmd=run nand_ubifs\0"					\
+	"\0"
+
+/* Stack sizes */
+#define CONFIG_STACKSIZE			(512 * 1024)
+
+/* Physical Memory Map */
+#define CONFIG_NR_DRAM_BANKS			1
+#define PHYS_SDRAM_1				0x00000000
+#define PHYS_SDRAM_1_MAXSIZE			0x40000000
+
+#define CONFIG_SYS_SDRAM_BASE			PHYS_SDRAM_1
+#define CONFIG_SYS_INIT_RAM_ADDR		0xD2800000
+#define CONFIG_SYS_INIT_RAM_SIZE		0x2000
+
+#define CONFIG_SYS_INIT_SP_OFFSET		\
+	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
+
+#define CONFIG_SYS_INIT_SP_ADDR			\
+	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
+
+/*
+ * SPL related defines
+ */
+#define CONFIG_SPL
+#define CONFIG_SPL_TEXT_BASE	0xd2800b00
+#define	CONFIG_SPL_START_S_PATH	"arch/arm/cpu/arm926ejs/spear"
+#define CONFIG_SPL_LDSCRIPT	"arch/arm/cpu/arm926ejs/spear/u-boot-spl.lds"
+
+#define CONFIG_SPL_SERIAL_SUPPORT
+#define CONFIG_SPL_LIBCOMMON_SUPPORT	/* image.c */
+#define CONFIG_SPL_LIBGENERIC_SUPPORT	/* string.c */
+#define CONFIG_SPL_NO_PRINTF
+
+/*
+ * Please select/define only one of the following
+ * Each definition corresponds to a supported DDR chip.
+ * DDR configuration is based on the following selection
+ */
+#define CONFIG_DDR_MT47H64M16		1
+#define CONFIG_DDR_MT47H32M16		0
+#define CONFIG_DDR_MT47H128M8		0
+
+/*
+ * Synchronous/Asynchronous operation of DDR
+ *
+ * Select CONFIG_DDR_2HCLK for DDR clk = 333MHz, synchronous operation
+ * Select CONFIG_DDR_HCLK for DDR clk = 166MHz, synchronous operation
+ * Select CONFIG_DDR_PLL2 for DDR clk = PLL2, asynchronous operation
+ */
+#define CONFIG_DDR_2HCLK		1
+#define CONFIG_DDR_HCLK			0
+#define CONFIG_DDR_PLL2			0
+
+/*
+ * xxx_BOOT_SUPPORTED macro defines whether a booting type is supported
+ * or not. Modify/Add to only these macros to define new boot types
+ */
+#define USB_BOOT_SUPPORTED		0
+#define PCIE_BOOT_SUPPORTED		0
+#define SNOR_BOOT_SUPPORTED		1
+#define NAND_BOOT_SUPPORTED		1
+#define PNOR_BOOT_SUPPORTED		0
+#define TFTP_BOOT_SUPPORTED		0
+#define UART_BOOT_SUPPORTED		0
+#define SPI_BOOT_SUPPORTED		0
+#define I2C_BOOT_SUPPORTED		0
+#define MMC_BOOT_SUPPORTED		0
+
+#endif  /* __CONFIG_H */
diff --git a/include/configs/zynq.h b/include/configs/zynq.h
new file mode 100644
index 0000000..34ac3ef
--- /dev/null
+++ b/include/configs/zynq.h
@@ -0,0 +1,112 @@
+/*
+ * (C) Copyright 2012 Michal Simek <monstr@monstr.eu>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __CONFIG_ZYNQ_H
+#define __CONFIG_ZYNQ_H
+
+#define CONFIG_ARMV7 /* This is an ARM V7 CPU core */
+#define CONFIG_ZYNQ
+
+/* CPU clock */
+#define CONFIG_CPU_FREQ_HZ	800000000
+#define CONFIG_SYS_HZ		1000
+
+/* Ram */
+#define CONFIG_NR_DRAM_BANKS		1
+#define CONFIG_SYS_TEXT_BASE		0
+#define CONFIG_SYS_SDRAM_BASE		0
+#define CONFIG_SYS_SDRAM_SIZE		0x40000000
+#define CONFIG_SYS_MEMTEST_START	CONFIG_SYS_SDRAM_BASE
+#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_SDRAM_BASE + 0x1000)
+
+/* The following table includes the supported baudrates */
+#define CONFIG_SYS_BAUDRATE_TABLE  \
+	{300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
+
+#define CONFIG_BAUDRATE		115200
+
+/* XPSS Serial driver */
+#define CONFIG_SERIAL_MULTI
+#define CONFIG_ZYNQ_SERIAL
+#define CONFIG_ZYNQ_SERIAL_BASEADDR0	0xE0001000
+#define CONFIG_ZYNQ_SERIAL_BAUDRATE0	CONFIG_BAUDRATE
+#define CONFIG_ZYNQ_SERIAL_CLOCK0	50000000
+
+/* SCU timer address is hardcoded */
+#define CONFIG_SCUTIMER_BASEADDR	0xF8F00600
+
+/* Ethernet driver */
+#define CONFIG_NET_MULTI
+#define CONFIG_ZYNQ_GEM
+#define CONFIG_ZYNQ_GEM_BASEADDR0	0xE000B000
+
+#define CONFIG_BOOTP_SERVERIP
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_MAY_FAIL
+
+/* MII and Phylib */
+#define CONFIG_MII
+#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
+#define CONFIG_PHYLIB
+#define CONFIG_PHY_MARVELL
+
+/* Environment */
+#define CONFIG_ENV_IS_NOWHERE
+#define CONFIG_ENV_SIZE 0x10000
+
+#define CONFIG_SYS_NO_FLASH
+
+#define CONFIG_SYS_MALLOC_LEN		0x400000
+#define CONFIG_SYS_INIT_RAM_ADDR	CONFIG_SYS_SDRAM_BASE
+#define CONFIG_SYS_INIT_RAM_SIZE	CONFIG_SYS_MALLOC_LEN
+#define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_INIT_RAM_ADDR + \
+						CONFIG_SYS_INIT_RAM_SIZE - \
+						GENERATED_GBL_DATA_SIZE)
+
+#define CONFIG_SYS_PROMPT	"U-Boot> "
+#define CONFIG_SYS_CBSIZE	256 /* Console I/O Buffer Size */
+#define CONFIG_SYS_PBSIZE	(CONFIG_SYS_CBSIZE + \
+					sizeof(CONFIG_SYS_PROMPT) + 16)
+
+#define CONFIG_SYS_LOAD_ADDR	0
+#define CONFIG_SYS_MAXARGS	15 /* max number of command args */
+#define CONFIG_SYS_LONGHELP
+#define CONFIG_AUTO_COMPLETE
+#define CONFIG_CMDLINE_EDITING
+
+#define CONFIG_SYS_HUSH_PARSER
+#define CONFIG_SYS_PROMPT_HUSH_PS2	"> "
+
+/* OF */
+#define CONFIG_FIT
+#define CONFIG_OF_LIBFDT
+
+/* Commands */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_MII
+
+#endif /* __CONFIG_ZYNQ_H */
diff --git a/include/ipu_pixfmt.h b/include/ipu_pixfmt.h
index 0019898..4baa711 100644
--- a/include/ipu_pixfmt.h
+++ b/include/ipu_pixfmt.h
@@ -77,5 +77,6 @@
 #define IPU_PIX_FMT_YUV422P fourcc('4', '2', '2', 'P')	/*< 16 YUV 4:2:2 */
 
 int ipuv3_fb_init(struct fb_videomode *mode, uint8_t disp, uint32_t pixfmt);
+void ipuv3_fb_shutdown(void);
 
 #endif
diff --git a/include/serial.h b/include/serial.h
index d76d6df..826b488 100644
--- a/include/serial.h
+++ b/include/serial.h
@@ -90,6 +90,11 @@ extern struct serial_device bfin_serial2_device;
 extern struct serial_device bfin_serial3_device;
 #endif
 
+#if defined(CONFIG_ZYNQ_SERIAL)
+extern struct serial_device uart_zynq_serial0_device;
+extern struct serial_device uart_zynq_serial1_device;
+#endif
+
 extern void serial_register(struct serial_device *);
 extern void serial_initialize(void);
 extern void serial_stdio_init(void);
diff --git a/include/sh_tmu.h b/include/sh_tmu.h
index a55d141..96c589d 100644
--- a/include/sh_tmu.h
+++ b/include/sh_tmu.h
@@ -47,7 +47,7 @@ struct tmu_regs {
 };
 #endif /* CONFIG_SH3 */
 
-#if defined(CONFIG_SH4) || defined(CONFIG_SH4A)
+#if defined(CONFIG_SH4) || defined(CONFIG_SH4A) || defined(CONFIG_RMOBILE)
 struct tmu_regs {
 	u32 reserved;
 	u8  tstr;
diff --git a/include/spl.h b/include/spl.h
index af94a82..b02f36f 100644
--- a/include/spl.h
+++ b/include/spl.h
@@ -71,6 +71,9 @@ void spl_ymodem_load_image(void);
 /* SPI SPL functions */
 void spl_spi_load_image(void);
 
+/* Ethernet SPL functions */
+void spl_net_load_image(const char *device);
+
 #ifdef CONFIG_SPL_BOARD_INIT
 void spl_board_init(void);
 #endif