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authorGerlando Falauto <gerlando.falauto@keymile.com>2014-02-13 16:43:00 +0100
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2014-02-13 17:45:36 +0100
commit9c134e189a95c976dab94d4f28444a5398627188 (patch)
treef261253dd57b44c56705c5df2311fb7edbb013eb /include
parentb1c2a7ae32b6c5dd1dcb7cb29c862af01523ba36 (diff)
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arm/km: introduce kmsugp1 target
KMSUGP1 is from a u-boot perspective (almost) identical to KMNUSA. The only difference is that the PCIe reset is connected to Kirkwood pin MPP7_PEX_RST_OUTn, we use a dedicated config flag KM_PCIE_RESET_MPP7. Such pin should theoretically be handled by the PCIe subsystem automatically, but this turned out not to be the case. So simply configure this PIN as a GPIO and issue a pulse manually. Signed-off-by: Gerlando Falauto <gerlando.falauto@keymile.com> Cc: Karlheinz Jerg <karlheinz.jerg@keymile.com> Cc: Valentin Longchamp <valenting.longchamp@keymile.com> Cc: Holger Brunck <holger.brunck@keymile.com> Acked-by: Valentin Longchamp <valentin.longchamp@keymile.com>
Diffstat (limited to 'include')
-rw-r--r--include/configs/km_kirkwood.h12
1 files changed, 10 insertions, 2 deletions
diff --git a/include/configs/km_kirkwood.h b/include/configs/km_kirkwood.h
index 2bd89b1..2cde177 100644
--- a/include/configs/km_kirkwood.h
+++ b/include/configs/km_kirkwood.h
@@ -45,11 +45,19 @@
#define CONFIG_KM_DISABLE_PCIE
#define CONFIG_KM_IVM_BUS 1 /* I2C2 (Mux-Port 1)*/
-/* KM_NUSA */
-#elif defined(CONFIG_KM_NUSA)
+/* KM_NUSA / KM_SUGP1 */
+#elif defined(CONFIG_KM_NUSA) || defined(CONFIG_KM_SUGP1)
#define CONFIG_KM_IVM_BUS 1 /* I2C2 (Mux-Port 1)*/
+
+# if defined(CONFIG_KM_NUSA)
#define CONFIG_IDENT_STRING "\nKeymile NUSA"
#define CONFIG_HOSTNAME kmnusa
+# elif defined(CONFIG_KM_SUGP1)
+#define CONFIG_IDENT_STRING "\nKeymile SUGP1"
+#define CONFIG_HOSTNAME kmsugp1
+#define KM_PCIE_RESET_MPP7
+#endif
+
#undef CONFIG_SYS_KWD_CONFIG
#define CONFIG_SYS_KWD_CONFIG \
$(SRCTREE)/$(CONFIG_BOARDDIR)/kwbimage_128M16_1.cfg