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authorChe-liang Chiou <clchiou@chromium.org>2011-02-21 21:07:00 +0000
committerWolfgang Denk <wd@denx.de>2011-05-12 22:25:16 +0200
commit0da43893dda8be14b18b2b12dcc48a5e356a742e (patch)
tree23ccc573d30dfaae9abf99cc974320a2154d55d7 /include
parentccb9ebefbec68f18b4f479b774fa5f6edc2ad819 (diff)
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Fix variable flavor in examples/standalone/Makefile
GNU Makefile have two flavors of variables, recursively expanded that is defined by using '=', and simply expanded that is defined by using ':='. The bug is caused by using recursively expanded flavor for BIN and SREC. As you can see below, they are prepended by $(obj) twice. We can reproduce this bug with a simplified version of this Makefile: $ cat >Makefile <<\EOF obj := /path/to/obj/ ELF := hello_world BIN_rec = $(addsuffix .bin,$(ELF)) # recursively expanded BIN_sim := $(addsuffix .bin,$(ELF)) # simply expanded ELF := $(addprefix $(obj),$(ELF)) BIN_rec := $(addprefix $(obj),$(BIN_rec)) BIN_sim := $(addprefix $(obj),$(BIN_sim)) show: @echo BIN_rec=$(BIN_rec) @echo BIN_sim=$(BIN_sim) .PHONY: show EOF $ make show BIN_rec=/path/to/obj//path/to/obj/hello_world.bin BIN_sim=/path/to/obj/hello_world.bin Signed-off-by: Che-Liang Chiou <clchiou@chromium.org>
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