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| author | Huang Shijie <b32955@freescale.com> | 2012-08-16 09:32:33 +0800 |
|---|---|---|
| committer | Huang Shijie <b32955@freescale.com> | 2012-08-20 16:08:52 +0800 |
| commit | aec25e93ac4e1595f90daaeb49bbb85d388e1303 (patch) | |
| tree | 441709f553201795825ac04b89ec39fe48cb041f /include | |
| parent | d4b9e8af7b17845aeca4aaf2efda3f06910fb356 (diff) | |
| download | u-boot-imx-aec25e93ac4e1595f90daaeb49bbb85d388e1303.zip u-boot-imx-aec25e93ac4e1595f90daaeb49bbb85d388e1303.tar.gz u-boot-imx-aec25e93ac4e1595f90daaeb49bbb85d388e1303.tar.bz2 | |
ENGR00217505-2 uboot: mtd: update nand_get_flash_type()
update nand_get_flash_type() to the latest code.
Also add the support of ONFI nand.
Signed-off-by: Huang Shijie <b32955@freescale.com>
Diffstat (limited to 'include')
| -rw-r--r-- | include/linux/mtd/nand.h | 68 |
1 files changed, 68 insertions, 0 deletions
diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h index 37e08cc..7310605 100644 --- a/include/linux/mtd/nand.h +++ b/include/linux/mtd/nand.h @@ -85,6 +85,7 @@ extern void nand_wait_ready(struct mtd_info *mtd); #define NAND_CMD_RNDIN 0x85 #define NAND_CMD_READID 0x90 #define NAND_CMD_ERASE2 0xd0 +#define NAND_CMD_PARAM 0xec #define NAND_CMD_RESET 0xff /* Extended commands for large page devices */ @@ -213,6 +214,70 @@ typedef enum { /* Keep gcc happy */ struct nand_chip; +struct nand_onfi_params { + /* rev info and features block */ + /* 'O' 'N' 'F' 'I' */ + u8 sig[4]; + __le16 revision; + __le16 features; + __le16 opt_cmd; + u8 reserved[22]; + + /* manufacturer information block */ + char manufacturer[12]; + char model[20]; + u8 jedec_id; + __le16 date_code; + u8 reserved2[13]; + + /* memory organization block */ + __le32 byte_per_page; + __le16 spare_bytes_per_page; + __le32 data_bytes_per_ppage; + __le16 spare_bytes_per_ppage; + __le32 pages_per_block; + __le32 blocks_per_lun; + u8 lun_count; + u8 addr_cycles; + u8 bits_per_cell; + __le16 bb_per_lun; + __le16 block_endurance; + u8 guaranteed_good_blocks; + __le16 guaranteed_block_endurance; + u8 programs_per_page; + u8 ppage_attr; + u8 ecc_bits; + u8 interleaved_bits; + u8 interleaved_ops; + u8 reserved3[13]; + + /* electrical parameter block */ + u8 io_pin_capacitance_max; + __le16 async_timing_mode; + __le16 program_cache_timing_mode; + __le16 t_prog; + __le16 t_bers; + __le16 t_r; + __le16 t_ccs; + __le16 src_sync_timing_mode; + __le16 src_ssync_features; + __le16 clk_pin_capacitance_typ; + __le16 io_pin_capacitance_typ; + __le16 input_pin_capacitance_typ; + u8 input_pin_capacitance_max; + u8 driver_strenght_support; + __le16 t_int_r; + __le16 t_ald; + u8 reserved4[7]; + + /* vendor */ + u8 reserved5[90]; + + __le16 crc; +} __attribute__((packed)); + +#define ONFI_CRC_BASE 0x4F4E + /** * struct nand_hw_control - Control structure for hardware controller (e.g ECC generator) shared among independent devices * @lock: protection lock @@ -403,6 +468,9 @@ struct nand_chip { uint8_t cellinfo; int badblockpos; + int onfi_version; + struct nand_onfi_params onfi_params; + int state; uint8_t *oob_poi; |