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author | Wolfgang Denk <wd@denx.de> | 2008-04-26 00:06:13 +0200 |
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committer | Wolfgang Denk <wd@denx.de> | 2008-04-26 00:06:13 +0200 |
commit | 1d907e66fdd5d2f192a9f4fad6812ff0d0e9683a (patch) | |
tree | 59e09371286cb870fafad2c88d796062ba540447 /include | |
parent | d0d91ae3acb4f29d1a2a3a766747478ed54e2848 (diff) | |
parent | 8e048c438e20ec89b49da5f085f8f756eba6e587 (diff) | |
download | u-boot-imx-1d907e66fdd5d2f192a9f4fad6812ff0d0e9683a.zip u-boot-imx-1d907e66fdd5d2f192a9f4fad6812ff0d0e9683a.tar.gz u-boot-imx-1d907e66fdd5d2f192a9f4fad6812ff0d0e9683a.tar.bz2 |
Merge branch 'master' of git://www.denx.de/git/u-boot-ppc4xx
Diffstat (limited to 'include')
-rw-r--r-- | include/asm-ppc/4xx_pcie.h | 5 | ||||
-rw-r--r-- | include/configs/APC405.h | 14 |
2 files changed, 16 insertions, 3 deletions
diff --git a/include/asm-ppc/4xx_pcie.h b/include/asm-ppc/4xx_pcie.h index d27d2a9..5398696 100644 --- a/include/asm-ppc/4xx_pcie.h +++ b/include/asm-ppc/4xx_pcie.h @@ -8,10 +8,11 @@ * option) any later version. */ -#include <ppc4xx.h> #ifndef __4XX_PCIE_H #define __4XX_PCIE_H +#include <ppc4xx.h> + #define DCRN_SDR0_CFGADDR 0x00e #define DCRN_SDR0_CFGDATA 0x00f @@ -395,6 +396,7 @@ static inline void mdelay(int n) udelay(1000); } +#if defined(PCIE0_SDR) static inline u32 sdr_base(int port) { switch (port) { @@ -409,5 +411,6 @@ static inline u32 sdr_base(int port) #endif } } +#endif /* defined(PCIE0_SDR) */ #endif /* __4XX_PCIE_H */ diff --git a/include/configs/APC405.h b/include/configs/APC405.h index e2ab39d..8ad33f1 100644 --- a/include/configs/APC405.h +++ b/include/configs/APC405.h @@ -48,6 +48,7 @@ #define CONFIG_BAUDRATE 115200 #define CONFIG_BOOTDELAY 1 /* autoboot after 3 seconds */ +#define CONFIG_BOOTCOUNT_LIMIT 1 #undef CONFIG_BOOTARGS @@ -57,6 +58,8 @@ "run ramargs addip addcon usbargs;" \ "bootm 200000 300000" #define CFG_USB_ARGS "setenv bootargs $(bootargs) usbboot=1" +#define CFG_BOOTLIMIT "3" +#define CFG_ALT_BOOTCOMMAND "run usb_self;reset" #define CONFIG_EXTRA_ENV_SETTINGS \ "hostname=abg405\0" \ @@ -88,8 +91,10 @@ "usb_load="CFG_USB_LOAD_COMMAND"\0" \ "usb_self="CFG_USB_SELF_COMMAND"\0" \ "usbargs="CFG_USB_ARGS"\0" \ + "bootlimit="CFG_BOOTLIMIT"\0" \ + "altbootcmd="CFG_ALT_BOOTCOMMAND"\0" \ "" -#define CONFIG_BOOTCOMMAND "run flash_self;run usb_self" +#define CONFIG_BOOTCOMMAND "run flash_self;reset" #define CONFIG_ETHADDR 00:02:27:8e:00:00 @@ -414,7 +419,12 @@ extern int flash_banks; #define CFG_INIT_RAM_END CFG_OCM_DATA_SIZE /* End of used area in RAM */ #define CFG_GBL_DATA_SIZE 128 /* reserved bytes for initial data */ #define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE) -#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET +/* reserve some memory for BOOT limit info */ +#define CFG_INIT_SP_OFFSET (CFG_GBL_DATA_OFFSET - 16) + +#ifdef CONFIG_BOOTCOUNT_LIMIT /* reserve 2 word for bootcount limit */ +#define CFG_BOOTCOUNT_ADDR (CFG_GBL_DATA_OFFSET - 8) +#endif /* * Internal Definitions |