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authorDirk Eibach <dirk.eibach@gdsys.cc>2015-10-28 11:46:28 +0100
committerTom Rini <trini@konsulko.com>2015-11-12 15:59:04 -0500
commite1d1127a9a8547ad9a7bda14285e97d6cc4be6dd (patch)
treea5eeae2977d5eef76048e217a92c61c937dc8e26 /include
parentd054c2f8c6af6df672bbbb524252c4f5c1d4bf45 (diff)
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dlvision-10g: Support displayport
Support dlvision-10g hardware with displayport output. Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Diffstat (limited to 'include')
-rw-r--r--include/configs/dlvision-10g.h18
1 files changed, 13 insertions, 5 deletions
diff --git a/include/configs/dlvision-10g.h b/include/configs/dlvision-10g.h
index 0b804eb..b614f19 100644
--- a/include/configs/dlvision-10g.h
+++ b/include/configs/dlvision-10g.h
@@ -67,7 +67,7 @@
#undef CONFIG_CMD_DHCP
#undef CONFIG_CMD_DIAG
#undef CONFIG_CMD_EEPROM
-#undef CONFIG_CMD_I2C
+#define CONFIG_CMD_I2C
#undef CONFIG_CMD_IRQ
/*
@@ -105,17 +105,22 @@
#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
#define CONFIG_SYS_I2C_IHS
+#define CONFIG_SYS_I2C_IHS_DUAL
#define CONFIG_SYS_I2C_IHS_CH0
#define CONFIG_SYS_I2C_IHS_SPEED_0 50000
#define CONFIG_SYS_I2C_IHS_SLAVE_0 0x7F
+#define CONFIG_SYS_I2C_IHS_SPEED_0_1 50000
+#define CONFIG_SYS_I2C_IHS_SLAVE_0_1 0x7F
#define CONFIG_SYS_I2C_IHS_CH1
#define CONFIG_SYS_I2C_IHS_SPEED_1 50000
#define CONFIG_SYS_I2C_IHS_SLAVE_1 0x7F
+#define CONFIG_SYS_I2C_IHS_SPEED_1_1 50000
+#define CONFIG_SYS_I2C_IHS_SLAVE_1_1 0x7F
-#define CONFIG_SYS_SPD_BUS_NUM 2
+#define CONFIG_SYS_SPD_BUS_NUM 4
/* Temp sensor/hwmon/dtt */
-#define CONFIG_SYS_DTT_BUS_NUM 2
+#define CONFIG_SYS_DTT_BUS_NUM 4
#define CONFIG_DTT_LM63 1 /* National LM63 */
#define CONFIG_DTT_SENSORS { 0x4c, 0x4e, 0x18 } /* Sensor addresses */
#define CONFIG_DTT_PWM_LOOKUPTABLE \
@@ -123,8 +128,9 @@
{ 54, 27 }, { 56, 31 }, { 58, 36 }, { 60, 40 } }
#define CONFIG_DTT_TACH_LIMIT 0xa10
-#define CONFIG_SYS_ICS8N3QV01_I2C {0, 1}
-#define CONFIG_SYS_SIL1178_I2C {0, 1}
+#define CONFIG_SYS_ICS8N3QV01_I2C {1, 3}
+#define CONFIG_SYS_SIL1178_I2C {0, 2}
+#define CONFIG_SYS_DP501_I2C {0, 2}
/* EBC peripherals */
@@ -327,5 +333,7 @@
*/
#define CONFIG_SYS_MPC92469AC
#define CONFIG_SYS_OSD_SCREENS CONFIG_SYS_FPGA_COUNT
+#define CONFIG_SYS_DP501_DIFFERENTIAL
+#define CONFIG_SYS_DP501_VCAPCTRL0 0x01 /* DDR mode 0, DE for H/VSYNC */
#endif /* __CONFIG_H */