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authorHaavard Skinnemoen <haavard.skinnemoen@atmel.com>2009-02-23 10:34:46 +0100
committerHaavard Skinnemoen <haavard.skinnemoen@atmel.com>2009-02-23 10:34:46 +0100
commit7d3921bffb498d065785c17b4a42480db54a2676 (patch)
tree16409a328b62784d8427ca23f2812a620aad9991 /include
parent156feb90d200f186cdfd856d7f6f1878bb1bec1e (diff)
parentb423f94063bf04e92047ff85c7e53441eb3b712b (diff)
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Merge branch 'evk1100-prep' into next
Diffstat (limited to 'include')
-rw-r--r--include/asm-avr32/arch-at32ap700x/addrspace.h (renamed from include/asm-avr32/addrspace.h)38
-rw-r--r--include/asm-avr32/arch-at32ap700x/gpio-impl.h86
-rw-r--r--include/asm-avr32/arch-common/portmux-gpio.h83
-rw-r--r--include/asm-avr32/dma-mapping.h2
-rw-r--r--include/asm-avr32/io.h39
5 files changed, 129 insertions, 119 deletions
diff --git a/include/asm-avr32/addrspace.h b/include/asm-avr32/arch-at32ap700x/addrspace.h
index b2ba1ee..409eee3 100644
--- a/include/asm-avr32/addrspace.h
+++ b/include/asm-avr32/arch-at32ap700x/addrspace.h
@@ -22,6 +22,8 @@
#ifndef __ASM_AVR32_ADDRSPACE_H
#define __ASM_AVR32_ADDRSPACE_H
+#include <asm/types.h>
+
/* Memory segments when segmentation is enabled */
#define P0SEG 0x00000000
#define P1SEG 0x80000000
@@ -43,4 +45,40 @@
#define P3SEGADDR(a) ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P3SEG))
#define P4SEGADDR(a) ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P4SEG))
+/* virt_to_phys will only work when address is in P1 or P2 */
+static inline unsigned long virt_to_phys(volatile void *address)
+{
+ return PHYSADDR(address);
+}
+
+static inline void * phys_to_virt(unsigned long address)
+{
+ return (void *)P1SEGADDR(address);
+}
+
+#define cached(addr) ((void *)P1SEGADDR(addr))
+#define uncached(addr) ((void *)P2SEGADDR(addr))
+
+/*
+ * Given a physical address and a length, return a virtual address
+ * that can be used to access the memory range with the caching
+ * properties specified by "flags".
+ *
+ * This implementation works for memory below 512MiB (flash, etc.) as
+ * well as above 3.5GiB (internal peripherals.)
+ */
+#define MAP_NOCACHE (0)
+#define MAP_WRCOMBINE (1 << 7)
+#define MAP_WRBACK (MAP_WRCOMBINE | (1 << 9))
+#define MAP_WRTHROUGH (MAP_WRBACK | (1 << 0))
+
+static inline void *
+map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags)
+{
+ if (flags == MAP_WRBACK)
+ return (void *)P1SEGADDR(paddr);
+ else
+ return (void *)P2SEGADDR(paddr);
+}
+
#endif /* __ASM_AVR32_ADDRSPACE_H */
diff --git a/include/asm-avr32/arch-at32ap700x/gpio-impl.h b/include/asm-avr32/arch-at32ap700x/gpio-impl.h
new file mode 100644
index 0000000..8801bd0
--- /dev/null
+++ b/include/asm-avr32/arch-at32ap700x/gpio-impl.h
@@ -0,0 +1,86 @@
+#ifndef __ASM_AVR32_ARCH_GPIO_IMPL_H__
+#define __ASM_AVR32_ARCH_GPIO_IMPL_H__
+
+/* Register offsets */
+struct gpio_regs {
+ u32 GPER;
+ u32 GPERS;
+ u32 GPERC;
+ u32 GPERT;
+ u32 PMR0;
+ u32 PMR0S;
+ u32 PMR0C;
+ u32 PMR0T;
+ u32 PMR1;
+ u32 PMR1S;
+ u32 PMR1C;
+ u32 PMR1T;
+ u32 __reserved0[4];
+ u32 ODER;
+ u32 ODERS;
+ u32 ODERC;
+ u32 ODERT;
+ u32 OVR;
+ u32 OVRS;
+ u32 OVRC;
+ u32 OVRT;
+ u32 PVR;
+ u32 __reserved_PVRS;
+ u32 __reserved_PVRC;
+ u32 __reserved_PVRT;
+ u32 PUER;
+ u32 PUERS;
+ u32 PUERC;
+ u32 PUERT;
+ u32 PDER;
+ u32 PDERS;
+ u32 PDERC;
+ u32 PDERT;
+ u32 IER;
+ u32 IERS;
+ u32 IERC;
+ u32 IERT;
+ u32 IMR0;
+ u32 IMR0S;
+ u32 IMR0C;
+ u32 IMR0T;
+ u32 IMR1;
+ u32 IMR1S;
+ u32 IMR1C;
+ u32 IMR1T;
+ u32 GFER;
+ u32 GFERS;
+ u32 GFERC;
+ u32 GFERT;
+ u32 IFR;
+ u32 __reserved_IFRS;
+ u32 IFRC;
+ u32 __reserved_IFRT;
+ u32 ODMER;
+ u32 ODMERS;
+ u32 ODMERC;
+ u32 ODMERT;
+ u32 __reserved1[4];
+ u32 ODCR0;
+ u32 ODCR0S;
+ u32 ODCR0C;
+ u32 ODCR0T;
+ u32 ODCR1;
+ u32 ODCR1S;
+ u32 ODCR1C;
+ u32 ODCR1T;
+ u32 __reserved2[4];
+ u32 OSRR0;
+ u32 OSRR0S;
+ u32 OSRR0C;
+ u32 OSRR0T;
+ u32 __reserved3[8];
+ u32 STER;
+ u32 STERS;
+ u32 STERC;
+ u32 STERT;
+ u32 __reserved4[35];
+ u32 VERSION;
+};
+
+#endif /* __ASM_AVR32_ARCH_GPIO_IMPL_H__ */
diff --git a/include/asm-avr32/arch-common/portmux-gpio.h b/include/asm-avr32/arch-common/portmux-gpio.h
index 24943ec..1306cbe 100644
--- a/include/asm-avr32/arch-common/portmux-gpio.h
+++ b/include/asm-avr32/arch-common/portmux-gpio.h
@@ -24,87 +24,8 @@
#include <asm/io.h>
-/* Register offsets */
-struct gpio_regs {
- u32 GPER;
- u32 GPERS;
- u32 GPERC;
- u32 GPERT;
- u32 PMR0;
- u32 PMR0S;
- u32 PMR0C;
- u32 PMR0T;
- u32 PMR1;
- u32 PMR1S;
- u32 PMR1C;
- u32 PMR1T;
- u32 __reserved0[4];
- u32 ODER;
- u32 ODERS;
- u32 ODERC;
- u32 ODERT;
- u32 OVR;
- u32 OVRS;
- u32 OVRC;
- u32 OVRT;
- u32 PVR;
- u32 __reserved_PVRS;
- u32 __reserved_PVRC;
- u32 __reserved_PVRT;
- u32 PUER;
- u32 PUERS;
- u32 PUERC;
- u32 PUERT;
- u32 PDER;
- u32 PDERS;
- u32 PDERC;
- u32 PDERT;
- u32 IER;
- u32 IERS;
- u32 IERC;
- u32 IERT;
- u32 IMR0;
- u32 IMR0S;
- u32 IMR0C;
- u32 IMR0T;
- u32 IMR1;
- u32 IMR1S;
- u32 IMR1C;
- u32 IMR1T;
- u32 GFER;
- u32 GFERS;
- u32 GFERC;
- u32 GFERT;
- u32 IFR;
- u32 __reserved_IFRS;
- u32 IFRC;
- u32 __reserved_IFRT;
- u32 ODMER;
- u32 ODMERS;
- u32 ODMERC;
- u32 ODMERT;
- u32 __reserved1[4];
- u32 ODCR0;
- u32 ODCR0S;
- u32 ODCR0C;
- u32 ODCR0T;
- u32 ODCR1;
- u32 ODCR1S;
- u32 ODCR1C;
- u32 ODCR1T;
- u32 __reserved2[4];
- u32 OSRR0;
- u32 OSRR0S;
- u32 OSRR0C;
- u32 OSRR0T;
- u32 __reserved3[8];
- u32 STER;
- u32 STERS;
- u32 STERC;
- u32 STERT;
- u32 __reserved4[35];
- u32 VERSION;
-};
+/* Register layout for this specific device */
+#include <asm/arch/gpio-impl.h>
/* Register access macros */
#define gpio_readl(port, reg) \
diff --git a/include/asm-avr32/dma-mapping.h b/include/asm-avr32/dma-mapping.h
index 3b46fa3..0be7804 100644
--- a/include/asm-avr32/dma-mapping.h
+++ b/include/asm-avr32/dma-mapping.h
@@ -23,7 +23,7 @@
#define __ASM_AVR32_DMA_MAPPING_H
#include <asm/io.h>
-#include <asm/cacheflush.h>
+#include <asm/arch/cacheflush.h>
enum dma_data_direction {
DMA_BIDIRECTIONAL = 0,
diff --git a/include/asm-avr32/io.h b/include/asm-avr32/io.h
index 50967ac..1cb17ea 100644
--- a/include/asm-avr32/io.h
+++ b/include/asm-avr32/io.h
@@ -73,21 +73,8 @@ extern void __readwrite_bug(const char *fn);
#define inw(p) ({ unsigned int __v = __le16_to_cpu(__raw_readw(p)); __v; })
#define inl(p) ({ unsigned int __v = __le32_to_cpu(__raw_readl(p)); __v; })
-#include <asm/addrspace.h>
-
-/* virt_to_phys will only work when address is in P1 or P2 */
-static inline phys_addr_t virt_to_phys(volatile void *address)
-{
- return PHYSADDR(address);
-}
-
-static inline void *phys_to_virt(phys_addr_t address)
-{
- return (void *)P1SEGADDR(address);
-}
-
-#define cached(addr) ((void *)P1SEGADDR(addr))
-#define uncached(addr) ((void *)P2SEGADDR(addr))
+#include <asm/arch/addrspace.h>
+/* Provides virt_to_phys, phys_to_virt, cached, uncached, map_physmem */
#endif /* __KERNEL__ */
@@ -96,28 +83,6 @@ static inline void sync(void)
}
/*
- * Given a physical address and a length, return a virtual address
- * that can be used to access the memory range with the caching
- * properties specified by "flags".
- *
- * This implementation works for memory below 512MiB (flash, etc.) as
- * well as above 3.5GiB (internal peripherals.)
- */
-#define MAP_NOCACHE (0)
-#define MAP_WRCOMBINE (1 << 7)
-#define MAP_WRBACK (MAP_WRCOMBINE | (1 << 9))
-#define MAP_WRTHROUGH (MAP_WRBACK | (1 << 0))
-
-static inline void *
-map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags)
-{
- if (flags == MAP_WRBACK)
- return (void *)P1SEGADDR(paddr);
- else
- return (void *)P2SEGADDR(paddr);
-}
-
-/*
* Take down a mapping set up by map_physmem().
*/
static inline void unmap_physmem(void *vaddr, unsigned long len)