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authorPriyanka Jain <Priyanka.Jain@freescale.com>2013-07-02 09:21:04 +0530
committerYork Sun <yorksun@freescale.com>2013-08-09 12:41:40 -0700
commit64501c669851e45dd47699349dae6b5798c075a3 (patch)
tree9ac713a2c30d740ea29a0888d9ca357b89db1ed3 /include
parent17b8614754e9adc531d3f1bc3db66bf680a09447 (diff)
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board/bsc9132qds: Add DSP side tlb and laws
BSC9132QDS is a Freescale Reference Design Board for BSC9132 SoC which is a integrated device that contains two powerpc e500v2 cores and two DSP starcores. To support DSP starcore -Creating LAW and TLB for DSP-CCSR space. -Creating LAW for DSP-core subsystem M2 and M3 memory -Creating LAW for 1GB DDR which is connected exclusively to DSP-cores Signed-off-by: Manish Jaggi <manish.jaggi@freescale.com> Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com> Acked-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'include')
-rw-r--r--include/configs/BSC9132QDS.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/include/configs/BSC9132QDS.h b/include/configs/BSC9132QDS.h
index 1ab6891..03f3a4f 100644
--- a/include/configs/BSC9132QDS.h
+++ b/include/configs/BSC9132QDS.h
@@ -224,6 +224,10 @@ combinations. this should be removed later
#define CONFIG_SYS_IMMR CONFIG_SYS_CCSRBAR
+/* DSP CCSRBAR */
+#define CONFIG_SYS_FSL_DSP_CCSRBAR CONFIG_SYS_FSL_DSP_CCSRBAR_DEFAULT
+#define CONFIG_SYS_FSL_DSP_CCSRBAR_PHYS CONFIG_SYS_FSL_DSP_CCSRBAR_DEFAULT
+
/*
* IFC Definitions
*/