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authorWolfgang Denk <wd@denx.de>2009-01-23 22:48:06 +0100
committerWolfgang Denk <wd@denx.de>2009-01-23 22:48:06 +0100
commit5df70e91c72dab45b7d81e4568b12e5a5b5f90ec (patch)
tree730f833cff2474959195b5cd23e52954410218a5 /include
parent1ca1d3c866709635fc082b0140e02257a742316c (diff)
parentd4bade8d77aa20e2846fa4accff0e7fa7961a134 (diff)
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Merge branch 'master' of git://git.denx.de/u-boot-nand-flash
Diffstat (limited to 'include')
-rw-r--r--include/configs/ASH405.h1
-rw-r--r--include/configs/CATcenter.h1
-rw-r--r--include/configs/CMS700.h1
-rw-r--r--include/configs/DU440.h1
-rw-r--r--include/configs/G2000.h1
-rw-r--r--include/configs/HH405.h1
-rw-r--r--include/configs/HUB405.h1
-rw-r--r--include/configs/IDS8247.h1
-rw-r--r--include/configs/M5329EVB.h1
-rw-r--r--include/configs/M5373EVB.h1
-rw-r--r--include/configs/MPC8313ERDB.h1
-rw-r--r--include/configs/MPC8315ERDB.h11
-rw-r--r--include/configs/MPC8360ERDK.h1
-rw-r--r--include/configs/MPC837XEMDS.h1
-rw-r--r--include/configs/MPC8536DS.h1
-rw-r--r--include/configs/MPC8572DS.h1
-rw-r--r--include/configs/NC650.h1
-rw-r--r--include/configs/NETPHONE.h1
-rw-r--r--include/configs/NETTA.h1
-rw-r--r--include/configs/NETTA2.h1
-rw-r--r--include/configs/NETVIA.h1
-rw-r--r--include/configs/PLU405.h1
-rw-r--r--include/configs/PMC440.h1
-rw-r--r--include/configs/PPChameleonEVB.h2
-rw-r--r--include/configs/SXNI855T.h1
-rw-r--r--include/configs/TQM8272.h1
-rw-r--r--include/configs/TQM85xx.h1
-rw-r--r--include/configs/VCMA9.h1
-rw-r--r--include/configs/VOH405.h1
-rw-r--r--include/configs/WUH405.h1
-rw-r--r--include/configs/acadia.h1
-rw-r--r--include/configs/afeb9260.h1
-rw-r--r--include/configs/alpr.h1
-rw-r--r--include/configs/at91cap9adk.h1
-rw-r--r--include/configs/at91rm9200dk.h1
-rw-r--r--include/configs/at91sam9260ek.h1
-rw-r--r--include/configs/at91sam9261ek.h1
-rw-r--r--include/configs/at91sam9263ek.h1
-rw-r--r--include/configs/at91sam9rlek.h1
-rw-r--r--include/configs/bamboo.h1
-rw-r--r--include/configs/bf537-stamp.h1
-rw-r--r--include/configs/canyonlands.h1
-rw-r--r--include/configs/csb637.h1
-rw-r--r--include/configs/davinci_dvevm.h1
-rw-r--r--include/configs/davinci_schmoogie.h1
-rw-r--r--include/configs/davinci_sffsdr.h1
-rw-r--r--include/configs/davinci_sonata.h1
-rw-r--r--include/configs/delta.h1
-rw-r--r--include/configs/kilauea.h1
-rw-r--r--include/configs/netstar.h1
-rw-r--r--include/configs/omap2420h4.h1
-rw-r--r--include/configs/pdnb3.h1
-rw-r--r--include/configs/quad100hd.h1
-rw-r--r--include/configs/sbc2410x.h1
-rw-r--r--include/configs/sc3.h1
-rw-r--r--include/configs/sequoia.h1
-rw-r--r--include/configs/smdk6400.h1
-rw-r--r--include/configs/socrates.h1
-rw-r--r--include/configs/stxxtc.h1
-rw-r--r--include/configs/zylonite.h1
-rw-r--r--include/linux/mtd/bbm.h8
-rw-r--r--include/linux/mtd/nand.h9
-rw-r--r--include/linux/mtd/nand_legacy.h5
-rw-r--r--include/linux/mtd/onenand.h45
-rw-r--r--include/linux/mtd/onenand_regs.h1
-rw-r--r--include/nand.h2
-rw-r--r--include/onenand_uboot.h14
67 files changed, 54 insertions, 101 deletions
diff --git a/include/configs/ASH405.h b/include/configs/ASH405.h
index a694083..a11a9b8 100644
--- a/include/configs/ASH405.h
+++ b/include/configs/ASH405.h
@@ -150,7 +150,6 @@
*-----------------------------------------------------------------------
*/
#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE }
-#define NAND_MAX_CHIPS 1
#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
#define NAND_BIG_DELAY_US 25
diff --git a/include/configs/CATcenter.h b/include/configs/CATcenter.h
index a44f3e1..1e36660 100644
--- a/include/configs/CATcenter.h
+++ b/include/configs/CATcenter.h
@@ -219,7 +219,6 @@
#define NAND_ChipID_UNKNOWN 0x00
#define NAND_MAX_FLOORS 1
-#define NAND_MAX_CHIPS 1
#define CONFIG_SYS_NAND0_CE (0x80000000 >> 1) /* our CE is GPIO1 */
#define CONFIG_SYS_NAND0_CLE (0x80000000 >> 2) /* our CLE is GPIO2 */
diff --git a/include/configs/CMS700.h b/include/configs/CMS700.h
index d0e2464..eebce38 100644
--- a/include/configs/CMS700.h
+++ b/include/configs/CMS700.h
@@ -157,7 +157,6 @@
*-----------------------------------------------------------------------
*/
#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE }
-#define NAND_MAX_CHIPS 1
#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
#define NAND_BIG_DELAY_US 25
diff --git a/include/configs/DU440.h b/include/configs/DU440.h
index 729153c..85c0e61 100644
--- a/include/configs/DU440.h
+++ b/include/configs/DU440.h
@@ -411,7 +411,6 @@ int du440_phy_addr(int devnum);
* NAND FLASH
*/
#define CONFIG_SYS_MAX_NAND_DEVICE 2
-#define NAND_MAX_CHIPS CONFIG_SYS_MAX_NAND_DEVICE
#define CONFIG_SYS_NAND_SELECT_DEVICE 1 /* nand driver supports mutipl. chips */
#define CONFIG_SYS_NAND_BASE_LIST {CONFIG_SYS_NAND0_ADDR + CONFIG_SYS_NAND0_CS, \
CONFIG_SYS_NAND1_ADDR + CONFIG_SYS_NAND1_CS}
diff --git a/include/configs/G2000.h b/include/configs/G2000.h
index d299044..b445fae 100644
--- a/include/configs/G2000.h
+++ b/include/configs/G2000.h
@@ -205,7 +205,6 @@
#define NAND_ChipID_UNKNOWN 0x00
#define NAND_MAX_FLOORS 1
-#define NAND_MAX_CHIPS 1
#define CONFIG_SYS_NAND_CE (0x80000000 >> 1) /* our CE is GPIO1 */
#define CONFIG_SYS_NAND_CLE (0x80000000 >> 2) /* our CLE is GPIO2 */
diff --git a/include/configs/HH405.h b/include/configs/HH405.h
index 80e59bb..e5de8ef 100644
--- a/include/configs/HH405.h
+++ b/include/configs/HH405.h
@@ -209,7 +209,6 @@
*-----------------------------------------------------------------------
*/
#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE }
-#define NAND_MAX_CHIPS 1
#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
#define NAND_BIG_DELAY_US 25
diff --git a/include/configs/HUB405.h b/include/configs/HUB405.h
index b3c7046..1106b0d 100644
--- a/include/configs/HUB405.h
+++ b/include/configs/HUB405.h
@@ -149,7 +149,6 @@
*-----------------------------------------------------------------------
*/
#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE }
-#define NAND_MAX_CHIPS 1
#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
#define NAND_BIG_DELAY_US 25
diff --git a/include/configs/IDS8247.h b/include/configs/IDS8247.h
index a610ac9..fbcbddb 100644
--- a/include/configs/IDS8247.h
+++ b/include/configs/IDS8247.h
@@ -275,7 +275,6 @@
#define NAND_ChipID_UNKNOWN 0x00
#define NAND_MAX_FLOORS 1
-#define NAND_MAX_CHIPS 1
#define NAND_DISABLE_CE(nand) do \
{ \
diff --git a/include/configs/M5329EVB.h b/include/configs/M5329EVB.h
index c207947..1f1586a 100644
--- a/include/configs/M5329EVB.h
+++ b/include/configs/M5329EVB.h
@@ -215,7 +215,6 @@
# define CONFIG_SYS_NAND_BASE CONFIG_SYS_CS2_BASE
# define CONFIG_SYS_NAND_SIZE 1
# define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE }
-# define NAND_MAX_CHIPS 1
# define NAND_ALLOW_ERASE_ALL 1
# define CONFIG_JFFS2_NAND 1
# define CONFIG_JFFS2_DEV "nand0"
diff --git a/include/configs/M5373EVB.h b/include/configs/M5373EVB.h
index a1bc32a..1991687 100644
--- a/include/configs/M5373EVB.h
+++ b/include/configs/M5373EVB.h
@@ -215,7 +215,6 @@
# define CONFIG_SYS_NAND_BASE CONFIG_SYS_CS2_BASE
# define CONFIG_SYS_NAND_SIZE 1
# define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE }
-# define NAND_MAX_CHIPS 1
# define NAND_ALLOW_ERASE_ALL 1
# define CONFIG_JFFS2_NAND 1
# define CONFIG_JFFS2_DEV "nand0"
diff --git a/include/configs/MPC8313ERDB.h b/include/configs/MPC8313ERDB.h
index fc3fa13..58a26e1 100644
--- a/include/configs/MPC8313ERDB.h
+++ b/include/configs/MPC8313ERDB.h
@@ -232,7 +232,6 @@
#endif
#define CONFIG_SYS_MAX_NAND_DEVICE 1
-#define NAND_MAX_CHIPS 1
#define CONFIG_MTD_NAND_VERIFY_WRITE
#define CONFIG_CMD_NAND 1
#define CONFIG_NAND_FSL_ELBC 1
diff --git a/include/configs/MPC8315ERDB.h b/include/configs/MPC8315ERDB.h
index add65f0..e4ada65 100644
--- a/include/configs/MPC8315ERDB.h
+++ b/include/configs/MPC8315ERDB.h
@@ -166,7 +166,7 @@
#undef CONFIG_SYS_RAMBOOT
#endif
-#define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* Reserve 256 kB for Mon */
+#define CONFIG_SYS_MONITOR_LEN (384 * 1024) /* Reserve 384 kB for Mon */
#define CONFIG_SYS_MALLOC_LEN (512 * 1024) /* Reserved for malloc */
/*
@@ -223,15 +223,16 @@
*/
#define CONFIG_SYS_NAND_BASE 0xE0600000 /* 0xE0600000 */
#define CONFIG_SYS_MAX_NAND_DEVICE 1
-#define NAND_MAX_CHIPS 1
-#define CONFIG_MTD_NAND_VERIFY_WRITE
+#define CONFIG_MTD_NAND_VERIFY_WRITE 1
+#define CONFIG_CMD_NAND 1
+#define CONFIG_NAND_FSL_ELBC 1
-#define CONFIG_SYS_BR1_PRELIM ( CONFIG_SYS_NAND_BASE \
+#define CONFIG_SYS_BR1_PRELIM ( CONFIG_SYS_NAND_BASE \
| (2<<BR_DECC_SHIFT) /* Use HW ECC */ \
| BR_PS_8 /* Port Size = 8 bit */ \
| BR_MS_FCM /* MSEL = FCM */ \
| BR_V ) /* valid */
-#define CONFIG_SYS_OR1_PRELIM ( 0xFFFF8000 /* length 32K */ \
+#define CONFIG_SYS_OR1_PRELIM ( 0xFFFF8000 /* length 32K */ \
| OR_FCM_CSCT \
| OR_FCM_CST \
| OR_FCM_CHT \
diff --git a/include/configs/MPC8360ERDK.h b/include/configs/MPC8360ERDK.h
index a4f2862..c20f86a 100644
--- a/include/configs/MPC8360ERDK.h
+++ b/include/configs/MPC8360ERDK.h
@@ -211,7 +211,6 @@
#define CONFIG_CMD_NAND 1
#define CONFIG_NAND_FSL_UPM 1
#define CONFIG_SYS_MAX_NAND_DEVICE 1
-#define NAND_MAX_CHIPS 1
#define CONFIG_MTD_NAND_VERIFY_WRITE
#define CONFIG_SYS_LBLAWBAR1_PRELIM CONFIG_SYS_NAND_BASE
diff --git a/include/configs/MPC837XEMDS.h b/include/configs/MPC837XEMDS.h
index d49155f..dbffb71 100644
--- a/include/configs/MPC837XEMDS.h
+++ b/include/configs/MPC837XEMDS.h
@@ -271,7 +271,6 @@
#define CONFIG_CMD_NAND 1
#define CONFIG_MTD_NAND_VERIFY_WRITE 1
#define CONFIG_SYS_MAX_NAND_DEVICE 1
-#define NAND_MAX_CHIPS 1
#define CONFIG_NAND_FSL_ELBC 1
#define CONFIG_SYS_NAND_BASE 0xE0600000 /* 0xE0600000 */
diff --git a/include/configs/MPC8536DS.h b/include/configs/MPC8536DS.h
index 532c3df..505c48b 100644
--- a/include/configs/MPC8536DS.h
+++ b/include/configs/MPC8536DS.h
@@ -248,7 +248,6 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy);
CONFIG_SYS_NAND_BASE + 0x80000, \
CONFIG_SYS_NAND_BASE + 0xC0000}
#define CONFIG_SYS_MAX_NAND_DEVICE 4
-#define NAND_MAX_CHIPS 1
#define CONFIG_MTD_NAND_VERIFY_WRITE
#define CONFIG_CMD_NAND 1
#define CONFIG_NAND_FSL_ELBC 1
diff --git a/include/configs/MPC8572DS.h b/include/configs/MPC8572DS.h
index 6c7a364..f84cc7e 100644
--- a/include/configs/MPC8572DS.h
+++ b/include/configs/MPC8572DS.h
@@ -267,7 +267,6 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy);
CONFIG_SYS_NAND_BASE + 0x80000,\
CONFIG_SYS_NAND_BASE + 0xC0000}
#define CONFIG_SYS_MAX_NAND_DEVICE 4
-#define NAND_MAX_CHIPS 1
#define CONFIG_MTD_NAND_VERIFY_WRITE
#define CONFIG_CMD_NAND 1
#define CONFIG_NAND_FSL_ELBC 1
diff --git a/include/configs/NC650.h b/include/configs/NC650.h
index 423ca71..0b97f0c 100644
--- a/include/configs/NC650.h
+++ b/include/configs/NC650.h
@@ -250,7 +250,6 @@
* NAND flash support
*/
#define CONFIG_SYS_MAX_NAND_DEVICE 1
-#define NAND_MAX_CHIPS 1
/*-----------------------------------------------------------------------
* SYPCR - System Protection Control 11-9
diff --git a/include/configs/NETPHONE.h b/include/configs/NETPHONE.h
index 34de947..2d04d89 100644
--- a/include/configs/NETPHONE.h
+++ b/include/configs/NETPHONE.h
@@ -514,7 +514,6 @@
#define ADDR_COLUMN_PAGE 3
#define NAND_ChipID_UNKNOWN 0x00
#define NAND_MAX_FLOORS 1
-#define NAND_MAX_CHIPS 1
/* ALE = PD17, CLE = PE18, CE = PE20, F_RY_BY = PE31 */
#define NAND_DISABLE_CE(nand) \
diff --git a/include/configs/NETTA.h b/include/configs/NETTA.h
index 004b3c8..34fdba5 100644
--- a/include/configs/NETTA.h
+++ b/include/configs/NETTA.h
@@ -633,7 +633,6 @@
#define ADDR_COLUMN_PAGE 3
#define NAND_ChipID_UNKNOWN 0x00
#define NAND_MAX_FLOORS 1
-#define NAND_MAX_CHIPS 1
/* ALE = PD3, CLE = PD4, CE = PD5, F_RY_BY = PC13 */
#define NAND_DISABLE_CE(nand) \
diff --git a/include/configs/NETTA2.h b/include/configs/NETTA2.h
index 70995fa..4a27027 100644
--- a/include/configs/NETTA2.h
+++ b/include/configs/NETTA2.h
@@ -515,7 +515,6 @@
#define ADDR_COLUMN_PAGE 3
#define NAND_ChipID_UNKNOWN 0x00
#define NAND_MAX_FLOORS 1
-#define NAND_MAX_CHIPS 1
/* ALE = PD17, CLE = PE18, CE = PE20, F_RY_BY = PE31 */
#define NAND_DISABLE_CE(nand) \
diff --git a/include/configs/NETVIA.h b/include/configs/NETVIA.h
index 87c920f..f97bdcb 100644
--- a/include/configs/NETVIA.h
+++ b/include/configs/NETVIA.h
@@ -411,7 +411,6 @@
#define ADDR_COLUMN_PAGE 3
#define NAND_ChipID_UNKNOWN 0x00
#define NAND_MAX_FLOORS 1
-#define NAND_MAX_CHIPS 1
#define NAND_DISABLE_CE(nand) \
do { \
diff --git a/include/configs/PLU405.h b/include/configs/PLU405.h
index 11ce008..e9f1646 100644
--- a/include/configs/PLU405.h
+++ b/include/configs/PLU405.h
@@ -173,7 +173,6 @@
* NAND-FLASH stuff
*/
#define CONFIG_SYS_NAND_BASE_LIST {CONFIG_SYS_NAND_BASE}
-#define NAND_MAX_CHIPS 1
#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
#define NAND_BIG_DELAY_US 25
diff --git a/include/configs/PMC440.h b/include/configs/PMC440.h
index f9f1002..fc48bc1 100644
--- a/include/configs/PMC440.h
+++ b/include/configs/PMC440.h
@@ -505,7 +505,6 @@
* NAND FLASH
*----------------------------------------------------------------------*/
#define CONFIG_SYS_MAX_NAND_DEVICE 1
-#define NAND_MAX_CHIPS 1
#define CONFIG_SYS_NAND_BASE (CONFIG_SYS_NAND_ADDR + CONFIG_SYS_NAND_CS)
#define CONFIG_SYS_NAND_SELECT_DEVICE 1 /* nand driver supports mutipl. chips */
#define CONFIG_SYS_NAND_QUIET_TEST 1
diff --git a/include/configs/PPChameleonEVB.h b/include/configs/PPChameleonEVB.h
index 09a9641..d4322b6 100644
--- a/include/configs/PPChameleonEVB.h
+++ b/include/configs/PPChameleonEVB.h
@@ -224,8 +224,6 @@
#define NAND_BIG_DELAY_US 25
#define CONFIG_SYS_MAX_NAND_DEVICE 2 /* Max number of NAND devices */
-#define NAND_MAX_CHIPS 1
-
#define CONFIG_SYS_NAND0_CE (0x80000000 >> 1) /* our CE is GPIO1 */
#define CONFIG_SYS_NAND0_RDY (0x80000000 >> 4) /* our RDY is GPIO4 */
#define CONFIG_SYS_NAND0_CLE (0x80000000 >> 2) /* our CLE is GPIO2 */
diff --git a/include/configs/SXNI855T.h b/include/configs/SXNI855T.h
index 7fc455b..9857bf6 100644
--- a/include/configs/SXNI855T.h
+++ b/include/configs/SXNI855T.h
@@ -206,7 +206,6 @@
#define NAND_ChipID_UNKNOWN 0x00
#define NAND_MAX_FLOORS 1
-#define NAND_MAX_CHIPS 1
/* DFBUSY is available on Port C, bit 12; 0 if busy */
#define NAND_WAIT_READY(nand) \
diff --git a/include/configs/TQM8272.h b/include/configs/TQM8272.h
index 1915a73..9cac696 100644
--- a/include/configs/TQM8272.h
+++ b/include/configs/TQM8272.h
@@ -424,7 +424,6 @@
#define CONFIG_SYS_NAND3_BASE (CONFIG_SYS_NAND2_BASE + CONFIG_SYS_NAND_CS_DIST)
#define CONFIG_SYS_MAX_NAND_DEVICE 4 /* Max number of NAND devices */
-#define NAND_MAX_CHIPS 1
#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND0_BASE, \
CONFIG_SYS_NAND1_BASE, \
diff --git a/include/configs/TQM85xx.h b/include/configs/TQM85xx.h
index 6d205a7..f5831eb 100644
--- a/include/configs/TQM85xx.h
+++ b/include/configs/TQM85xx.h
@@ -363,7 +363,6 @@
#define CONFIG_SYS_NAND3_BASE (CONFIG_SYS_NAND2_BASE + CONFIG_SYS_NAND_CS_DIST)
#define CONFIG_SYS_MAX_NAND_DEVICE 2 /* Max number of NAND devices */
-#define NAND_MAX_CHIPS 1
#if (CONFIG_SYS_MAX_NAND_DEVICE == 1)
#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND0_BASE }
diff --git a/include/configs/VCMA9.h b/include/configs/VCMA9.h
index 0bc2f68..83d0d56 100644
--- a/include/configs/VCMA9.h
+++ b/include/configs/VCMA9.h
@@ -264,7 +264,6 @@
#define NAND_ChipID_UNKNOWN 0x00
#define NAND_MAX_FLOORS 1
-#define NAND_MAX_CHIPS 1
#define NAND_WAIT_READY(nand) NF_WaitRB()
diff --git a/include/configs/VOH405.h b/include/configs/VOH405.h
index 10ef620..f173bcc 100644
--- a/include/configs/VOH405.h
+++ b/include/configs/VOH405.h
@@ -159,7 +159,6 @@
*-----------------------------------------------------------------------
*/
#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE }
-#define NAND_MAX_CHIPS 1
#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
#define NAND_BIG_DELAY_US 25
diff --git a/include/configs/WUH405.h b/include/configs/WUH405.h
index 01cdf3a..de6e12f 100644
--- a/include/configs/WUH405.h
+++ b/include/configs/WUH405.h
@@ -147,7 +147,6 @@
*-----------------------------------------------------------------------
*/
#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE }
-#define NAND_MAX_CHIPS 1
#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
#define NAND_BIG_DELAY_US 25
diff --git a/include/configs/acadia.h b/include/configs/acadia.h
index 52ccdb5..9ffd86b 100644
--- a/include/configs/acadia.h
+++ b/include/configs/acadia.h
@@ -262,7 +262,6 @@
* NAND FLASH
*----------------------------------------------------------------------*/
#define CONFIG_SYS_MAX_NAND_DEVICE 1
-#define NAND_MAX_CHIPS 1
#define CONFIG_SYS_NAND_BASE (CONFIG_SYS_NAND_ADDR + CONFIG_SYS_NAND_CS)
#define CONFIG_SYS_NAND_SELECT_DEVICE 1 /* nand driver supports mutipl. chips */
diff --git a/include/configs/afeb9260.h b/include/configs/afeb9260.h
index d63a1a0..e996bbd 100644
--- a/include/configs/afeb9260.h
+++ b/include/configs/afeb9260.h
@@ -97,7 +97,6 @@
#define DATAFLASH_TCHS (0x1 << 24)
/* NAND flash */
-#define NAND_MAX_CHIPS 1
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_NAND_BASE 0x40000000
#define CONFIG_SYS_NAND_DBW_8 1
diff --git a/include/configs/alpr.h b/include/configs/alpr.h
index 7ce8205..e6248e9 100644
--- a/include/configs/alpr.h
+++ b/include/configs/alpr.h
@@ -335,7 +335,6 @@
* NAND-FLASH stuff
*-----------------------------------------------------------------------*/
#define CONFIG_SYS_MAX_NAND_DEVICE 4
-#define NAND_MAX_CHIPS CONFIG_SYS_MAX_NAND_DEVICE
#define CONFIG_SYS_NAND_BASE 0xF0000000 /* NAND FLASH Base Address */
#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE + 0, CONFIG_SYS_NAND_BASE + 2, \
CONFIG_SYS_NAND_BASE + 4, CONFIG_SYS_NAND_BASE + 6 }
diff --git a/include/configs/at91cap9adk.h b/include/configs/at91cap9adk.h
index b2baf1b..f1c5526 100644
--- a/include/configs/at91cap9adk.h
+++ b/include/configs/at91cap9adk.h
@@ -118,7 +118,6 @@
#define CONFIG_SYS_MAX_FLASH_BANKS 1
/* NAND flash */
-#define NAND_MAX_CHIPS 1
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_NAND_BASE 0x40000000
#define CONFIG_SYS_NAND_DBW_8 1
diff --git a/include/configs/at91rm9200dk.h b/include/configs/at91rm9200dk.h
index c7e83cc..5a980d3 100644
--- a/include/configs/at91rm9200dk.h
+++ b/include/configs/at91rm9200dk.h
@@ -129,7 +129,6 @@
#define NAND_ChipID_UNKNOWN 0x00
#define NAND_MAX_FLOORS 1
-#define NAND_MAX_CHIPS 1
#define AT91_SMART_MEDIA_ALE (1 << 22) /* our ALE is AD22 */
#define AT91_SMART_MEDIA_CLE (1 << 21) /* our CLE is AD21 */
diff --git a/include/configs/at91sam9260ek.h b/include/configs/at91sam9260ek.h
index 1538929..4501cae 100644
--- a/include/configs/at91sam9260ek.h
+++ b/include/configs/at91sam9260ek.h
@@ -100,7 +100,6 @@
#define DATAFLASH_TCHS (0x1 << 24)
/* NAND flash */
-#define NAND_MAX_CHIPS 1
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_NAND_BASE 0x40000000
#define CONFIG_SYS_NAND_DBW_8 1
diff --git a/include/configs/at91sam9261ek.h b/include/configs/at91sam9261ek.h
index 0016b4f..668fe3b 100644
--- a/include/configs/at91sam9261ek.h
+++ b/include/configs/at91sam9261ek.h
@@ -111,7 +111,6 @@
#define DATAFLASH_TCHS (0x1 << 24)
/* NAND flash */
-#define NAND_MAX_CHIPS 1
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_NAND_BASE 0x40000000
#define CONFIG_SYS_NAND_DBW_8 1
diff --git a/include/configs/at91sam9263ek.h b/include/configs/at91sam9263ek.h
index d9ebc87..c6603ff 100644
--- a/include/configs/at91sam9263ek.h
+++ b/include/configs/at91sam9263ek.h
@@ -123,7 +123,6 @@
#endif
/* NAND flash */
-#define NAND_MAX_CHIPS 1
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_NAND_BASE 0x40000000
#define CONFIG_SYS_NAND_DBW_8 1
diff --git a/include/configs/at91sam9rlek.h b/include/configs/at91sam9rlek.h
index 35fefc4..5bef1fe 100644
--- a/include/configs/at91sam9rlek.h
+++ b/include/configs/at91sam9rlek.h
@@ -104,7 +104,6 @@
#define CONFIG_SYS_NO_FLASH 1
/* NAND flash */
-#define NAND_MAX_CHIPS 1
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_NAND_BASE 0x40000000
#define CONFIG_SYS_NAND_DBW_8 1
diff --git a/include/configs/bamboo.h b/include/configs/bamboo.h
index f3ffe1c..8c4127d 100644
--- a/include/configs/bamboo.h
+++ b/include/configs/bamboo.h
@@ -197,7 +197,6 @@
* NAND FLASH
*----------------------------------------------------------------------*/
#define CONFIG_SYS_MAX_NAND_DEVICE 2
-#define NAND_MAX_CHIPS CONFIG_SYS_MAX_NAND_DEVICE
#define CONFIG_SYS_NAND_BASE (CONFIG_SYS_NAND_ADDR + CONFIG_SYS_NAND_CS)
#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE, CONFIG_SYS_NAND_ADDR + 2 }
#define CONFIG_SYS_NAND_SELECT_DEVICE 1 /* nand driver supports mutipl. chips */
diff --git a/include/configs/bf537-stamp.h b/include/configs/bf537-stamp.h
index 1b54d3b..ac5aaa5 100644
--- a/include/configs/bf537-stamp.h
+++ b/include/configs/bf537-stamp.h
@@ -278,7 +278,6 @@
#define ADDR_COLUMN_PAGE 3
#define NAND_ChipID_UNKNOWN 0x00
#define NAND_MAX_FLOORS 1
-#define NAND_MAX_CHIPS 1
#define BFIN_NAND_READY PF3
#define NAND_WAIT_READY(nand) \
diff --git a/include/configs/canyonlands.h b/include/configs/canyonlands.h
index faf6304..d814012 100644
--- a/include/configs/canyonlands.h
+++ b/include/configs/canyonlands.h
@@ -234,7 +234,6 @@
* NAND-FLASH related
*----------------------------------------------------------------------*/
#define CONFIG_SYS_MAX_NAND_DEVICE 1
-#define NAND_MAX_CHIPS 1
#define CONFIG_SYS_NAND_BASE (CONFIG_SYS_NAND_ADDR + CONFIG_SYS_NAND_CS)
#define CONFIG_SYS_NAND_SELECT_DEVICE 1 /* nand driver supports mutipl. chips */
diff --git a/include/configs/csb637.h b/include/configs/csb637.h
index 2df77cf..761c0dc 100644
--- a/include/configs/csb637.h
+++ b/include/configs/csb637.h
@@ -131,7 +131,6 @@
#define NAND_ChipID_UNKNOWN 0x00
#define NAND_MAX_FLOORS 1
-#define NAND_MAX_CHIPS 1
#define AT91_SMART_MEDIA_ALE (1 << 22) /* our ALE is AD22 */
#define AT91_SMART_MEDIA_CLE (1 << 21) /* our CLE is AD21 */
diff --git a/include/configs/davinci_dvevm.h b/include/configs/davinci_dvevm.h
index 6885b2c..a727f56 100644
--- a/include/configs/davinci_dvevm.h
+++ b/include/configs/davinci_dvevm.h
@@ -127,7 +127,6 @@
#define CONFIG_SYS_NAND_BASE 0x02000000
#define CONFIG_SYS_NAND_HW_ECC
#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
-#define NAND_MAX_CHIPS 1
#define CONFIG_ENV_OFFSET 0x0 /* Block 0--not used by bootcode */
#define DEF_BOOTM ""
#elif defined(CONFIG_SYS_USE_NOR)
diff --git a/include/configs/davinci_schmoogie.h b/include/configs/davinci_schmoogie.h
index 8d7bcf5..22d3808 100644
--- a/include/configs/davinci_schmoogie.h
+++ b/include/configs/davinci_schmoogie.h
@@ -89,7 +89,6 @@
#define CONFIG_SYS_NAND_BASE 0x02000000
#define CONFIG_SYS_NAND_HW_ECC
#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
-#define NAND_MAX_CHIPS 1
#define CONFIG_ENV_OFFSET 0x0 /* Block 0--not used by bootcode */
/*=====================*/
/* Board related stuff */
diff --git a/include/configs/davinci_sffsdr.h b/include/configs/davinci_sffsdr.h
index e9cd5a6..875bab6 100644
--- a/include/configs/davinci_sffsdr.h
+++ b/include/configs/davinci_sffsdr.h
@@ -85,7 +85,6 @@
#define CONFIG_SYS_NAND_BASE 0x02000000
#define CONFIG_SYS_NAND_HW_ECC
#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
-#define NAND_MAX_CHIPS 1
#define CONFIG_ENV_OFFSET 0x0 /* Block 0--not used by bootcode */
/* I2C switch definitions for PCA9543 chip */
#define CONFIG_SYS_I2C_PCA9543_ADDR 0x70
diff --git a/include/configs/davinci_sonata.h b/include/configs/davinci_sonata.h
index 381eeb7..47ab27a 100644
--- a/include/configs/davinci_sonata.h
+++ b/include/configs/davinci_sonata.h
@@ -122,7 +122,6 @@
#define CONFIG_SYS_NAND_BASE 0x02000000
#define CONFIG_SYS_NAND_HW_ECC
#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
-#define NAND_MAX_CHIPS 1
#define CONFIG_ENV_OFFSET 0x0 /* Block 0--not used by bootcode */
#define DEF_BOOTM ""
#elif defined(CONFIG_SYS_USE_NOR)
diff --git a/include/configs/delta.h b/include/configs/delta.h
index 08b28ca..fd97b74 100644
--- a/include/configs/delta.h
+++ b/include/configs/delta.h
@@ -258,7 +258,6 @@
#define NAND_ChipID_UNKNOWN 0x00
#define NAND_MAX_FLOORS 1
-#define NAND_MAX_CHIPS 1
#define CONFIG_SYS_NO_FLASH 1
diff --git a/include/configs/kilauea.h b/include/configs/kilauea.h
index b943f31..4d3ccf5 100644
--- a/include/configs/kilauea.h
+++ b/include/configs/kilauea.h
@@ -214,7 +214,6 @@
* NAND FLASH
*----------------------------------------------------------------------*/
#define CONFIG_SYS_MAX_NAND_DEVICE 1
-#define NAND_MAX_CHIPS 1
#define CONFIG_SYS_NAND_BASE (CONFIG_SYS_NAND_ADDR + CONFIG_SYS_NAND_CS)
#define CONFIG_SYS_NAND_SELECT_DEVICE 1 /* nand driver supports mutipl. chips */
diff --git a/include/configs/netstar.h b/include/configs/netstar.h
index dda6597..fab22d1 100644
--- a/include/configs/netstar.h
+++ b/include/configs/netstar.h
@@ -120,7 +120,6 @@
* NAND flash
*/
#define CONFIG_SYS_MAX_NAND_DEVICE 1
-#define NAND_MAX_CHIPS 1
#define CONFIG_SYS_NAND_BASE 0x04000000 + (2 << 23)
#define NAND_ALLOW_ERASE_ALL 1
diff --git a/include/configs/omap2420h4.h b/include/configs/omap2420h4.h
index d11868e..92df0b4 100644
--- a/include/configs/omap2420h4.h
+++ b/include/configs/omap2420h4.h
@@ -163,7 +163,6 @@
#define NAND_ChipID_UNKNOWN 0x00
#define NAND_MAX_FLOORS 1
-#define NAND_MAX_CHIPS 1
#define WRITE_NAND_COMMAND(d, adr) do {*(volatile u16 *)0x6800A07C = d;} while(0)
#define WRITE_NAND_ADDRESS(d, adr) do {*(volatile u16 *)0x6800A080 = d;} while(0)
diff --git a/include/configs/pdnb3.h b/include/configs/pdnb3.h
index 8b7890e..f8aac1a 100644
--- a/include/configs/pdnb3.h
+++ b/include/configs/pdnb3.h
@@ -264,7 +264,6 @@
* NAND-FLASH stuff
*/
#define CONFIG_SYS_MAX_NAND_DEVICE 1
-#define NAND_MAX_CHIPS 1
#define CONFIG_SYS_NAND_BASE 0x51000000 /* NAND FLASH Base Address */
#endif
diff --git a/include/configs/quad100hd.h b/include/configs/quad100hd.h
index 0f7fca3..3ea854b 100644
--- a/include/configs/quad100hd.h
+++ b/include/configs/quad100hd.h
@@ -224,7 +224,6 @@
#define CONFIG_SYS_NAND_CE 24 /* our CE is GPIO24 */
#define CONFIG_SYS_NAND_CLE 31 /* our CLE is GPIO31 */
#define CONFIG_SYS_NAND_ALE 30 /* our ALE is GPIO30 */
-#define NAND_MAX_CHIPS 1
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#endif
diff --git a/include/configs/sbc2410x.h b/include/configs/sbc2410x.h
index d7a6ae4..bf4a14e 100644
--- a/include/configs/sbc2410x.h
+++ b/include/configs/sbc2410x.h
@@ -209,7 +209,6 @@
#define NAND_ChipID_UNKNOWN 0x00
#define NAND_MAX_FLOORS 1
-#define NAND_MAX_CHIPS 1
#define NAND_WAIT_READY(nand) NF_WaitRB()
#define NAND_DISABLE_CE(nand) NF_SetCE(NFCE_HIGH)
diff --git a/include/configs/sc3.h b/include/configs/sc3.h
index d152a96..515b097 100644
--- a/include/configs/sc3.h
+++ b/include/configs/sc3.h
@@ -424,7 +424,6 @@ extern unsigned long offsetOfEnvironment;
* NAND-FLASH stuff
*/
#define CONFIG_SYS_MAX_NAND_DEVICE 1
-#define NAND_MAX_CHIPS 1
#define CONFIG_SYS_NAND_BASE 0x77D00000
diff --git a/include/configs/sequoia.h b/include/configs/sequoia.h
index 9321bdc..a3e2fce 100644
--- a/include/configs/sequoia.h
+++ b/include/configs/sequoia.h
@@ -373,7 +373,6 @@
* NAND FLASH
*/
#define CONFIG_SYS_MAX_NAND_DEVICE 1
-#define NAND_MAX_CHIPS 1
#define CONFIG_SYS_NAND_BASE (CONFIG_SYS_NAND_ADDR + CONFIG_SYS_NAND_CS)
#define CONFIG_SYS_NAND_SELECT_DEVICE 1 /* nand driver supports mutipl. chips */
diff --git a/include/configs/smdk6400.h b/include/configs/smdk6400.h
index 1784cc6..57c82d1 100644
--- a/include/configs/smdk6400.h
+++ b/include/configs/smdk6400.h
@@ -227,7 +227,6 @@
/* NAND configuration */
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_NAND_BASE 0x70200010
-#define NAND_MAX_CHIPS 1
#define CONFIG_SYS_S3C_NAND_HWECC
#define CONFIG_SYS_NAND_SKIP_BAD_DOT_I 1 /* ".i" read skips bad blocks */
diff --git a/include/configs/socrates.h b/include/configs/socrates.h
index cbf04e3..becd13e 100644
--- a/include/configs/socrates.h
+++ b/include/configs/socrates.h
@@ -186,7 +186,6 @@
#define CONFIG_SYS_NAND_BASE (CONFIG_SYS_FPGA_BASE + 0x70)
#define CONFIG_SYS_MAX_NAND_DEVICE 1
-#define NAND_MAX_CHIPS 1
#define CONFIG_CMD_NAND
/* LIME GDC */
diff --git a/include/configs/stxxtc.h b/include/configs/stxxtc.h
index bc078cf..5a5f772 100644
--- a/include/configs/stxxtc.h
+++ b/include/configs/stxxtc.h
@@ -464,7 +464,6 @@
#define ADDR_COLUMN_PAGE 3
#define NAND_ChipID_UNKNOWN 0x00
#define NAND_MAX_FLOORS 1
-#define NAND_MAX_CHIPS 1
/* ALE = PC15, CLE = PB23, CE = PA7, F_RY_BY = PA6 */
#define NAND_DISABLE_CE(nand) \
diff --git a/include/configs/zylonite.h b/include/configs/zylonite.h
index 53397d8..f30eca1 100644
--- a/include/configs/zylonite.h
+++ b/include/configs/zylonite.h
@@ -227,7 +227,6 @@
#define NAND_ChipID_UNKNOWN 0x00
#define NAND_MAX_FLOORS 1
-#define NAND_MAX_CHIPS 1
#define CONFIG_SYS_NO_FLASH 1
diff --git a/include/linux/mtd/bbm.h b/include/linux/mtd/bbm.h
index abf8f1a..7db2546 100644
--- a/include/linux/mtd/bbm.h
+++ b/include/linux/mtd/bbm.h
@@ -18,8 +18,8 @@
#define __LINUX_MTD_BBM_H
/* The maximum number of NAND chips in an array */
-#ifndef NAND_MAX_CHIPS
-#define NAND_MAX_CHIPS 8
+#ifndef CONFIG_SYS_NAND_MAX_CHIPS
+#define CONFIG_SYS_NAND_MAX_CHIPS 1
#endif
/**
@@ -48,10 +48,10 @@
*/
struct nand_bbt_descr {
int options;
- int pages[NAND_MAX_CHIPS];
+ int pages[CONFIG_SYS_NAND_MAX_CHIPS];
int offs;
int veroffs;
- uint8_t version[NAND_MAX_CHIPS];
+ uint8_t version[CONFIG_SYS_NAND_MAX_CHIPS];
int len;
int maxblocks;
int reserved_block_code;
diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h
index 24ad2bd..a4ad571 100644
--- a/include/linux/mtd/nand.h
+++ b/include/linux/mtd/nand.h
@@ -46,11 +46,6 @@ extern void nand_release (struct mtd_info *mtd);
/* Internal helper for board drivers which need to override command function */
extern void nand_wait_ready(struct mtd_info *mtd);
-/* The maximum number of NAND chips in an array */
-#ifndef NAND_MAX_CHIPS
-#define NAND_MAX_CHIPS 8
-#endif
-
/* This constant declares the max. oobsize / page, which
* is supported now. If you add a chip with bigger oobsize/page
* adjust this accordingly.
@@ -477,10 +472,6 @@ struct nand_manufacturers {
extern struct nand_flash_dev nand_flash_ids[];
extern struct nand_manufacturers nand_manuf_ids[];
-#ifndef NAND_MAX_CHIPS
-#define NAND_MAX_CHIPS 8
-#endif
-
extern int nand_scan_bbt(struct mtd_info *mtd, struct nand_bbt_descr *bd);
extern int nand_update_bbt(struct mtd_info *mtd, loff_t offs);
extern int nand_default_bbt(struct mtd_info *mtd);
diff --git a/include/linux/mtd/nand_legacy.h b/include/linux/mtd/nand_legacy.h
index 99eafbb..4334448 100644
--- a/include/linux/mtd/nand_legacy.h
+++ b/include/linux/mtd/nand_legacy.h
@@ -40,6 +40,11 @@
#error This module is for the legacy NAND support
#endif
+/* The maximum number of NAND chips in an array */
+#ifndef CONFIG_SYS_NAND_MAX_CHIPS
+#define CONFIG_SYS_NAND_MAX_CHIPS 1
+#endif
+
/*
* Standard NAND flash commands
*/
diff --git a/include/linux/mtd/onenand.h b/include/linux/mtd/onenand.h
index 4467c2b..2597e34 100644
--- a/include/linux/mtd/onenand.h
+++ b/include/linux/mtd/onenand.h
@@ -30,14 +30,10 @@ extern void onenand_release (struct mtd_info *mtd);
/**
* struct onenand_bufferram - OneNAND BufferRAM Data
- * @param block block address in BufferRAM
- * @param page page address in BufferRAM
- * @param valid valid flag
+ * @param blockpage block & page address in BufferRAM
*/
struct onenand_bufferram {
- int block;
- int page;
- int valid;
+ int blockpage;
};
/**
@@ -70,6 +66,8 @@ struct onenand_chip {
void __iomem *base;
unsigned int chipsize;
unsigned int device_id;
+ unsigned int version_id;
+ unsigned int density_mask;
unsigned int options;
unsigned int erase_shift;
@@ -81,26 +79,36 @@ struct onenand_chip {
unsigned int bufferram_index;
struct onenand_bufferram bufferram[MAX_BUFFERRAM];
- int (*command) (struct mtd_info * mtd, int cmd, loff_t address,
+ int (*command) (struct mtd_info *mtd, int cmd, loff_t address,
size_t len);
- int (*wait) (struct mtd_info * mtd, int state);
- int (*read_bufferram) (struct mtd_info * mtd, int area,
+ int (*wait) (struct mtd_info *mtd, int state);
+ int (*bbt_wait) (struct mtd_info *mtd, int state);
+ int (*read_bufferram) (struct mtd_info *mtd, loff_t addr, int area,
unsigned char *buffer, int offset, size_t count);
- int (*write_bufferram) (struct mtd_info * mtd, int area,
+ int (*read_spareram) (struct mtd_info *mtd, loff_t addr, int area,
+ unsigned char *buffer, int offset, size_t count);
+ int (*write_bufferram) (struct mtd_info *mtd, loff_t addr, int area,
const unsigned char *buffer, int offset,
size_t count);
- unsigned short (*read_word) (void __iomem * addr);
- void (*write_word) (unsigned short value, void __iomem * addr);
- void (*mmcontrol) (struct mtd_info * mtd, int sync_read);
+ unsigned short (*read_word) (void __iomem *addr);
+ void (*write_word) (unsigned short value, void __iomem *addr);
+ void (*mmcontrol) (struct mtd_info *mtd, int sync_read);
int (*block_markbad)(struct mtd_info *mtd, loff_t ofs);
int (*scan_bbt)(struct mtd_info *mtd);
+ unsigned char *main_buf;
+ unsigned char *spare_buf;
+#ifdef DONT_USE_UBOOT
+ spinlock_t chip_lock;
+ wait_queue_head_t wq;
+#endif
int state;
- unsigned char *page_buf;
- unsigned char *oob_buf;
+ unsigned char *page_buf;
+ unsigned char *oob_buf;
struct nand_oobinfo *autooob;
- struct nand_ecclayout *ecclayout;
+ int subpagesize;
+ struct nand_ecclayout *ecclayout;
void *bbm;
@@ -125,7 +133,9 @@ struct onenand_chip {
/*
* Options bits
*/
-#define ONENAND_CONT_LOCK (0x0001)
+#define ONENAND_HAS_CONT_LOCK (0x0001)
+#define ONENAND_HAS_UNLOCK_ALL (0x0002)
+#define ONENAND_HAS_2PLANE (0x0004)
#define ONENAND_PAGEBUF_ALLOC (0x1000)
#define ONENAND_OOBBUF_ALLOC (0x2000)
@@ -133,7 +143,6 @@ struct onenand_chip {
* OneNAND Flash Manufacturer ID Codes
*/
#define ONENAND_MFR_SAMSUNG 0xec
-#define ONENAND_MFR_UNKNOWN 0x00
/**
* struct nand_manufacturers - NAND Flash Manufacturer ID Structure
diff --git a/include/linux/mtd/onenand_regs.h b/include/linux/mtd/onenand_regs.h
index a245e14..fc63380 100644
--- a/include/linux/mtd/onenand_regs.h
+++ b/include/linux/mtd/onenand_regs.h
@@ -119,6 +119,7 @@
#define ONENAND_CMD_UNLOCK (0x23)
#define ONENAND_CMD_LOCK (0x2A)
#define ONENAND_CMD_LOCK_TIGHT (0x2C)
+#define ONENAND_CMD_UNLOCK_ALL (0x27)
#define ONENAND_CMD_ERASE (0x94)
#define ONENAND_CMD_RESET (0xF0)
#define ONENAND_CMD_READID (0x90)
diff --git a/include/nand.h b/include/nand.h
index b4f316f..065a42c 100644
--- a/include/nand.h
+++ b/include/nand.h
@@ -31,6 +31,8 @@ extern void nand_init(void);
#include <linux/mtd/mtd.h>
#include <linux/mtd/nand.h>
+extern int board_nand_init(struct nand_chip *nand);
+
typedef struct mtd_info nand_info_t;
extern int nand_curr_device;
diff --git a/include/onenand_uboot.h b/include/onenand_uboot.h
index e960257..5a4fded 100644
--- a/include/onenand_uboot.h
+++ b/include/onenand_uboot.h
@@ -15,25 +15,29 @@
#define __UBOOT_ONENAND_H
#include <linux/types.h>
-#include <linux/mtd/mtd.h>
struct mtd_info;
struct erase_info;
+struct onenand_chip;
extern struct mtd_info onenand_mtd;
+/* board */
+extern void onenand_board_init(struct mtd_info *);
+
/* Functions */
extern void onenand_init(void);
extern int onenand_read(struct mtd_info *mtd, loff_t from, size_t len,
size_t * retlen, u_char * buf);
-extern int onenand_read_oob(struct mtd_info *mtd, loff_t from,
- struct mtd_oob_ops *ops);
+extern int onenand_read_oob(struct mtd_info *mtd, loff_t from, struct mtd_oob_ops *ops);
extern int onenand_write(struct mtd_info *mtd, loff_t from, size_t len,
size_t * retlen, const u_char * buf);
extern int onenand_erase(struct mtd_info *mtd, struct erase_info *instr);
-extern int onenand_unlock(struct mtd_info *mtd, loff_t ofs, size_t len);
+extern char *onenand_print_device_info(int device, int version);
-extern char *onenand_print_device_info(int device);
+/* S3C64xx */
+extern void s3c64xx_onenand_init(struct mtd_info *);
+extern void s3c64xx_set_width_regs(struct onenand_chip *);
#endif /* __UBOOT_ONENAND_H */