summaryrefslogtreecommitdiff
path: root/include
diff options
context:
space:
mode:
authorwdenk <wdenk>2005-01-12 00:38:03 +0000
committerwdenk <wdenk>2005-01-12 00:38:03 +0000
commit5a95f6fbd21c542a6df0a41fb827ad7e7c9b17d8 (patch)
tree3e01df2db1ded87b4a8ced9ab2011fbf5056bcb8 /include
parent289f932c5ff628bf21a05073243071a01a2d3b02 (diff)
downloadu-boot-imx-5a95f6fbd21c542a6df0a41fb827ad7e7c9b17d8.zip
u-boot-imx-5a95f6fbd21c542a6df0a41fb827ad7e7c9b17d8.tar.gz
u-boot-imx-5a95f6fbd21c542a6df0a41fb827ad7e7c9b17d8.tar.bz2
* Patch by Robin Getz, 13 Oct 2004:
Add standalone application to change SMC91C111 MAC addresses, see examples/README.smc91111_eeprom * Patch by Xiaogeng (Shawn) Jin, 12 Oct 2004: Fix Flash support for ARM Integrator CP.
Diffstat (limited to 'include')
-rw-r--r--include/configs/integratorcp.h49
-rw-r--r--include/configs/omap2420h4.h6
2 files changed, 34 insertions, 21 deletions
diff --git a/include/configs/integratorcp.h b/include/configs/integratorcp.h
index 1369748..0b0ffd4 100644
--- a/include/configs/integratorcp.h
+++ b/include/configs/integratorcp.h
@@ -35,7 +35,11 @@
* High Level Configuration Options
* (easy to change)
*/
+#if 1
#define CONFIG_ARM926EJS 1 /* This is an arm926ejs CPU core */
+#else
+#define CONFIG_ARM946ES 1 /* This is an arm946es CPU core */
+#endif
#define CONFIG_INTEGRATOR 1 /* in an Integrator board */
#define CONFIG_ARCH_CINTEGRATOR 1 /* Specifically, a CP */
@@ -51,7 +55,7 @@
/*
* Size of malloc() pool
*/
-#define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024)
+#define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024)
#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
/*
@@ -69,31 +73,39 @@
#define CONFIG_PL011_CLOCK 14745600
#define CONFIG_PL01x_PORTS { (void *)CFG_SERIAL0, (void *)CFG_SERIAL1 }
#define CONFIG_CONS_INDEX 0
-#define CONFIG_BAUDRATE 38400
+#define CONFIG_BAUDRATE 38400
#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
#define CFG_SERIAL0 0x16000000
#define CFG_SERIAL1 0x17000000
-#define CONFIG_COMMANDS (CFG_CMD_DHCP | CFG_CMD_IMI | CFG_CMD_NET | CFG_CMD_PING | CFG_CMD_BDI | CFG_CMD_MEMORY)
-#define CONFIG_BOOTP_MASK CONFIG_BOOTP_DEFAULT
+/*
+#define CONFIG_COMMANDS (CFG_CMD_DFL | CFG_CMD_PCI)
+*/
+#define CONFIG_COMMANDS (CFG_CMD_DHCP | CFG_CMD_IMI | CFG_CMD_NET | CFG_CMD_PING | \
+ CFG_CMD_BDI | CFG_CMD_MEMORY | CFG_CMD_FLASH | CFG_CMD_ENV \
+ )
+
+/* #define CONFIG_BOOTP_MASK CONFIG_BOOTP_DEFAULT */
/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
#include <cmd_confdefs.h>
+#if 0
#define CONFIG_BOOTDELAY 2
#define CONFIG_BOOTARGS "root=/dev/nfs mem=128M ip=dhcp netdev=27,0,0xfc800000,0xfc800010,eth0"
#define CONFIG_BOOTCOMMAND "bootp ; bootm"
+#endif
/*
* Miscellaneous configurable options
*/
-#define CFG_LONGHELP /* undef to save memory */
+#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "Integrator-CP # " /* Monitor Command Prompt */
-#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
+#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
/* Print Buffer Size */
#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16)
-#define CFG_MAXARGS 16 /* max number of command args */
-#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
+#define CFG_MAXARGS 16 /* max number of command args */
+#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
#undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */
#define CFG_LOAD_ADDR 0x7fc0 /* default load address */
@@ -112,23 +124,24 @@
/*-----------------------------------------------------------------------
* Physical Memory Map
*/
-#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
+#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
#define PHYS_SDRAM_1 0x00000000 /* SDRAM Bank #1 */
-#define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB */
-
-#define CFG_FLASH_BASE 0x24000000
-#define PHYS_FLASH_1 (CFG_FLASH_BASE)
+#define PHYS_SDRAM_1_SIZE 0x08000000 /* 128 MB */
/*-----------------------------------------------------------------------
* FLASH and environment organization
*/
-#define CFG_ENV_IS_NOWHERE
+#define CFG_FLASH_BASE 0x24000000
+#define CFG_MAX_FLASH_SECT 64
#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
#define PHYS_FLASH_SIZE 0x01000000 /* 16MB */
-/* timeout values are in ticks */
#define CFG_FLASH_ERASE_TOUT (20*CFG_HZ) /* Timeout for Flash Erase */
#define CFG_FLASH_WRITE_TOUT (20*CFG_HZ) /* Timeout for Flash Write */
-#define CFG_MAX_FLASH_SECT 128
-#define CFG_ENV_SIZE 32768
-#endif /* __CONFIG_H */
+#define CFG_MONITOR_BASE 0x24F40000
+#define CFG_ENV_IS_IN_FLASH
+#define CFG_ENV_ADDR 0x24F00000
+#define CFG_ENV_SECT_SIZE 0x40000 /* 256KB */
+#define CFG_ENV_SIZE 8192 /* 8KB */
+
+#endif /* __CONFIG_H */
diff --git a/include/configs/omap2420h4.h b/include/configs/omap2420h4.h
index 8516054..47f78fa 100644
--- a/include/configs/omap2420h4.h
+++ b/include/configs/omap2420h4.h
@@ -40,17 +40,17 @@
/* Clock config to target*/
#define PRCM_CONFIG_II 1
-//#define PRCM_CONFIG_III 1
+/*#define PRCM_CONFIG_III 1 */
/* Memory configuration on board */
-//#define CONFIG_OPTIMIZE_DDR 1
+/*#define CONFIG_OPTIMIZE_DDR 1 */
#include <asm/arch/omap2420.h> /* get chip and board defs */
/* On H4, NOR and NAND flash are mutual exclusive.
Define this if you want to use NAND
*/
-//#define CFG_NAND_BOOT
+/*#define CFG_NAND_BOOT */
#ifdef CONFIG_APTIX
#define V_SCLK 1500000