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authorScott McNutt <smcnutt@psyent.com>2010-03-21 21:24:43 -0400
committerScott McNutt <smcnutt@psyent.com>2010-04-02 12:28:41 -0400
commit3ea0037f2337de692b5fd2b6a4449db1de3067a2 (patch)
treedc79b32082081baa60f5ef8e43ca774814e5eeba /include
parent64da04d24ea685483f9afa07088f76931b6c0e01 (diff)
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nios2: Fix outx/writex parameter order in io.h
The outx/writex macros were using writex(addr, val) rather than the standard writex(val, addr), resulting in incompatibilty with architecture independent components. This change set uses standard parameter order. Signed-off-by: Scott McNutt <smcnutt@psyent.com>
Diffstat (limited to 'include')
-rw-r--r--include/asm-nios2/io.h18
1 files changed, 9 insertions, 9 deletions
diff --git a/include/asm-nios2/io.h b/include/asm-nios2/io.h
index 01d11ef..121405c 100644
--- a/include/asm-nios2/io.h
+++ b/include/asm-nios2/io.h
@@ -80,19 +80,19 @@ extern unsigned inl (unsigned port);
({unsigned long val;\
asm volatile( "ldwio %0, 0(%1)" :"=r"(val) : "r" (addr)); val;})
-#define writeb(addr,val)\
- asm volatile ("stbio %1, 0(%0)" : : "r" (addr), "r" (val))
-#define writew(addr,val)\
- asm volatile ("sthio %1, 0(%0)" : : "r" (addr), "r" (val))
-#define writel(addr,val)\
- asm volatile ("stwio %1, 0(%0)" : : "r" (addr), "r" (val))
+#define writeb(val,addr)\
+ asm volatile ("stbio %0, 0(%1)" : : "r" (val), "r" (addr))
+#define writew(val,addr)\
+ asm volatile ("sthio %0, 0(%1)" : : "r" (val), "r" (addr))
+#define writel(val,addr)\
+ asm volatile ("stwio %0, 0(%1)" : : "r" (val), "r" (addr))
#define inb(addr) readb(addr)
#define inw(addr) readw(addr)
#define inl(addr) readl(addr)
-#define outb(addr,val) writeb(addr,val)
-#define outw(addr,val) writew(addr,val)
-#define outl(addr,val) writel(addr,val)
+#define outb(val, addr) writeb(val,addr)
+#define outw(val, addr) writew(val,addr)
+#define outl(val, addr) writel(val,addr)
static inline void insb (unsigned long port, void *dst, unsigned long count)
{