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| author | Alexander Graf <agraf@suse.de> | 2016-03-04 01:09:50 +0100 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2016-03-15 15:13:04 -0400 |
| commit | b30291a3b212f48927daa81dc64b88a3927c5609 (patch) | |
| tree | 6ffaa30ec0fafe2fa3c6eb5dc4b027db6494e925 /include | |
| parent | 96519f31cb9cfd20e99c6c44e920a37a6b0592f2 (diff) | |
| download | u-boot-imx-b30291a3b212f48927daa81dc64b88a3927c5609.zip u-boot-imx-b30291a3b212f48927daa81dc64b88a3927c5609.tar.gz u-boot-imx-b30291a3b212f48927daa81dc64b88a3927c5609.tar.bz2 | |
tegra: Replace home grown mmu code with generic table approach
Now that we have nice table driven page table creating code that gives
us everything we need, move to that.
Signed-off-by: Alexander Graf <agraf@suse.de>
Diffstat (limited to 'include')
| -rw-r--r-- | include/configs/tegra210-common.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/include/configs/tegra210-common.h b/include/configs/tegra210-common.h index 8f35a7b..2a6e317 100644 --- a/include/configs/tegra210-common.h +++ b/include/configs/tegra210-common.h @@ -13,6 +13,8 @@ /* Cortex-A57 uses a cache line size of 64 bytes */ #define CONFIG_SYS_CACHELINE_SIZE 64 +#define CONFIG_SYS_FULL_VA + /* * NS16550 Configuration */ |