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authorHou Zhiqiang <Zhiqiang.Hou@nxp.com>2017-01-10 16:44:15 +0800
committerYork Sun <york.sun@nxp.com>2017-01-18 09:27:59 -0800
commit904110c7ac801b99029b2bca4765c792c9eac582 (patch)
tree5266fd062bff903aff035a6588af17aad261663b /include
parentee2a51022135a01fa2258b7788702313d0f54dac (diff)
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armv8/fsl-lsch2: refactor the clock system initialization
Up to now, there are 3 kind of SoCs under Layerscape Chassis 2, like LS1043A, LS1046A and LS1012A. But the clocks tree has a lot of differences, for instance, the IP modules have different dividers to derive its clock from Platform PLL. And the core cluster PLL and platform PLL maybe have different reference clocks, such as LS1012A. Another problem is which clock/PLL should be described by sys_info->freq_systembus, it is confused in Layerscape Chissis 2. This patch is to bind the sys_info->freq_systembus to the Platform PLL, and handle the different divider of IP modules separately between different SoCs, and separate reference clocks of core cluster PLL and platform PLL. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
Diffstat (limited to 'include')
-rw-r--r--include/configs/ls1012a_common.h6
-rw-r--r--include/configs/ls1043a_common.h3
-rw-r--r--include/configs/ls1046a_common.h3
-rw-r--r--include/configs/ls2080aqds.h2
-rw-r--r--include/configs/ls2080ardb.h1
5 files changed, 4 insertions, 11 deletions
diff --git a/include/configs/ls1012a_common.h b/include/configs/ls1012a_common.h
index 20f0c61..910835e 100644
--- a/include/configs/ls1012a_common.h
+++ b/include/configs/ls1012a_common.h
@@ -19,9 +19,7 @@
#define CONFIG_SYS_TEXT_BASE 0x40100000
-#define CONFIG_SYS_FSL_CLK
-#define CONFIG_SYS_CLK_FREQ 100000000
-#define CONFIG_DDR_CLK_FREQ 125000000
+#define CONFIG_SYS_CLK_FREQ 125000000
#define CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_BOARD_EARLY_INIT_F 1
@@ -82,7 +80,7 @@
#define CONFIG_CONS_INDEX 1
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
-#define CONFIG_SYS_NS16550_CLK (get_bus_freq(0)/2)
+#define CONFIG_SYS_NS16550_CLK (get_serial_clock())
#define CONFIG_BAUDRATE 115200
#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
diff --git a/include/configs/ls1043a_common.h b/include/configs/ls1043a_common.h
index 740d2d6..47b6ef7 100644
--- a/include/configs/ls1043a_common.h
+++ b/include/configs/ls1043a_common.h
@@ -11,7 +11,6 @@
#define CONFIG_FSL_LAYERSCAPE
#define CONFIG_LS1043A
#define CONFIG_MP
-#define CONFIG_SYS_FSL_CLK
#define CONFIG_GICV2
#include <asm/arch/config.h>
@@ -42,7 +41,7 @@
#define CONFIG_CONS_INDEX 1
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
-#define CONFIG_SYS_NS16550_CLK (get_bus_freq(0))
+#define CONFIG_SYS_NS16550_CLK (get_serial_clock())
#define CONFIG_BAUDRATE 115200
#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
diff --git a/include/configs/ls1046a_common.h b/include/configs/ls1046a_common.h
index 40e6af8..4a910d1 100644
--- a/include/configs/ls1046a_common.h
+++ b/include/configs/ls1046a_common.h
@@ -10,7 +10,6 @@
#define CONFIG_REMAKE_ELF
#define CONFIG_FSL_LAYERSCAPE
#define CONFIG_MP
-#define CONFIG_SYS_FSL_CLK
#define CONFIG_GICV2
#include <asm/arch/config.h>
@@ -41,7 +40,7 @@
#define CONFIG_CONS_INDEX 1
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
-#define CONFIG_SYS_NS16550_CLK (get_bus_freq(0)/2)
+#define CONFIG_SYS_NS16550_CLK (get_serial_clock())
#define CONFIG_BAUDRATE 115200
#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
diff --git a/include/configs/ls2080aqds.h b/include/configs/ls2080aqds.h
index 5a54c1f..c39e9cf 100644
--- a/include/configs/ls2080aqds.h
+++ b/include/configs/ls2080aqds.h
@@ -14,8 +14,6 @@ unsigned long get_board_sys_clk(void);
unsigned long get_board_ddr_clk(void);
#endif
-#define CONFIG_SYS_FSL_CLK
-
#ifdef CONFIG_FSL_QSPI
#define CONFIG_SYS_NO_FLASH
#undef CONFIG_CMD_IMLS
diff --git a/include/configs/ls2080ardb.h b/include/configs/ls2080ardb.h
index 7f78fd8..5626d88 100644
--- a/include/configs/ls2080ardb.h
+++ b/include/configs/ls2080ardb.h
@@ -32,7 +32,6 @@
unsigned long get_board_sys_clk(void);
#endif
-#define CONFIG_SYS_FSL_CLK
#define CONFIG_SYS_CLK_FREQ get_board_sys_clk()
#define CONFIG_DDR_CLK_FREQ 133333333
#define COUNTER_FREQUENCY_REAL (CONFIG_SYS_CLK_FREQ/4)