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author | Gong Qianyu <Qianyu.Gong@freescale.com> | 2015-11-11 17:58:40 +0800 |
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committer | York Sun <yorksun@freescale.com> | 2015-11-30 09:11:11 -0800 |
commit | 7023100971c96b043b0aee669c45d1fcb3e8557b (patch) | |
tree | 5484e3926954a71803451b350d3567062f6388ec /include | |
parent | 28752cf83b115aff7f27df2e52f4c69399dd95c6 (diff) | |
download | u-boot-imx-7023100971c96b043b0aee669c45d1fcb3e8557b.zip u-boot-imx-7023100971c96b043b0aee669c45d1fcb3e8557b.tar.gz u-boot-imx-7023100971c96b043b0aee669c45d1fcb3e8557b.tar.bz2 |
armv8/ls1043ardb: add USB support
Add support for the third USB controller for LS1043A.
Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'include')
-rw-r--r-- | include/configs/ls1043ardb.h | 13 | ||||
-rw-r--r-- | include/linux/usb/xhci-fsl.h | 9 |
2 files changed, 21 insertions, 1 deletions
diff --git a/include/configs/ls1043ardb.h b/include/configs/ls1043ardb.h index 3fa9b3b..7d113a0 100644 --- a/include/configs/ls1043ardb.h +++ b/include/configs/ls1043ardb.h @@ -278,4 +278,17 @@ #define CONFIG_ETHPRIME "FM1@DTSEC3" #endif +/* USB */ +#define CONFIG_HAS_FSL_XHCI_USB +#ifdef CONFIG_HAS_FSL_XHCI_USB +#define CONFIG_USB_XHCI +#define CONFIG_USB_XHCI_FSL +#define CONFIG_USB_XHCI_DWC3 +#define CONFIG_USB_MAX_CONTROLLER_COUNT 3 +#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2 +#define CONFIG_CMD_USB +#define CONFIG_USB_STORAGE +#define CONFIG_CMD_EXT2 +#endif + #endif /* __LS1043ARDB_H__ */ diff --git a/include/linux/usb/xhci-fsl.h b/include/linux/usb/xhci-fsl.h index f665bf1..e922e32 100644 --- a/include/linux/usb/xhci-fsl.h +++ b/include/linux/usb/xhci-fsl.h @@ -54,11 +54,18 @@ struct fsl_xhci { #if defined(CONFIG_LS102XA) #define CONFIG_SYS_FSL_XHCI_USB1_ADDR CONFIG_SYS_LS102XA_XHCI_USB1_ADDR #define CONFIG_SYS_FSL_XHCI_USB2_ADDR 0 +#define CONFIG_SYS_FSL_XHCI_USB3_ADDR 0 #elif defined(CONFIG_LS2080A) || defined(CONFIG_LS2085A) #define CONFIG_SYS_FSL_XHCI_USB1_ADDR CONFIG_SYS_LS2080A_XHCI_USB1_ADDR #define CONFIG_SYS_FSL_XHCI_USB2_ADDR CONFIG_SYS_LS2080A_XHCI_USB2_ADDR +#define CONFIG_SYS_FSL_XHCI_USB3_ADDR 0 +#elif defined(CONFIG_LS1043A) +#define CONFIG_SYS_FSL_XHCI_USB1_ADDR CONFIG_SYS_LS1043A_XHCI_USB1_ADDR +#define CONFIG_SYS_FSL_XHCI_USB2_ADDR CONFIG_SYS_LS1043A_XHCI_USB2_ADDR +#define CONFIG_SYS_FSL_XHCI_USB3_ADDR CONFIG_SYS_LS1043A_XHCI_USB3_ADDR #endif #define FSL_USB_XHCI_ADDR {CONFIG_SYS_FSL_XHCI_USB1_ADDR, \ - CONFIG_SYS_FSL_XHCI_USB2_ADDR} + CONFIG_SYS_FSL_XHCI_USB2_ADDR, \ + CONFIG_SYS_FSL_XHCI_USB3_ADDR} #endif /* _ASM_ARCH_XHCI_FSL_H_ */ |