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author | Ye Li <ye.li@nxp.com> | 2016-03-25 14:50:37 +0800 |
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committer | Ye Li <ye.li@nxp.com> | 2016-03-25 14:50:37 +0800 |
commit | bb35d09d140efc7ff9b74bbcd77d7827c1dd503e (patch) | |
tree | b6bafefdfa6c7c879affc1b897e2f2f9ed5464c3 /include | |
parent | 39c2989e6ba0de6b35b2d93acd9d67f889ab4b39 (diff) | |
download | u-boot-imx-bb35d09d140efc7ff9b74bbcd77d7827c1dd503e.zip u-boot-imx-bb35d09d140efc7ff9b74bbcd77d7827c1dd503e.tar.gz u-boot-imx-bb35d09d140efc7ff9b74bbcd77d7827c1dd503e.tar.bz2 |
MLK-12436-10: mx6sabresd: update board code and header file
Align board code and header file with imx_v2015.04.
Update pmic settings.
wrap spi code together using CONFIG_MXC_SPI macro.
To i.MX6SOLO, need to define CONFIG_MX6DL.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Diffstat (limited to 'include')
-rw-r--r-- | include/configs/mx6_common.h | 8 | ||||
-rw-r--r-- | include/configs/mx6sabre_common.h | 9 | ||||
-rw-r--r-- | include/configs/mx6sabresd.h | 30 |
3 files changed, 41 insertions, 6 deletions
diff --git a/include/configs/mx6_common.h b/include/configs/mx6_common.h index e4c4574..03c72ec 100644 --- a/include/configs/mx6_common.h +++ b/include/configs/mx6_common.h @@ -24,6 +24,14 @@ #define CONFIG_BOARD_POSTCLK_INIT #define CONFIG_MXC_GPT_HCLK +#ifdef CONFIG_MX6QP +#define CONFIG_MX6Q +#endif + +#ifdef CONFIG_MX6SOLO +#define CONFIG_MX6DL +#endif + #define CONFIG_SYS_NO_FLASH #define CONFIG_SYS_BOOTM_LEN 0x1000000 diff --git a/include/configs/mx6sabre_common.h b/include/configs/mx6sabre_common.h index b4d802a..667b0a0 100644 --- a/include/configs/mx6sabre_common.h +++ b/include/configs/mx6sabre_common.h @@ -129,7 +129,8 @@ "fi; " \ "fi\0" \ EMMC_ENV \ - "mmcargs=setenv bootargs console=${console},${baudrate} " \ + "smp=" CONFIG_SYS_NOSMP "\0"\ + "mmcargs=setenv bootargs console=${console},${baudrate} ${smp}" \ "root=${mmcroot}\0" \ "loadbootscript=" \ "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ @@ -152,7 +153,7 @@ "else " \ "bootz; " \ "fi;\0" \ - "netargs=setenv bootargs console=${console},${baudrate} " \ + "netargs=setenv bootargs console=${console},${baudrate} ${smp}" \ "root=/dev/nfs " \ "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ "netboot=echo Booting from net ...; " \ @@ -233,6 +234,10 @@ /* Environment organization */ #define CONFIG_ENV_SIZE (8 * 1024) +#ifndef CONFIG_SYS_NOSMP +#define CONFIG_SYS_NOSMP +#endif + #define CONFIG_ENV_IS_IN_MMC #if defined(CONFIG_ENV_IS_IN_MMC) diff --git a/include/configs/mx6sabresd.h b/include/configs/mx6sabresd.h index 5e3c4ba..329bf17 100644 --- a/include/configs/mx6sabresd.h +++ b/include/configs/mx6sabresd.h @@ -18,18 +18,40 @@ #define CONFIG_MACH_TYPE 3980 #define CONFIG_MXC_UART_BASE UART1_BASE #define CONFIG_CONSOLE_DEV "ttymxc0" -#define CONFIG_MMCROOT "/dev/mmcblk1p2" +#define CONFIG_MMCROOT "/dev/mmcblk2p2" /* SDHC3 */ -#define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */ +#if defined(CONFIG_MX6QP) +#define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024) +#elif defined(CONFIG_MX6Q) +#define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024) +#elif defined(CONFIG_MX6DL) +#define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024) +#elif defined(CONFIG_MX6SOLO) +#define PHYS_SDRAM_SIZE (512u * 1024 * 1024) +#endif #include "mx6sabre_common.h" #define CONFIG_SYS_FSL_USDHC_NUM 3 -#if defined(CONFIG_ENV_IS_IN_MMC) #define CONFIG_SYS_MMC_ENV_DEV 1 /* SDHC3 */ +#define CONFIG_SYS_MMC_ENV_PART 0 /* user partition */ + +#ifdef CONFIG_SYS_USE_SPINOR +#define CONFIG_SF_DEFAULT_CS 0 #endif -#define CONFIG_CMD_PCI +/* + * imx6 q/dl/solo pcie would be failed to work properly in kernel, if + * the pcie module is iniialized/enumerated both in uboot and linux + * kernel. + * rootcause:imx6 q/dl/solo pcie don't have the reset mechanism. + * it is only be RESET by the POR. So, the pcie module only be + * initialized/enumerated once in one POR. + * Set to use pcie in kernel defaultly, mask the pcie config here. + * Remove the mask freely, if the uboot pcie functions, rather than + * the kernel's, are required. + */ +/* #define CONFIG_CMD_PCI */ #ifdef CONFIG_CMD_PCI #define CONFIG_PCI #define CONFIG_PCI_PNP |