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authorStefan Roese <sr@denx.de>2015-09-02 11:10:59 +0200
committerTom Rini <trini@konsulko.com>2015-09-11 17:15:14 -0400
commit0ddc5a2dee424be8522fa1d68685dd2eb91f9887 (patch)
treebcdb72a432f3271784da534853302a353fe33e29 /include
parentda53ba0219c65c11a673ec11c0c2ad371c74251f (diff)
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arm: spear: Add BCH4 SW support to SPEAr600 x600 board
This board is equipped with a Micron NAND chip (MT29F1G08ABADAH4) that needs 4-bit ECC. But the SPEAr600 only supports 1-bit HW ECC internally. This patch enables the SW 4-bit BCH support for this board. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Viresh Kumar <viresh.kumar@linaro.org>
Diffstat (limited to 'include')
-rw-r--r--include/configs/x600.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/include/configs/x600.h b/include/configs/x600.h
index 6a57388..f672485 100644
--- a/include/configs/x600.h
+++ b/include/configs/x600.h
@@ -67,6 +67,8 @@
#define CONFIG_MTD_ECC_SOFT
#define CONFIG_SYS_FSMC_NAND_8BIT
#define CONFIG_SYS_NAND_ONFI_DETECTION
+#define CONFIG_NAND_ECC_BCH
+#define CONFIG_BCH
/* UBI/UBI config options */
#define CONFIG_MTD_DEVICE