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authorAkshay Saraswat <akshay.s@samsung.com>2014-05-26 19:20:08 +0530
committerMinkyu Kang <mk7.kang@samsung.com>2014-06-13 17:05:14 +0900
commited32522fe048f9edcb3269c8d5af79c6e8c6daea (patch)
tree61a005141819f84aa56f8588f87cc78f575f42d6 /include
parentc9334fcda90652e2f8c49f4517b728ebc6f5f623 (diff)
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Exynos5420: DMC: Add software read leveling
Sometimes Read DQ and DQS are not in phase. Since, this phase shift differs from board to board, we need to calibrate it at DRAM init phase, that's read DQ calibration. This patch adds SW Read DQ calibration routine to compensate this skew. Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com> Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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