diff options
| author | Peng Fan <peng.fan@nxp.com> | 2015-12-30 17:04:16 +0800 |
|---|---|---|
| committer | guoyin.chen <guoyin.chen@freescale.com> | 2016-03-04 15:53:36 +0800 |
| commit | d675652038004436ce812fbdc53f61a3fee2b187 (patch) | |
| tree | 3cd3b3ab90bb7735430b67725e6a2c8a326405eb /include | |
| parent | 34da3001c08f3d2673e68a8af141ce4792611436 (diff) | |
| download | u-boot-imx-d675652038004436ce812fbdc53f61a3fee2b187.zip u-boot-imx-d675652038004436ce812fbdc53f61a3fee2b187.tar.gz u-boot-imx-d675652038004436ce812fbdc53f61a3fee2b187.tar.bz2 | |
MLK-12102 mmc: fsl: introduce wp_enable
Introudce wp_enable. If want to check WPSPL, then in board code,
need to set wp_enable to 1.
Take i.MX6UL for example, to some boards, they do not use WP singal,
so they does not configure USDHC1_WP_SELECT_INPUT, and its default
value is 0(GPIO1_IO02). However GPIO1_IO02 is muxed for i2c usage and
SION bit set. So USDHC controller can always get wp signal and WPSPL
shows write protect and blocks driver continuing. This is not what
we want to see, so add wp_enable, and if set to 0, just omit the
WPSPL checking and this does not effect normal working of usdhc
controller.
Suggested-by: Ye.Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Diffstat (limited to 'include')
| -rw-r--r-- | include/fsl_esdhc.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/include/fsl_esdhc.h b/include/fsl_esdhc.h index 90338e6..88ad6d8 100644 --- a/include/fsl_esdhc.h +++ b/include/fsl_esdhc.h @@ -2,7 +2,7 @@ * FSL SD/MMC Defines *------------------------------------------------------------------- * - * Copyright 2007-2008, 2010-2013 Freescale Semiconductor, Inc. + * Copyright 2007-2008, 2010-2015 Freescale Semiconductor, Inc. * * SPDX-License-Identifier: GPL-2.0+ */ @@ -168,6 +168,7 @@ struct fsl_esdhc_cfg { u32 esdhc_base; u32 sdhc_clk; u8 max_bus_width; + u8 wp_enable; struct mmc_config cfg; }; |