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authorAnton Vorontsov <avorontsov@ru.mvista.com>2009-10-15 17:47:08 +0400
committerKumar Gala <galak@kernel.crashing.org>2009-10-27 09:44:32 -0500
commita29155e12286cc5ec2df72c1cab28e3659bfdad5 (patch)
tree8fb62d3dff08909c8cedc73d57ce378a2f1f5173 /include
parent7f52ed5ef1b490da282ace3316be381a6abf96a5 (diff)
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mpc85xx: Add eLBC NAND support for MPC8569E-MDS boards
Simply add some defines, and adjust TLBe setup to include some space for eLBC NAND. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'include')
-rw-r--r--include/configs/MPC8569MDS.h23
1 files changed, 23 insertions, 0 deletions
diff --git a/include/configs/MPC8569MDS.h b/include/configs/MPC8569MDS.h
index 3d07a5b..17ea3bb 100644
--- a/include/configs/MPC8569MDS.h
+++ b/include/configs/MPC8569MDS.h
@@ -181,6 +181,29 @@ extern unsigned long get_clock_freq(void);
#define CONFIG_SYS_FLASH_CFI
#define CONFIG_SYS_FLASH_EMPTY_INFO
+/* Chip select 3 - NAND */
+#define CONFIG_SYS_NAND_BASE 0xFC000000
+#define CONFIG_SYS_NAND_BASE_PHYS CONFIG_SYS_NAND_BASE
+#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE, }
+#define CONFIG_SYS_MAX_NAND_DEVICE 1
+#define CONFIG_MTD_NAND_VERIFY_WRITE 1
+#define CONFIG_CMD_NAND 1
+#define CONFIG_NAND_FSL_ELBC 1
+#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
+#define CONFIG_NAND_BR_PRELIM (CONFIG_SYS_NAND_BASE_PHYS \
+ | (2<<BR_DECC_SHIFT) /* Use HW ECC */ \
+ | BR_PS_8 /* Port Size = 8 bit */ \
+ | BR_MS_FCM /* MSEL = FCM */ \
+ | BR_V) /* valid */
+#define CONFIG_NAND_OR_PRELIM (0xFFFC0000 /* length 256K */ \
+ | OR_FCM_CSCT \
+ | OR_FCM_CST \
+ | OR_FCM_CHT \
+ | OR_FCM_SCY_1 \
+ | OR_FCM_TRLX \
+ | OR_FCM_EHTR)
+#define CONFIG_SYS_BR3_PRELIM CONFIG_NAND_BR_PRELIM /* NAND Base Address */
+#define CONFIG_SYS_OR3_PRELIM CONFIG_NAND_OR_PRELIM /* NAND Options */
/*
* SDRAM on the LocalBus