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authorLokesh Vutla <lokeshvutla@ti.com>2013-12-12 15:34:56 +0530
committerTom Rini <trini@ti.com>2013-12-12 17:43:39 -0500
commit5298f21ab3781a8cb7fecd5ef559c81e7605d1f5 (patch)
tree62125bde75ee5fcda1387f6f2bd9b7ceb9f0d187 /include
parentf3ef3609dbb5a9693b2ccdfd4545e73cd273d684 (diff)
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ARM: DRA7xx: Change clk divider setting
Commit "armv7: hw_data: change clock divider setting" updates the setting for m6 divider for 20MHz sys_clk frequency. But missed to update for other sys_clk frequencies. Doing the same. Reported-by: Rajendran, Vinothkumar <vinothr@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
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