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authorAndreas Bießmann <biessmann@corscience.de>2011-04-18 04:12:42 +0000
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2011-05-18 07:56:54 +0200
commit2607ecf26e5482425f8def32a7536604908d99ea (patch)
tree05de9f4b10940cf2a6a66088ae6da57f0ee0b310 /include
parentbf018332ec1a11b7e179060ffc3022ba6091595d (diff)
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mimc200: fix "#define XXXX 1"
Signed-off-by: Andreas Bießmann <biessmann@corscience.de>
Diffstat (limited to 'include')
-rw-r--r--include/configs/mimc200.h56
1 files changed, 28 insertions, 28 deletions
diff --git a/include/configs/mimc200.h b/include/configs/mimc200.h
index f004ec8..66b9477 100644
--- a/include/configs/mimc200.h
+++ b/include/configs/mimc200.h
@@ -26,12 +26,12 @@
#include <asm/arch/hardware.h>
-#define CONFIG_AVR32 1
-#define CONFIG_AT32AP 1
-#define CONFIG_AT32AP7000 1
-#define CONFIG_MIMC200 1
+#define CONFIG_AVR32
+#define CONFIG_AT32AP
+#define CONFIG_AT32AP7000
+#define CONFIG_MIMC200
-#define CONFIG_MIMC200_EXT_FLASH 1
+#define CONFIG_MIMC200_EXT_FLASH
#define CONFIG_SYS_HZ 1000
@@ -40,8 +40,8 @@
* frequency, the HSB and PBB busses to run at 1/2 the PLL frequency
* and the PBA bus to run at 1/4 the PLL frequency.
*/
-#define CONFIG_PLL 1
-#define CONFIG_SYS_POWER_MANAGER 1
+#define CONFIG_PLL
+#define CONFIG_SYS_POWER_MANAGER
#define CONFIG_SYS_OSC0_HZ 10000000
#define CONFIG_SYS_PLL0_DIV 1
#define CONFIG_SYS_PLL0_MUL 15
@@ -69,11 +69,11 @@
#define CONFIG_MIMC200_DBGLINK 1
/* User serviceable stuff */
-#define CONFIG_DOS_PARTITION 1
+#define CONFIG_DOS_PARTITION
-#define CONFIG_CMDLINE_TAG 1
-#define CONFIG_SETUP_MEMORY_TAGS 1
-#define CONFIG_INITRD_TAG 1
+#define CONFIG_CMDLINE_TAG
+#define CONFIG_SETUP_MEMORY_TAGS
+#define CONFIG_INITRD_TAG
#define CONFIG_STACKSIZE (2048)
@@ -83,9 +83,9 @@
#define CONFIG_BOOTCOMMAND \
"fsload boot/uImage; bootm"
-#define CONFIG_SILENT_CONSOLE 1 /* enable silent startup */
-#define CONFIG_DISABLE_CONSOLE 1 /* disable console */
-#define CONFIG_SYS_DEVICE_NULLDEV 1 /* include nulldev device */
+#define CONFIG_SILENT_CONSOLE /* enable silent startup */
+#define CONFIG_DISABLE_CONSOLE /* disable console */
+#define CONFIG_SYS_DEVICE_NULLDEV /* include nulldev device */
#define CONFIG_LCD 1
@@ -94,16 +94,16 @@
* data on the serial line may interrupt the boot sequence.
*/
#define CONFIG_BOOTDELAY 0
-#define CONFIG_ZERO_BOOTDELAY_CHECK 1
-#define CONFIG_AUTOBOOT 1
+#define CONFIG_ZERO_BOOTDELAY_CHECK
+#define CONFIG_AUTOBOOT
/*
* After booting the board for the first time, new ethernet addresses
* should be generated and assigned to the environment variables
* "ethaddr" and "eth1addr". This is normally done during production.
*/
-#define CONFIG_OVERWRITE_ETHADDR_ONCE 1
-#define CONFIG_NET_MULTI 1
+#define CONFIG_OVERWRITE_ETHADDR_ONCE
+#define CONFIG_NET_MULTI
/*
* BOOTP/DHCP options
@@ -124,13 +124,13 @@
#define CONFIG_CMD_MMC
#define CONFIG_CMD_NET
-#define CONFIG_ATMEL_USART 1
-#define CONFIG_MACB 1
-#define CONFIG_PORTMUX_PIO 1
+#define CONFIG_ATMEL_USART
+#define CONFIG_MACB
+#define CONFIG_PORTMUX_PIO
#define CONFIG_SYS_NR_PIOS 5
-#define CONFIG_SYS_HSDRAMC 1
-#define CONFIG_MMC 1
-#define CONFIG_ATMEL_MCI 1
+#define CONFIG_SYS_HSDRAMC
+#define CONFIG_MMC
+#define CONFIG_ATMEL_MCI
#if defined(CONFIG_LCD)
#define CONFIG_CMD_BMP
@@ -151,8 +151,8 @@
#define CONFIG_NR_DRAM_BANKS 1
-#define CONFIG_SYS_FLASH_CFI 1
-#define CONFIG_FLASH_CFI_DRIVER 1
+#define CONFIG_SYS_FLASH_CFI
+#define CONFIG_FLASH_CFI_DRIVER
#define CONFIG_SYS_FLASH_BASE 0x00000000
#define CONFIG_SYS_FLASH_SIZE 0x800000
@@ -168,7 +168,7 @@
#define CONFIG_SYS_FRAM_BASE 0x08000000
#define CONFIG_SYS_FRAM_SIZE 0x20000
-#define CONFIG_ENV_IS_IN_FLASH 1
+#define CONFIG_ENV_IS_IN_FLASH
#define CONFIG_ENV_SIZE 65536
#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_FLASH_SIZE - CONFIG_ENV_SIZE)
@@ -186,7 +186,7 @@
#define CONFIG_SYS_CBSIZE 256
#define CONFIG_SYS_MAXARGS 16
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
-#define CONFIG_SYS_LONGHELP 1
+#define CONFIG_SYS_LONGHELP
#define CONFIG_SYS_MEMTEST_START EBI_SDRAM_BASE
#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x1f00000)