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| author | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2013-09-03 14:59:18 +0200 |
|---|---|---|
| committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2013-09-03 14:59:18 +0200 |
| commit | 31043e20ae748635f142483e8b7b645948687055 (patch) | |
| tree | 14938f7b111485b51fd2ff73a65c046824be131d /include | |
| parent | 6d4511b2c6734842de9de21c1bc0db4c3ea28b72 (diff) | |
| parent | 8258c126143034bef2e35e01b2e14f2d90a7e0b5 (diff) | |
| download | u-boot-imx-31043e20ae748635f142483e8b7b645948687055.zip u-boot-imx-31043e20ae748635f142483e8b7b645948687055.tar.gz u-boot-imx-31043e20ae748635f142483e8b7b645948687055.tar.bz2 | |
Merge branch 'u-boot-tegra/master' into 'u-boot-arm/master'
Diffstat (limited to 'include')
| -rw-r--r-- | include/configs/dalmore.h | 3 | ||||
| -rw-r--r-- | include/configs/tegra-common.h | 3 | ||||
| -rw-r--r-- | include/configs/tegra114-common.h | 3 | ||||
| -rw-r--r-- | include/configs/tegra20-common.h | 3 | ||||
| -rw-r--r-- | include/configs/tegra30-common.h | 3 |
5 files changed, 10 insertions, 5 deletions
diff --git a/include/configs/dalmore.h b/include/configs/dalmore.h index 145e7ac..bdf012b 100644 --- a/include/configs/dalmore.h +++ b/include/configs/dalmore.h @@ -21,9 +21,6 @@ #include "tegra114-common.h" -/* Must be off for Dalmore to boot !?!? FIXME */ -#define CONFIG_SYS_DCACHE_OFF - /* Enable fdt support for Dalmore. Flash the image in u-boot-dtb.bin */ #define CONFIG_DEFAULT_DEVICE_TREE tegra114-dalmore #define CONFIG_OF_CONTROL diff --git a/include/configs/tegra-common.h b/include/configs/tegra-common.h index ccd68a1..ba6c6bb 100644 --- a/include/configs/tegra-common.h +++ b/include/configs/tegra-common.h @@ -17,8 +17,6 @@ #define CONFIG_TEGRA /* which is a Tegra generic machine */ #define CONFIG_SYS_L2CACHE_OFF /* No L2 cache */ -#define CONFIG_SYS_CACHELINE_SIZE 32 - #include <asm/arch/tegra.h> /* get chip and board defs */ /* @@ -135,6 +133,7 @@ #define CONFIG_CMD_GPIO #define CONFIG_CMD_ENTERRCM #define CONFIG_CMD_BOOTZ +#define CONFIG_SUPPORT_RAW_INITRD /* Defines for SPL */ #define CONFIG_SPL diff --git a/include/configs/tegra114-common.h b/include/configs/tegra114-common.h index 44e98e5..c3de9a9 100644 --- a/include/configs/tegra114-common.h +++ b/include/configs/tegra114-common.h @@ -18,6 +18,9 @@ #define _TEGRA114_COMMON_H_ #include "tegra-common.h" +/* Cortex-A15 uses a cache line size of 64 bytes */ +#define CONFIG_SYS_CACHELINE_SIZE 64 + /* * NS16550 Configuration */ diff --git a/include/configs/tegra20-common.h b/include/configs/tegra20-common.h index d5e9ee4..b009a31 100644 --- a/include/configs/tegra20-common.h +++ b/include/configs/tegra20-common.h @@ -9,6 +9,9 @@ #define _TEGRA20_COMMON_H_ #include "tegra-common.h" +/* Cortex-A9 uses a cache line size of 32 bytes */ +#define CONFIG_SYS_CACHELINE_SIZE 32 + /* * Errata configuration */ diff --git a/include/configs/tegra30-common.h b/include/configs/tegra30-common.h index 5ac8816..99acbfd 100644 --- a/include/configs/tegra30-common.h +++ b/include/configs/tegra30-common.h @@ -9,6 +9,9 @@ #define _TEGRA30_COMMON_H_ #include "tegra-common.h" +/* Cortex-A9 uses a cache line size of 32 bytes */ +#define CONFIG_SYS_CACHELINE_SIZE 32 + /* * Errata configuration */ |