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authorNobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>2014-07-28 08:11:21 +0900
committerNobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>2014-10-09 14:45:03 +0900
commitc33e4f11821420018e6d41fda8e554607d54e94f (patch)
treea122f31cf89d8f3da2e7173cb3b9c5032487f320 /include
parent4b19b7448e63bab8af17abbb30acff00d8f0dc99 (diff)
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arm: rmobile: lager: Fix value of CONFIG_SH_SCIF_CLK_FREQ
The clock of SCIF (serial port) of lager is supplied from External Clock. And value of clock is 14.7456MHz. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Diffstat (limited to 'include')
-rw-r--r--include/configs/lager.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/include/configs/lager.h b/include/configs/lager.h
index 6e9d67d..6bd1ce8 100644
--- a/include/configs/lager.h
+++ b/include/configs/lager.h
@@ -167,7 +167,7 @@
#define CONFIG_PLL1_DIV2_CLK_FREQ (CONFIG_PLL1_CLK_FREQ / 2)
#define CONFIG_MP_CLK_FREQ (CONFIG_PLL1_DIV2_CLK_FREQ / 15)
#define CONFIG_HP_CLK_FREQ (CONFIG_PLL1_CLK_FREQ / 12)
-#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_MP_CLK_FREQ
+#define CONFIG_SH_SCIF_CLK_FREQ 14745600 /* External Clock */
#define CONFIG_SYS_TMU_CLK_DIV 4