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authorDave Liu <daveliu@freescale.com>2007-01-19 10:43:26 +0800
committerKim Phillips <kim.phillips@freescale.com>2007-03-02 11:05:54 -0600
commita87c856eb411b9365937d0d4b9c21e46adbe1c14 (patch)
tree65878682733d29ff2cbc9413294f78430c62b5e8 /include
parent97c4b397dce236a7318b304667bf89e59d08b17c (diff)
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mpc83xx: Fix the LAW1/3 bug
The patch solves the alignment problem of the local bus access windows to render accessible the memory bank and PHY registers of UPC 1 (starting at 0xf801 0000). What we actually did was to adjust the sizes of the bus access windows so that the base address alignment requirement would be met. Signed-off-by: Chereji Marian <marian.chereji@freescale.com> Signed-off-by: Gridish Shlomi <gridish@freescale.com> Signed-off-by: Dave Liu <daveliu@freescale.com>
Diffstat (limited to 'include')
-rw-r--r--include/configs/MPC8360EMDS.h6
1 files changed, 3 insertions, 3 deletions
diff --git a/include/configs/MPC8360EMDS.h b/include/configs/MPC8360EMDS.h
index fd61ea5..d613618 100644
--- a/include/configs/MPC8360EMDS.h
+++ b/include/configs/MPC8360EMDS.h
@@ -188,7 +188,7 @@
*/
#define CFG_BCSR 0xF8000000
#define CFG_LBLAWBAR1_PRELIM CFG_BCSR /* Access window base at BCSR base */
-#define CFG_LBLAWAR1_PRELIM 0x8000000E /* Access window size 32K */
+#define CFG_LBLAWAR1_PRELIM 0x8000000F /* Access window size 64K */
#define CFG_BR1_PRELIM (CFG_BCSR|0x00000801) /* Port size=8bit, MSEL=GPCM */
#define CFG_OR1_PRELIM 0xFFFFE9f7 /* length 32K */
@@ -278,8 +278,8 @@
/*
* Windows to access PIB via local bus
*/
-#define CFG_LBLAWBAR3_PRELIM 0xf8008000 /* windows base 0xf8008000 */
-#define CFG_LBLAWAR3_PRELIM 0x8000000f /* windows size 64KB */
+#define CFG_LBLAWBAR3_PRELIM 0xf8010000 /* windows base 0xf8010000 */
+#define CFG_LBLAWAR3_PRELIM 0x8000000e /* windows size 32KB */
/*
* CS4 on Local Bus, to PIB