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authorWolfgang Denk <wd@denx.de>2011-04-10 21:06:27 +0200
committerWolfgang Denk <wd@denx.de>2011-04-10 21:06:27 +0200
commita8708a86344794d7d9a25c71d2fe56b36563a0b5 (patch)
treec9b5d8218aec01c2518b544d1bf8a5b0269702ce /include
parent6ee1416e8184b4d9ebe6087d396a60bcecf3551c (diff)
parentd1f3ac9ee4dfc1a43fb7a786548bf0b6f2780695 (diff)
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Merge branch 'master' of git://git.denx.de/u-boot-blackfin
Diffstat (limited to 'include')
-rw-r--r--include/configs/bct-brettl2.h3
-rw-r--r--include/configs/bf506f-ezkit.h103
-rw-r--r--include/configs/bf518f-ezbrd.h1
-rw-r--r--include/configs/bf525-ucr2.h102
-rw-r--r--include/configs/bf526-ezbrd.h1
-rw-r--r--include/configs/bf527-ad7160-eval.h1
-rw-r--r--include/configs/bf527-ezkit.h1
-rw-r--r--include/configs/bf527-sdp.h1
-rw-r--r--include/configs/bf533-ezkit.h1
-rw-r--r--include/configs/bf533-stamp.h1
-rw-r--r--include/configs/bf537-minotaur.h2
-rw-r--r--include/configs/bf537-pnav.h1
-rw-r--r--include/configs/bf537-srv1.h2
-rw-r--r--include/configs/bf537-stamp.h1
-rw-r--r--include/configs/bf538f-ezkit.h1
-rw-r--r--include/configs/bf548-ezkit.h3
-rw-r--r--include/configs/bf561-acvilon.h3
-rw-r--r--include/configs/bf561-ezkit.h5
-rw-r--r--include/configs/bfin_adi_common.h3
-rw-r--r--include/configs/blackstamp.h1
-rw-r--r--include/configs/blackvme.h3
-rw-r--r--include/configs/cm-bf527.h1
-rw-r--r--include/configs/cm-bf533.h1
-rw-r--r--include/configs/cm-bf537e.h1
-rw-r--r--include/configs/cm-bf537u.h1
-rw-r--r--include/configs/cm-bf548.h1
-rw-r--r--include/configs/cm-bf561.h1
-rw-r--r--include/configs/dnp5370.h128
-rw-r--r--include/configs/ibf-dsp561.h5
-rw-r--r--include/configs/ip04.h1
-rw-r--r--include/configs/tcm-bf518.h1
-rw-r--r--include/configs/tcm-bf537.h1
32 files changed, 373 insertions, 9 deletions
diff --git a/include/configs/bct-brettl2.h b/include/configs/bct-brettl2.h
index fa72c7f..a55e178 100644
--- a/include/configs/bct-brettl2.h
+++ b/include/configs/bct-brettl2.h
@@ -11,7 +11,8 @@
/*
* Processor Settings
*/
-#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_BYPASS
+#define CONFIG_BFIN_CPU bf536-0.3
+#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_BYPASS
/*
diff --git a/include/configs/bf506f-ezkit.h b/include/configs/bf506f-ezkit.h
new file mode 100644
index 0000000..3580ec6
--- /dev/null
+++ b/include/configs/bf506f-ezkit.h
@@ -0,0 +1,103 @@
+/*
+ * U-boot - Configuration file for BF506F EZ-Kit board
+ */
+
+#ifndef __CONFIG_BF506F_EZKIT_H__
+#define __CONFIG_BF506F_EZKIT_H__
+
+#include <asm/config-pre.h>
+
+
+/*
+ * Processor Settings
+ */
+#define CONFIG_BFIN_CPU bf506-0.0
+#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_PARA
+
+
+/*
+ * Clock Settings
+ * CCLK = (CLKIN * VCO_MULT) / CCLK_DIV
+ * SCLK = (CLKIN * VCO_MULT) / SCLK_DIV
+ */
+/* CONFIG_CLKIN_HZ is any value in Hz */
+#define CONFIG_CLKIN_HZ 25000000
+/* CLKIN_HALF controls the DF bit in PLL_CTL 0 = CLKIN */
+/* 1 = CLKIN / 2 */
+#define CONFIG_CLKIN_HALF 0
+/* PLL_BYPASS controls the BYPASS bit in PLL_CTL 0 = do not bypass */
+/* 1 = bypass PLL */
+#define CONFIG_PLL_BYPASS 0
+/* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL */
+/* Values can range from 0-63 (where 0 means 64) */
+#define CONFIG_VCO_MULT 16
+/* CCLK_DIV controls the core clock divider */
+/* Values can be 1, 2, 4, or 8 ONLY */
+#define CONFIG_CCLK_DIV 1
+/* SCLK_DIV controls the system clock divider */
+/* Values can range from 1-15 */
+#define CONFIG_SCLK_DIV 5
+
+
+/*
+ * Memory Settings
+ */
+#define CONFIG_MEM_SIZE 0
+
+#define CONFIG_EBIU_AMGCTL_VAL (AMCKEN | AMBEN_ALL)
+#define CONFIG_EBIU_AMBCTL0_VAL 0xffc2ffc2
+#define CONFIG_EBIU_AMBCTL1_VAL 0xffc2ffc2
+
+#define CONFIG_SYS_MONITOR_BASE (L1_DATA_A_SRAM_END)
+#define CONFIG_SYS_MONITOR_LEN (4 * 1024)
+#define CONFIG_SYS_MALLOC_LEN (4 * 1024)
+
+
+/*
+ * Flash Settings
+ */
+#define CONFIG_FLASH_CFI_DRIVER
+#define CONFIG_SYS_FLASH_BASE 0x20000000
+#define CONFIG_SYS_FLASH_CFI
+#define CONFIG_SYS_MAX_FLASH_BANKS 1
+#define CONFIG_SYS_MAX_FLASH_SECT 71
+#define CONFIG_CMD_FLASH
+#define CONFIG_MONITOR_IS_IN_RAM
+
+
+/*
+ * SPI Settings
+ */
+#define CONFIG_BFIN_SPI
+#define CONFIG_ENV_SPI_MAX_HZ 30000000
+#define CONFIG_SF_DEFAULT_SPEED 30000000
+#define CONFIG_SPI_FLASH
+#define CONFIG_SPI_FLASH_STMICRO
+#define CONFIG_CMD_SF
+#define CONFIG_CMD_SPI
+
+
+/*
+ * Env Storage Settings
+ */
+#define CONFIG_ENV_IS_NOWHERE
+#define CONFIG_ENV_SIZE 0x400
+
+
+/*
+ * Misc Settings
+ */
+#define CONFIG_BOARD_EARLY_INIT_F
+#define CONFIG_ICACHE_OFF
+#define CONFIG_DCACHE_OFF
+#define CONFIG_UART_CONSOLE 0
+#define CONFIG_BAUDRATE 115200
+
+#define CONFIG_CMD_MEMORY
+#undef CONFIG_GZIP
+#undef CONFIG_ZLIB
+#undef CONFIG_CMD_BOOTM
+#undef CONFIG_BOOTM_RTEMS
+#undef CONFIG_BOOTM_LINUX
+
+#endif
diff --git a/include/configs/bf518f-ezbrd.h b/include/configs/bf518f-ezbrd.h
index 64ca9ed..6eec1c9 100644
--- a/include/configs/bf518f-ezbrd.h
+++ b/include/configs/bf518f-ezbrd.h
@@ -11,6 +11,7 @@
/*
* Processor Settings
*/
+#define CONFIG_BFIN_CPU bf518-0.0
#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_PARA
diff --git a/include/configs/bf525-ucr2.h b/include/configs/bf525-ucr2.h
new file mode 100644
index 0000000..1f65130
--- /dev/null
+++ b/include/configs/bf525-ucr2.h
@@ -0,0 +1,102 @@
+/*
+ * U-boot - Configuration file for bf525-ucr2 board
+ * The board includes ADSP-BF525 rev. 0.2,
+ * 32-bit SDRAM (SAMSUNG K4S561632H-UC75),
+ * USB 2.0 High Speed OTG USB WIFI,
+ * SPI flash (cFeon EN25Q128 16 MB),
+ * Support PPI and ITU-R656,
+ * See http://www.ucrobotics.com/?q=cn/ucr2
+ */
+
+#ifndef __CONFIG_BF525_UCR2_H__
+#define __CONFIG_BF525_UCR2_H__
+
+#include <asm/config-pre.h>
+
+/*
+ * Processor Settings
+ */
+#define CONFIG_BFIN_CPU bf525-0.2
+#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_SPI_MASTER
+
+/*
+ * Clock Settings
+ * CCLK = (CLKIN * VCO_MULT) / CCLK_DIV
+ * SCLK = (CLKIN * VCO_MULT) / SCLK_DIV
+ */
+/* CONFIG_CLKIN_HZ is any value in Hz */
+#define CONFIG_CLKIN_HZ 24000000
+/* CLKIN_HALF controls the DF bit in PLL_CTL 0 = CLKIN */
+/* 1 = CLKIN / 2 */
+#define CONFIG_CLKIN_HALF 0
+/* PLL_BYPASS controls the BYPASS bit in PLL_CTL 0 = do not bypass */
+/* 1 = bypass PLL */
+#define CONFIG_PLL_BYPASS 0
+/* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL */
+/* Values can range from 0-63 (where 0 means 64) */
+#define CONFIG_VCO_MULT 20
+/* CCLK_DIV controls the core clock divider */
+/* Values can be 1, 2, 4, or 8 ONLY */
+#define CONFIG_CCLK_DIV 1
+/* SCLK_DIV controls the system clock divider */
+/* Values can range from 1-15 */
+#define CONFIG_SCLK_DIV 4
+
+/*
+ * Memory Settings
+ */
+#define CONFIG_MEM_ADD_WDTH 9
+#define CONFIG_MEM_SIZE 32
+
+/*
+ * SDRAM reference page
+ * http://docs.blackfin.uclinux.org/doku.php?id=bfin:sdram
+ */
+#define CONFIG_EBIU_SDRRC_VAL 0x3f8
+#define CONFIG_EBIU_SDGCTL_VAL 0x9111cd
+
+#define CONFIG_EBIU_AMGCTL_VAL (AMBEN_ALL)
+#define CONFIG_EBIU_AMBCTL0_VAL (B1WAT_7 | B1RAT_11 | B1HT_2 | B1ST_3 | B0WAT_7 | B0RAT_11 | B0HT_2 | B0ST_3)
+#define CONFIG_EBIU_AMBCTL1_VAL (B3WAT_7 | B3RAT_11 | B3HT_2 | B3ST_3 | B2WAT_7 | B2RAT_11 | B2HT_2 | B2ST_3)
+
+#define CONFIG_SYS_MONITOR_LEN (320 * 1024)
+#define CONFIG_SYS_MALLOC_LEN (320 * 1024)
+
+/* We don't have a parallel flash chip */
+#define CONFIG_SYS_NO_FLASH
+
+/* support for serial flash */
+#define CONFIG_BFIN_SPI
+#define CONFIG_SPI_FLASH
+#define CONFIG_CMD_SF
+#define CONFIG_SF_DEFAULT_HZ 30000000
+#define CONFIG_SPI_FLASH_EON
+
+#define CONFIG_ENV_IS_IN_SPI_FLASH
+#define CONFIG_ENV_SPI_MAX_HZ 30000000
+#define CONFIG_ENV_OFFSET 0x10000
+#define CONFIG_ENV_SIZE 0x10000
+#define CONFIG_ENV_SECT_SIZE 0x10000
+#define CONFIG_ENV_OVERWRITE 1
+
+/*
+ * Misc Settings
+ */
+#define CONFIG_UART_CONSOLE 0
+
+#define CONFIG_BAUDRATE 115200
+#define CONFIG_BOOTARGS "root=/dev/mtdblock0 rw"
+#define CONFIG_BOOTCOMMAND "run sfboot"
+#define CONFIG_BOOTDELAY 5
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "sfboot=sf probe 1;" \
+ "sf read 0x1000000 0x20000 0x300000;" \
+ "bootm 0x1000000\0"
+
+/* this sets up the default list of enabled commands */
+#include <config_cmd_default.h>
+#undef CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */
+#undef CONFIG_CMD_NFS
+#undef CONFIG_CMD_IMLS
+
+#endif
diff --git a/include/configs/bf526-ezbrd.h b/include/configs/bf526-ezbrd.h
index 4c30c25..c28f867 100644
--- a/include/configs/bf526-ezbrd.h
+++ b/include/configs/bf526-ezbrd.h
@@ -11,6 +11,7 @@
/*
* Processor Settings
*/
+#define CONFIG_BFIN_CPU bf526-0.0
#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_PARA
diff --git a/include/configs/bf527-ad7160-eval.h b/include/configs/bf527-ad7160-eval.h
index 14ade1b..889bfde 100644
--- a/include/configs/bf527-ad7160-eval.h
+++ b/include/configs/bf527-ad7160-eval.h
@@ -11,6 +11,7 @@
/*
* Processor Settings
*/
+#define CONFIG_BFIN_CPU bf527-0.2
#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_SPI_MASTER
diff --git a/include/configs/bf527-ezkit.h b/include/configs/bf527-ezkit.h
index fa9053b..22a5639 100644
--- a/include/configs/bf527-ezkit.h
+++ b/include/configs/bf527-ezkit.h
@@ -11,6 +11,7 @@
/*
* Processor Settings
*/
+#define CONFIG_BFIN_CPU bf527-0.0
#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_PARA
diff --git a/include/configs/bf527-sdp.h b/include/configs/bf527-sdp.h
index 3582846..c0e8b5a 100644
--- a/include/configs/bf527-sdp.h
+++ b/include/configs/bf527-sdp.h
@@ -11,6 +11,7 @@
/*
* Processor Settings
*/
+#define CONFIG_BFIN_CPU bf527-0.2
#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_PARA
diff --git a/include/configs/bf533-ezkit.h b/include/configs/bf533-ezkit.h
index e1bb594..95d3afa 100644
--- a/include/configs/bf533-ezkit.h
+++ b/include/configs/bf533-ezkit.h
@@ -11,6 +11,7 @@
/*
* Processor Settings
*/
+#define CONFIG_BFIN_CPU bf533-0.3
#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_BYPASS
diff --git a/include/configs/bf533-stamp.h b/include/configs/bf533-stamp.h
index bf0f063..cb37ee7 100644
--- a/include/configs/bf533-stamp.h
+++ b/include/configs/bf533-stamp.h
@@ -11,6 +11,7 @@
/*
* Processor Settings
*/
+#define CONFIG_BFIN_CPU bf533-0.3
#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_BYPASS
diff --git a/include/configs/bf537-minotaur.h b/include/configs/bf537-minotaur.h
index 0ba29bc..11929c7 100644
--- a/include/configs/bf537-minotaur.h
+++ b/include/configs/bf537-minotaur.h
@@ -24,6 +24,7 @@
/*
* Processor Settings
*/
+#define CONFIG_BFIN_CPU bf537-0.2
#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_SPI_MASTER
@@ -155,6 +156,7 @@
# define CONFIG_CMD_PING
#else
# undef CONFIG_CMD_NET
+# undef CONFIG_CMD_NFS
#endif
#define CONFIG_CMD_BOOTLDR
diff --git a/include/configs/bf537-pnav.h b/include/configs/bf537-pnav.h
index da4f2f2..0913ce4 100644
--- a/include/configs/bf537-pnav.h
+++ b/include/configs/bf537-pnav.h
@@ -11,6 +11,7 @@
/*
* Processor Settings
*/
+#define CONFIG_BFIN_CPU bf537-0.2
#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_SPI_MASTER
diff --git a/include/configs/bf537-srv1.h b/include/configs/bf537-srv1.h
index 559428f..e8024d7 100644
--- a/include/configs/bf537-srv1.h
+++ b/include/configs/bf537-srv1.h
@@ -24,6 +24,7 @@
/*
* Processor Settings
*/
+#define CONFIG_BFIN_CPU bf537-0.2
#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_SPI_MASTER
@@ -155,6 +156,7 @@
# define CONFIG_CMD_PING
#else
# undef CONFIG_CMD_NET
+# undef CONFIG_CMD_NFS
#endif
#define CONFIG_CMD_BOOTLDR
diff --git a/include/configs/bf537-stamp.h b/include/configs/bf537-stamp.h
index 2d1930c..3da2375 100644
--- a/include/configs/bf537-stamp.h
+++ b/include/configs/bf537-stamp.h
@@ -11,6 +11,7 @@
/*
* Processor Settings
*/
+#define CONFIG_BFIN_CPU bf537-0.2
#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_BYPASS
diff --git a/include/configs/bf538f-ezkit.h b/include/configs/bf538f-ezkit.h
index 2469c6a..717a35a 100644
--- a/include/configs/bf538f-ezkit.h
+++ b/include/configs/bf538f-ezkit.h
@@ -11,6 +11,7 @@
/*
* Processor Settings
*/
+#define CONFIG_BFIN_CPU bf538-0.4
#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_BYPASS
diff --git a/include/configs/bf548-ezkit.h b/include/configs/bf548-ezkit.h
index 1c035cf..4d7d877 100644
--- a/include/configs/bf548-ezkit.h
+++ b/include/configs/bf548-ezkit.h
@@ -11,6 +11,7 @@
/*
* Processor Settings
*/
+#define CONFIG_BFIN_CPU bf548-0.0
#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_PARA
@@ -109,7 +110,7 @@
#define CONFIG_ENV_IS_EMBEDDED_IN_LDR
#elif (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_NAND)
#define CONFIG_ENV_IS_IN_NAND
-#define CONFIG_ENV_OFFSET 0x40000
+#define CONFIG_ENV_OFFSET 0x60000
#define CONFIG_ENV_SIZE 0x20000
#else
#define CONFIG_ENV_IS_IN_FLASH 1
diff --git a/include/configs/bf561-acvilon.h b/include/configs/bf561-acvilon.h
index 2b12c3f..1490b2f 100644
--- a/include/configs/bf561-acvilon.h
+++ b/include/configs/bf561-acvilon.h
@@ -12,7 +12,8 @@
/*
* Processor Settings
*/
-#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_BYPASS
+#define CONFIG_BFIN_CPU bf561-0.5
+#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_BYPASS
/*
diff --git a/include/configs/bf561-ezkit.h b/include/configs/bf561-ezkit.h
index 7b020e6..33c7e18 100644
--- a/include/configs/bf561-ezkit.h
+++ b/include/configs/bf561-ezkit.h
@@ -11,6 +11,7 @@
/*
* Processor Settings
*/
+#define CONFIG_BFIN_CPU bf561-0.3
#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_BYPASS
@@ -79,8 +80,8 @@
#define CONFIG_SYS_MAX_FLASH_SECT 135
/* The BF561-EZKIT uses a top boot flash */
#define CONFIG_ENV_IS_IN_FLASH 1
-#define CONFIG_ENV_ADDR 0x20004000
-#define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE)
+#define CONFIG_ENV_OFFSET 0x4000
+#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET)
#define CONFIG_ENV_SIZE 0x2000
#define CONFIG_ENV_SECT_SIZE 0x10000
#if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_BYPASS)
diff --git a/include/configs/bfin_adi_common.h b/include/configs/bfin_adi_common.h
index 03c6433..a9c66be 100644
--- a/include/configs/bfin_adi_common.h
+++ b/include/configs/bfin_adi_common.h
@@ -85,9 +85,9 @@
# define CONFIG_CMD_CACHE
# define CONFIG_CMD_CPLBINFO
# define CONFIG_CMD_ELF
-# define CONFIG_ELF_SIMPLE_LOAD
# define CONFIG_CMD_GPIO
# define CONFIG_CMD_KGDB
+# define CONFIG_CMD_LDRINFO
# define CONFIG_CMD_REGINFO
# define CONFIG_CMD_STRINGS
# if defined(__ADSPBF51x__) || defined(__ADSPBF52x__) || defined(__ADSPBF54x__)
@@ -300,5 +300,6 @@
#endif
#define CONFIG_BFIN_SPI_GPIO_CS /* Only matters if BFIN_SPI is enabled */
#define CONFIG_LZMA
+#define CONFIG_MONITOR_IS_IN_RAM
#endif
diff --git a/include/configs/blackstamp.h b/include/configs/blackstamp.h
index 3f5c959..85f08ea 100644
--- a/include/configs/blackstamp.h
+++ b/include/configs/blackstamp.h
@@ -24,6 +24,7 @@
/* CPU Options
* Be sure to set the Silicon Revision Correctly
*/
+#define CONFIG_BFIN_CPU bf532-0.5
#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_SPI_MASTER
/*
diff --git a/include/configs/blackvme.h b/include/configs/blackvme.h
index e4688a2..9950e44 100644
--- a/include/configs/blackvme.h
+++ b/include/configs/blackvme.h
@@ -23,7 +23,8 @@
#define CONFIG_PANIC_HANG 0
/* CPU Options */
-#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_SPI_MASTER
+#define CONFIG_BFIN_CPU bf561-0.5
+#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_SPI_MASTER
/*
* CLOCK SETTINGS CAVEAT
diff --git a/include/configs/cm-bf527.h b/include/configs/cm-bf527.h
index 84c9309..e0c6d53 100644
--- a/include/configs/cm-bf527.h
+++ b/include/configs/cm-bf527.h
@@ -11,6 +11,7 @@
/*
* Processor Settings
*/
+#define CONFIG_BFIN_CPU bf527-0.0
#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_PARA
diff --git a/include/configs/cm-bf533.h b/include/configs/cm-bf533.h
index dbc4a5b..7515296 100644
--- a/include/configs/cm-bf533.h
+++ b/include/configs/cm-bf533.h
@@ -11,6 +11,7 @@
/*
* Processor Settings
*/
+#define CONFIG_BFIN_CPU bf533-0.3
#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_BYPASS
diff --git a/include/configs/cm-bf537e.h b/include/configs/cm-bf537e.h
index c3de96a..934b74b 100644
--- a/include/configs/cm-bf537e.h
+++ b/include/configs/cm-bf537e.h
@@ -11,6 +11,7 @@
/*
* Processor Settings
*/
+#define CONFIG_BFIN_CPU bf537-0.2
#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_BYPASS
diff --git a/include/configs/cm-bf537u.h b/include/configs/cm-bf537u.h
index e60ebf2..c274c20 100644
--- a/include/configs/cm-bf537u.h
+++ b/include/configs/cm-bf537u.h
@@ -11,6 +11,7 @@
/*
* Processor Settings
*/
+#define CONFIG_BFIN_CPU bf537-0.2
#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_BYPASS
diff --git a/include/configs/cm-bf548.h b/include/configs/cm-bf548.h
index 27b1cc5..fa62a8e 100644
--- a/include/configs/cm-bf548.h
+++ b/include/configs/cm-bf548.h
@@ -11,6 +11,7 @@
/*
* Processor Settings
*/
+#define CONFIG_BFIN_CPU bf548-0.0
#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_PARA
diff --git a/include/configs/cm-bf561.h b/include/configs/cm-bf561.h
index 8c350bc..c60401c 100644
--- a/include/configs/cm-bf561.h
+++ b/include/configs/cm-bf561.h
@@ -11,6 +11,7 @@
/*
* Processor Settings
*/
+#define CONFIG_BFIN_CPU bf561-0.3
#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_PARA
diff --git a/include/configs/dnp5370.h b/include/configs/dnp5370.h
new file mode 100644
index 0000000..6b328a5
--- /dev/null
+++ b/include/configs/dnp5370.h
@@ -0,0 +1,128 @@
+/*
+ * U-boot - Configuration file for SSV DNP5370 board
+ */
+
+#ifndef __CONFIG_DNP5370_H__
+#define __CONFIG_DNP5370_H__
+
+/* this must come first */
+#include <asm/config-pre.h>
+
+/*
+ * Processor Settings
+ */
+#define CONFIG_BFIN_CPU bf537-0.3
+#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_BYPASS
+
+/*
+ * Clock Settings
+ * CCLK = (CLKIN * VCO_MULT) / CCLK_DIV
+ * SCLK = (CLKIN * VCO_MULT) / SCLK_DIV
+ */
+#define CONFIG_CLKIN_HZ 25000000
+#define CONFIG_CLKIN_HALF 0
+#define CONFIG_PLL_BYPASS 0
+#define CONFIG_VCO_MULT 24
+#define CONFIG_CCLK_DIV 1
+#define CONFIG_SCLK_DIV 5
+
+/*
+ * Memory Settings
+ */
+#define CONFIG_MEM_ADD_WDTH 9
+#define CONFIG_MEM_SIZE 32
+
+#define CONFIG_EBIU_SDRRC_VAL 0x03a0
+#define CONFIG_EBIU_SDBCTL_VAL 0x0013
+#define CONFIG_EBIU_SDGCTL_VAL 0x8091998d
+
+#define CONFIG_EBIU_AMGCTL_VAL 0xF7
+#define CONFIG_EBIU_AMBCTL0_VAL 0x7BB07BB0
+#define CONFIG_EBIU_AMBCTL1_VAL 0xFFC27BB0
+
+#define CONFIG_SYS_MONITOR_LEN (256 * 1024)
+#define CONFIG_SYS_MALLOC_LEN (128 * 1024)
+
+/*
+ * Network Settings
+ */
+#ifndef __ADSPBF534__
+#define CONFIG_ROOTPATH /romfs
+
+#define CONFIG_NET_MULTI 1
+#define CONFIG_BFIN_MAC 1
+#define CONFIG_PHY_ADDR 0
+#define CONFIG_RMII 1
+
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_PING
+#endif
+
+/*
+ * Flash Settings
+ *
+ * Only 3 MB of the 4 MB NOR flash are addressable.
+ * But limiting the flash size does not seem to work.
+ * It seems the CFI detection has precedence.
+ */
+#define CONFIG_FLASH_CFI_DRIVER
+#define CONFIG_SYS_FLASH_BASE 0x20000000
+#define CONFIG_SYS_FLASH_CFI
+#define CONFIG_SYS_FLASH_PROTECTION
+#define CONFIG_SYS_MAX_FLASH_BANKS 1
+#define CONFIG_SYS_MAX_FLASH_SECT 71 /* (M29W320EB) */
+
+/* 512k reserved for u-boot */
+#define CONFIG_SYS_JFFS2_FIRST_SECTOR 15
+
+/*
+ * Env Storage Settings
+ */
+#define CONFIG_ENV_IS_IN_FLASH 1
+#define CONFIG_ENV_ADDR 0x20004000
+#define CONFIG_ENV_SIZE 0x00002000
+#define CONFIG_ENV_SECT_SIZE 0x00002000 /* Total Size of Environment Sector */
+#define CONFIG_ENV_OFFSET 0x00004000 /* (CONFIG_ENV_ADDR - CONFIG_FLASH_BASE) */
+
+#define ENV_IS_EMBEDDED
+#define LDS_BOARD_TEXT \
+ arch/blackfin/lib/libblackfin.o (.text*); \
+ arch/blackfin/cpu/libblackfin.o (.text*); \
+ . = DEFINED(env_offset) ? env_offset : .; \
+ common/env_embedded.o (.text*);
+
+/*
+ * Misc Settings
+ */
+#define CONFIG_CMD_GPIO
+#define CONFIG_CMD_STRINGS
+#define CONFIG_MISC_INIT_R
+#define CONFIG_RTC_BFIN
+#define CONFIG_SYS_LONGHELP
+
+/* This disables the hardware watchdog (not inside the bfin) */
+#define CONFIG_DNP5370_EXT_WD_DISABLE 1
+
+#define CONFIG_UART_CONSOLE 0
+#define CONFIG_BAUDRATE 115200
+#define CONFIG_BOOTCOMMAND "bootm 0x20030000"
+#define CONFIG_BOOTARGS "console=ttyBF0,115200 root=/dev/mtdblock3 rootfstype=ext2"
+
+/* Convenience commands to update Linux in NOR flash */
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "fetchme=tftpboot 0x01000000 uImage;" \
+ "iminfo\0" \
+ "flashme=protect off 0x20030000 0x2003ffff;" \
+ "erase 0x20030000 0x202effff;" \
+ "cp.b 0x01000000 0x20030000 0x2c0000\0" \
+ "runme=bootm 0x01000000\0"
+
+/* this sets up the default list of enabled commands */
+#include <config_cmd_default.h>
+
+#ifndef CONFIG_BFIN_MAC
+# undef CONFIG_CMD_NET
+# undef CONFIG_CMD_NFS
+#endif
+
+#endif
diff --git a/include/configs/ibf-dsp561.h b/include/configs/ibf-dsp561.h
index e2dbbb1..055f8a0 100644
--- a/include/configs/ibf-dsp561.h
+++ b/include/configs/ibf-dsp561.h
@@ -11,6 +11,7 @@
/*
* Processor Settings
*/
+#define CONFIG_BFIN_CPU bf561-0.5
#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_BYPASS
@@ -79,8 +80,8 @@
#define CONFIG_SYS_MAX_FLASH_SECT 135 /* max number of sectors on one chip */
/* The BF561-EZKIT uses a top boot flash */
#define CONFIG_ENV_IS_IN_FLASH 1
-#define CONFIG_ENV_ADDR 0x20004000
-#define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE)
+#define CONFIG_ENV_OFFSET 0x4000
+#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET)
#define CONFIG_ENV_SIZE 0x2000
#define CONFIG_ENV_SECT_SIZE 0x10000 /* Total Size of Environment Sector */
#if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_BYPASS)
diff --git a/include/configs/ip04.h b/include/configs/ip04.h
index 528363c..c024d78 100644
--- a/include/configs/ip04.h
+++ b/include/configs/ip04.h
@@ -20,6 +20,7 @@
/*
* Processor Settings
*/
+#define CONFIG_BFIN_CPU bf532-0.5
#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_NAND
diff --git a/include/configs/tcm-bf518.h b/include/configs/tcm-bf518.h
index 042d789..52055e8 100644
--- a/include/configs/tcm-bf518.h
+++ b/include/configs/tcm-bf518.h
@@ -11,6 +11,7 @@
/*
* Processor Settings
*/
+#define CONFIG_BFIN_CPU bf518-0.0
#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_PARA
diff --git a/include/configs/tcm-bf537.h b/include/configs/tcm-bf537.h
index 9036ce3..8ded175 100644
--- a/include/configs/tcm-bf537.h
+++ b/include/configs/tcm-bf537.h
@@ -11,6 +11,7 @@
/*
* Processor Settings
*/
+#define CONFIG_BFIN_CPU bf537-0.2
#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_BYPASS