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| author | Wolfgang Denk <wd@denx.de> | 2011-04-29 22:45:50 +0200 |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2011-04-29 22:45:50 +0200 |
| commit | a146bcc208127718443a6ca3ad4edc30d289ad9f (patch) | |
| tree | 6b76559a98ead975c671703f91ae8d831677a653 /include | |
| parent | 1911602b68f9f6cb2b11dde460aa42d17fb1f700 (diff) | |
| parent | abe2c93ffb13d58985503595e0151bf03a4a6c2a (diff) | |
| download | u-boot-imx-a146bcc208127718443a6ca3ad4edc30d289ad9f.zip u-boot-imx-a146bcc208127718443a6ca3ad4edc30d289ad9f.tar.gz u-boot-imx-a146bcc208127718443a6ca3ad4edc30d289ad9f.tar.bz2 | |
Merge branch 'master' of git://git.denx.de/u-boot-mmc
Diffstat (limited to 'include')
| -rw-r--r-- | include/configs/ca9x4_ct_vxp.h | 4 | ||||
| -rw-r--r-- | include/mmc.h | 46 |
2 files changed, 26 insertions, 24 deletions
diff --git a/include/configs/ca9x4_ct_vxp.h b/include/configs/ca9x4_ct_vxp.h index 860f17a..7f83249 100644 --- a/include/configs/ca9x4_ct_vxp.h +++ b/include/configs/ca9x4_ct_vxp.h @@ -89,6 +89,10 @@ #define CONFIG_MMC 1 #define CONFIG_CMD_MMC #define CONFIG_GENERIC_MMC +#define CONFIG_ARM_PL180_MMCI +#define CONFIG_ARM_PL180_MMCI_BASE 0x10005000 +#define CONFIG_SYS_MMC_MAX_BLK_COUNT 127 +#define CONFIG_ARM_PL180_MMCI_CLOCK_FREQ 6250000 /* BOOTP options */ #define CONFIG_BOOTP_BOOTFILESIZE diff --git a/include/mmc.h b/include/mmc.h index e0a56d9..f7f2286 100644 --- a/include/mmc.h +++ b/include/mmc.h @@ -14,7 +14,7 @@ * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License @@ -94,14 +94,14 @@ #define MMC_HS_TIMING 0x00000100 #define MMC_HS_52MHZ 0x2 -#define OCR_BUSY 0x80000000 -#define OCR_HCS 0x40000000 +#define OCR_BUSY 0x80000000 +#define OCR_HCS 0x40000000 #define OCR_VOLTAGE_MASK 0x007FFF80 #define OCR_ACCESS_MODE 0x60000000 #define MMC_STATUS_MASK (~0x0206BF7F) -#define MMC_STATUS_RDY_FOR_DATA (1<<8) -#define MMC_STATUS_CURR_STATE (0xf<<9) +#define MMC_STATUS_RDY_FOR_DATA (1 << 8) +#define MMC_STATUS_CURR_STATE (0xf << 9) #define MMC_VDD_165_195 0x00000080 /* VDD voltage 1.65 - 1.95 */ #define MMC_VDD_20_21 0x00000100 /* VDD voltage 2.0 ~ 2.1 */ @@ -147,12 +147,12 @@ * EXT_CSD field definitions */ -#define EXT_CSD_CMD_SET_NORMAL (1<<0) -#define EXT_CSD_CMD_SET_SECURE (1<<1) -#define EXT_CSD_CMD_SET_CPSECURE (1<<2) +#define EXT_CSD_CMD_SET_NORMAL (1 << 0) +#define EXT_CSD_CMD_SET_SECURE (1 << 1) +#define EXT_CSD_CMD_SET_CPSECURE (1 << 2) -#define EXT_CSD_CARD_TYPE_26 (1<<0) /* Card can run at 26MHz */ -#define EXT_CSD_CARD_TYPE_52 (1<<1) /* Card can run at 52MHz */ +#define EXT_CSD_CARD_TYPE_26 (1 << 0) /* Card can run at 26MHz */ +#define EXT_CSD_CARD_TYPE_52 (1 << 1) /* Card can run at 52MHz */ #define EXT_CSD_BUS_WIDTH_1 0 /* Card is in 1 bit mode */ #define EXT_CSD_BUS_WIDTH_4 1 /* Card is in 4 bit mode */ @@ -162,21 +162,21 @@ #define R1_APP_CMD (1 << 5) #define MMC_RSP_PRESENT (1 << 0) -#define MMC_RSP_136 (1 << 1) /* 136 bit response */ -#define MMC_RSP_CRC (1 << 2) /* expect valid crc */ -#define MMC_RSP_BUSY (1 << 3) /* card may send busy */ -#define MMC_RSP_OPCODE (1 << 4) /* response contains opcode */ +#define MMC_RSP_136 (1 << 1) /* 136 bit response */ +#define MMC_RSP_CRC (1 << 2) /* expect valid crc */ +#define MMC_RSP_BUSY (1 << 3) /* card may send busy */ +#define MMC_RSP_OPCODE (1 << 4) /* response contains opcode */ -#define MMC_RSP_NONE (0) -#define MMC_RSP_R1 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE) +#define MMC_RSP_NONE (0) +#define MMC_RSP_R1 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE) #define MMC_RSP_R1b (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE| \ MMC_RSP_BUSY) -#define MMC_RSP_R2 (MMC_RSP_PRESENT|MMC_RSP_136|MMC_RSP_CRC) -#define MMC_RSP_R3 (MMC_RSP_PRESENT) -#define MMC_RSP_R4 (MMC_RSP_PRESENT) -#define MMC_RSP_R5 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE) -#define MMC_RSP_R6 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE) -#define MMC_RSP_R7 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE) +#define MMC_RSP_R2 (MMC_RSP_PRESENT|MMC_RSP_136|MMC_RSP_CRC) +#define MMC_RSP_R3 (MMC_RSP_PRESENT) +#define MMC_RSP_R4 (MMC_RSP_PRESENT) +#define MMC_RSP_R5 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE) +#define MMC_RSP_R6 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE) +#define MMC_RSP_R7 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE) struct mmc_cid { @@ -283,9 +283,7 @@ struct mmc { struct mmc_cmd *cmd, struct mmc_data *data); void (*set_ios)(struct mmc *mmc); int (*init)(struct mmc *mmc); -#ifdef CONFIG_MMC_MBLOCK uint b_max; -#endif }; int mmc_register(struct mmc *mmc); |