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authorJason Jin <Jason.jin@freescale.com>2008-05-13 11:50:36 +0800
committerJon Loeliger <jdl@freescale.com>2008-07-07 11:29:48 -0500
commit3473ab737282b08ad61841fcbb14c4d264a93a8e (patch)
treee67db44d71402d9d6ee3d24742f769c62d87131c /include
parenta036b0443657fe0f4773786de9092251869f08ac (diff)
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Feed the watchdog in u-boot for 8610 board.
The watchdog on 8610 board is enabled by setting sw[6] to on. Once enabled, the watchdog can not be disabled by software. So feed the dog in u-boot is necessary for normal operation. Signed-off-by: Jason Jin <Jason.jin@freescale.com>
Diffstat (limited to 'include')
-rw-r--r--include/asm-ppc/immap_86xx.h16
-rw-r--r--include/configs/MPC8610HPCD.h3
2 files changed, 17 insertions, 2 deletions
diff --git a/include/asm-ppc/immap_86xx.h b/include/asm-ppc/immap_86xx.h
index c03b4b8..03a25c7 100644
--- a/include/asm-ppc/immap_86xx.h
+++ b/include/asm-ppc/immap_86xx.h
@@ -1304,9 +1304,21 @@ typedef struct ccsr_gur {
uint lynxdcr1; /* 0xe0f08 - Lynx debug control register 1*/
int res14[6];
uint ddrioovcr; /* 0xe0f24 - DDR IO Overdrive Control register */
- char res15[61656];
+ char res15[216];
} ccsr_gur_t;
+/*
+ * Watchdog register block(0xe_4000-0xe_4fff)
+ */
+typedef struct ccsr_wdt {
+ uint res0;
+ uint swcrr; /* System watchdog control register */
+ uint swcnr; /* System watchdog count register */
+ char res1[2];
+ ushort swsrr; /* System watchdog service register */
+ char res2[4080];
+} ccsr_wdt_t;
+
typedef struct immap {
ccsr_local_mcm_t im_local_mcm;
ccsr_ddr_t im_ddr1;
@@ -1330,6 +1342,8 @@ typedef struct immap {
char res5[389120];
ccsr_rio_t im_rio;
ccsr_gur_t im_gur;
+ char res6[12288];
+ ccsr_wdt_t im_wdt;
} immap_t;
extern immap_t *immr;
diff --git a/include/configs/MPC8610HPCD.h b/include/configs/MPC8610HPCD.h
index fc16890..98ae34c 100644
--- a/include/configs/MPC8610HPCD.h
+++ b/include/configs/MPC8610HPCD.h
@@ -485,7 +485,8 @@
#endif
-#undef CONFIG_WATCHDOG /* watchdog disabled */
+#define CONFIG_WATCHDOG /* watchdog enabled */
+#define CFG_WATCHDOG_FREQ 5000 /* Feed interval, 5s */
/*DIU Configuration*/
#define DIU_CONNECT_TO_DVI /* DIU controller connects to DVI encoder*/