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authorGrzegorz Bernacki <gjb@semihalf.com>2008-01-16 15:12:47 +0100
committerWolfgang Denk <wd@denx.de>2008-01-17 09:31:58 +0100
commit334e442e6fac59be91244063e9b3f6ca25e8daf8 (patch)
tree8e3ba14866674209e364e7617efc647da1d21168 /include
parent4c9e98ace78e7de972adf7da7135a46ec0a4ee7e (diff)
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Set ips dividor to 1/4 of csb clock.
Previous setting cause ips clock to be out of spec. This bug was found by John Rigby from Freescale. Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
Diffstat (limited to 'include')
-rw-r--r--include/mpc512x.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/include/mpc512x.h b/include/mpc512x.h
index a06b5c6..d1c6fb2 100644
--- a/include/mpc512x.h
+++ b/include/mpc512x.h
@@ -185,7 +185,7 @@
/* SCFR1 System Clock Frequency Register 1
*/
-#define SCFR1_IPS_DIV 0x2
+#define SCFR1_IPS_DIV 0x4
#define SCFR1_IPS_DIV_MASK 0x03800000
#define SCFR1_IPS_DIV_SHIFT 23