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authorYe.Li <B37916@freescale.com>2015-04-27 15:30:20 +0800
committerYe.Li <B37916@freescale.com>2015-04-27 16:38:44 +0800
commit814efa43d22de4b05195889260914136763013e9 (patch)
treed03ec56c0be73a3b745c165372ed0b9b0ced1b18 /include
parentc771a2790474b026bbb6d808285185362cee3e66 (diff)
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MLK-10756 imx: mx7darm2: Add support for MX7D 19x19 LPDDR3 ARM2 board
Add pre-codes for i.MX7D 19x19 LPDDR3 validation board to support devices: EIMNOR, NAND, USDHC1, i2C, ENET2, PMIC, USB, QSPI, SPINOR. build target: mx7d_19x19_lpddr3_arm2_config mx7d_19x19_lpddr3_arm2_eimnor_config Signed-off-by: Ye.Li <B37916@freescale.com> (cherry picked from commit f8f3a9f2323412168216e0515c5ad53cd006e076)
Diffstat (limited to 'include')
-rw-r--r--include/configs/mx7d_19x19_lpddr3_arm2.h86
-rw-r--r--include/configs/mx7d_arm2.h45
2 files changed, 131 insertions, 0 deletions
diff --git a/include/configs/mx7d_19x19_lpddr3_arm2.h b/include/configs/mx7d_19x19_lpddr3_arm2.h
new file mode 100644
index 0000000..e721028
--- /dev/null
+++ b/include/configs/mx7d_19x19_lpddr3_arm2.h
@@ -0,0 +1,86 @@
+/*
+ * Copyright (C) 2015 Freescale Semiconductor, Inc.
+ *
+ * Configuration settings for the Freescale i.MX7D 19x19 LPDDR3 ARM2 board.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef __MX7D_19X19_LPDDR3_ARM2_CONFIG_H
+#define __MX7D_19X19_LPDDR3_ARM2_CONFIG_H
+
+#define CONFIG_SYS_FSL_USDHC_NUM 1
+#define CONFIG_SYS_MMC_ENV_DEV 0 /* USDHC1 */
+#define CONFIG_SYS_MMC_ENV_PART 0 /* user area */
+#define CONFIG_MMCROOT "/dev/mmcblk0p2" /* USDHC1 */
+
+#define PHYS_SDRAM_SIZE SZ_2G
+
+
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_NET
+#define CONFIG_FEC_MXC
+#define CONFIG_MII
+#define CONFIG_FEC_XCV_TYPE RGMII
+#define CONFIG_ETHPRIME "FEC"
+#define CONFIG_FEC_MXC_PHYADDR 0
+
+#define CONFIG_PHYLIB
+#define CONFIG_PHY_ATHEROS
+#define CONFIG_FEC_DMA_MINALIGN 64
+
+/* ENET2 */
+#define IMX_FEC_BASE ENET2_IPS_BASE_ADDR
+#define CONFIG_FEC_MXC_MDIO_BASE ENET_IPS_BASE_ADDR
+
+/* QSPI conflict with EIMNOR */
+/* ECSPI conflict with UART */
+#ifdef CONFIG_SYS_BOOT_QSPI
+#define CONFIG_SYS_USE_QSPI
+#define CONFIG_ENV_IS_IN_SPI_FLASH
+#elif defined CONFIG_SYS_BOOT_SPINOR
+#define CONFIG_SYS_USE_SPINOR
+#define CONFIG_ENV_IS_IN_SPI_FLASH
+#elif defined CONFIG_SYS_BOOT_EIMNOR
+#define CONFIG_SYS_USE_EIMNOR
+#define CONFIG_ENV_IS_IN_FLASH
+#elif defined CONFIG_SYS_BOOT_NAND
+#define CONFIG_SYS_USE_NAND
+#define CONFIG_ENV_IS_IN_NAND
+#else
+#define CONFIG_SYS_USE_EIMNOR /* Enable the EIMNOR flash at default */
+#define CONFIG_ENV_IS_IN_MMC
+#endif
+
+/* I2C configs */
+#define CONFIG_CMD_I2C
+#ifdef CONFIG_CMD_I2C
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_I2C_SPEED 100000
+/* PMIC */
+#define CONFIG_PFUZE3000_PMIC_I2C
+#ifdef CONFIG_PFUZE3000_PMIC_I2C
+#define CONFIG_PMIC_I2C_BUS 0
+#define CONFIG_PMIC_I2C_SLAVE 0x8
+#endif
+#endif
+
+#ifdef CONFIG_SYS_USE_SPINOR
+#define CONFIG_CMD_SF
+#define CONFIG_SPI_FLASH
+#define CONFIG_SPI_FLASH_ATMEL
+#define CONFIG_MXC_SPI
+#define CONFIG_SF_DEFAULT_BUS 0
+#define CONFIG_SF_DEFAULT_SPEED 20000000
+#define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0)
+#define CONFIG_SF_DEFAULT_CS (0|(IMX_GPIO_NR(4, 7)<<8))
+#endif
+
+#define CONFIG_VIDEO
+
+#include "mx7d_arm2.h"
+
+#endif
diff --git a/include/configs/mx7d_arm2.h b/include/configs/mx7d_arm2.h
index 3f13b36..886fb35 100644
--- a/include/configs/mx7d_arm2.h
+++ b/include/configs/mx7d_arm2.h
@@ -112,6 +112,11 @@
#endif
#define CONFIG_SYS_MMC_IMG_LOAD_PART 1
+#ifdef CONFIG_SYS_BOOT_NAND
+#define CONFIG_MFG_NAND_PARTITION "mtdparts=gpmi-nand:64m(boot),16m(kernel),16m(dtb),-(rootfs) "
+#else
+#define CONFIG_MFG_NAND_PARTITION ""
+#endif
#ifdef CONFIG_VIDEO
#define CONFIG_VIDEO_MODE \
@@ -133,12 +138,28 @@
"g_mass_storage.stall=0 g_mass_storage.removable=1 " \
"g_mass_storage.idVendor=0x066F g_mass_storage.idProduct=0x37FF "\
"g_mass_storage.iSerialNumber=\"\" "\
+ CONFIG_MFG_NAND_PARTITION \
"clk_ignore_unused "\
"\0" \
"initrd_addr=0x83800000\0" \
"initrd_high=0xffffffff\0" \
"bootcmd_mfg=run mfgtool_args;bootz ${loadaddr} ${initrd_addr} ${fdt_addr};\0" \
+#if defined(CONFIG_SYS_BOOT_NAND)
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ CONFIG_MFG_ENV_SETTINGS \
+ CONFIG_VIDEO_MODE \
+ "fdt_addr=0x83000000\0" \
+ "fdt_high=0xffffffff\0" \
+ "console=ttymxc0\0" \
+ "bootargs=console=ttymxc0,115200 ubi.mtd=3 " \
+ "root=ubi0:rootfs rootfstype=ubifs " \
+ "mtdparts=gpmi-nand:64m(boot),16m(kernel),16m(dtb),-(rootfs)\0"\
+ "bootcmd=nand read ${loadaddr} 0x4000000 0x800000;"\
+ "nand read ${fdt_addr} 0x5000000 0x100000;"\
+ "bootz ${loadaddr} - ${fdt_addr}\0"
+
+#else
#define CONFIG_EXTRA_ENV_SETTINGS \
CONFIG_MFG_ENV_SETTINGS \
UPDATE_M4_ENV \
@@ -217,6 +238,7 @@
"fi; " \
"fi; " \
"else run netboot; fi"
+#endif
/* Miscellaneous configurable options */
#define CONFIG_SYS_LONGHELP
@@ -287,6 +309,23 @@
#define CONFIG_SYS_FLASH_EMPTY_INFO
#endif
+#ifdef CONFIG_SYS_USE_NAND
+#define CONFIG_CMD_NAND
+#define CONFIG_CMD_NAND_TRIMFFS
+
+/* NAND stuff */
+#define CONFIG_NAND_MXS
+#define CONFIG_SYS_MAX_NAND_DEVICE 1
+#define CONFIG_SYS_NAND_BASE 0x40000000
+#define CONFIG_SYS_NAND_5_ADDR_CYCLE
+#define CONFIG_SYS_NAND_ONFI_DETECTION
+
+/* DMA stuff, needed for GPMI/MXS NAND support */
+#define CONFIG_APBH_DMA
+#define CONFIG_APBH_DMA_BURST
+#define CONFIG_APBH_DMA_BURST8
+#endif
+
#if defined(CONFIG_ENV_IS_IN_MMC)
#define CONFIG_ENV_OFFSET (8 * SZ_64K)
@@ -302,8 +341,14 @@
#define CONFIG_ENV_SIZE CONFIG_SYS_FLASH_SECT_SIZE
#define CONFIG_ENV_SECT_SIZE CONFIG_SYS_FLASH_SECT_SIZE
#define CONFIG_ENV_OFFSET (4 * CONFIG_SYS_FLASH_SECT_SIZE)
+#elif defined(CONFIG_ENV_IS_IN_NAND)
+#undef CONFIG_ENV_SIZE
+#define CONFIG_ENV_OFFSET (8 << 20)
+#define CONFIG_ENV_SECT_SIZE (128 << 10)
+#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
#endif
+
#define CONFIG_OF_LIBFDT
#define CONFIG_CMD_BOOTZ