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authorYe.Li <B37916@freescale.com>2014-01-14 11:50:08 +0800
committerYe.Li <B37916@freescale.com>2014-01-17 11:27:50 +0800
commit94709deba186ea6fc2c350c34e4e4df60f06d982 (patch)
treeeff18f8bce0da8735d454a1c797de02dd0cfae52 /include
parentb013a5d31a2cf523b300bc38f1f1548f7ecdfe29 (diff)
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ENGR00294905 ARM:imx6:sabresd/arm2 Add USB HOST BSP support
Enable the USB EHCI on sabresd and arm2 boards to support USB mass storage device. Pins are configured in board_ehci_hcd_init for VBUS control. Signed-off-by: Ye.Li <B37916@freescale.com>
Diffstat (limited to 'include')
-rw-r--r--include/configs/mx6qarm2.h12
-rw-r--r--include/configs/mx6qsabresd.h14
2 files changed, 25 insertions, 1 deletions
diff --git a/include/configs/mx6qarm2.h b/include/configs/mx6qarm2.h
index b3973ff..22f39e8 100644
--- a/include/configs/mx6qarm2.h
+++ b/include/configs/mx6qarm2.h
@@ -190,4 +190,16 @@
#define CONFIG_OF_LIBFDT
#define CONFIG_CMD_BOOTZ
+/* USB Configs */
+#define CONFIG_CMD_USB
+#define CONFIG_USB_EHCI
+#define CONFIG_USB_EHCI_MX6
+#define CONFIG_USB_STORAGE
+#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
+#define CONFIG_USB_HOST_ETHER
+#define CONFIG_USB_ETHER_ASIX
+#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
+#define CONFIG_MXC_USB_FLAGS 0
+#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
+
#endif /* __CONFIG_H */
diff --git a/include/configs/mx6qsabresd.h b/include/configs/mx6qsabresd.h
index f8f56f8..258939c 100644
--- a/include/configs/mx6qsabresd.h
+++ b/include/configs/mx6qsabresd.h
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2012-2013 Freescale Semiconductor, Inc.
+ * Copyright (C) 2012-2014 Freescale Semiconductor, Inc.
*
* Configuration settings for the Freescale i.MX6Q SabreSD board.
*
@@ -26,6 +26,18 @@
#include <asm/arch/imx-regs.h>
#include <asm/imx-common/gpio.h>
+/* USB Configs */
+#define CONFIG_CMD_USB
+#define CONFIG_USB_EHCI
+#define CONFIG_USB_EHCI_MX6
+#define CONFIG_USB_STORAGE
+#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
+#define CONFIG_USB_HOST_ETHER
+#define CONFIG_USB_ETHER_ASIX
+#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
+#define CONFIG_MXC_USB_FLAGS 0
+#define CONFIG_USB_MAX_CONTROLLER_COUNT 1 /* Enabled USB controller number */
+
#define CONFIG_SYS_FSL_USDHC_NUM 3
#define CONFIG_SYS_MMC_ENV_DEV 1 /* SDHC3 */
#define CONFIG_SYS_MMC_ENV_PART 0 /* user partition */