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author | Mahesh Mahadevan <r9aadq@freescale.com> | 2011-10-20 09:40:23 -0500 |
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committer | Mahesh Mahadevan <r9aadq@freescale.com> | 2011-10-20 09:43:54 -0500 |
commit | 95dfb041f995bea503bd74ee63e8e412ccef53ed (patch) | |
tree | 02cbf206d018f0fceb30e1719c20ed63a8fb14b8 /include | |
parent | 7e9b5ed40d8e59574b9dd4e22a8be021db151b62 (diff) | |
download | u-boot-imx-95dfb041f995bea503bd74ee63e8e412ccef53ed.zip u-boot-imx-95dfb041f995bea503bd74ee63e8e412ccef53ed.tar.gz u-boot-imx-95dfb041f995bea503bd74ee63e8e412ccef53ed.tar.bz2 |
ENGR00160507 Update the IOMUX implementation for MX6
The MX6 code incorrectly uses the Hysteresis bit to decide NO_PAD_CTRL
operation
Signed-off-by: Mahesh Mahadevan <r9aadq@freescale.com>
Diffstat (limited to 'include')
-rw-r--r-- | include/asm-arm/arch-mx6/iomux-v3.h | 11 |
1 files changed, 5 insertions, 6 deletions
diff --git a/include/asm-arm/arch-mx6/iomux-v3.h b/include/asm-arm/arch-mx6/iomux-v3.h index c6ef949..01aeaeb 100644 --- a/include/asm-arm/arch-mx6/iomux-v3.h +++ b/include/asm-arm/arch-mx6/iomux-v3.h @@ -50,8 +50,8 @@ * PAD_CTRL_OFS: 12..23 (12) * SEL_INPUT_OFS: 24..35 (12) * MUX_MODE + SION: 36..40 (5) - * PAD_CTRL + NO_PAD_CTRL: 41..57 (17) - * SEL_INP: 58..61 (4) + * PAD_CTRL + NO_PAD_CTRL: 41..58 (18) + * SEL_INP: 59..62 (4) * reserved: 63 (1) */ @@ -69,9 +69,8 @@ typedef u64 iomux_v3_cfg_t; #define MUX_MODE_SHIFT 36 #define MUX_MODE_MASK ((iomux_v3_cfg_t)0x1f << MUX_MODE_SHIFT) #define MUX_PAD_CTRL_SHIFT 41 -#define MUX_PAD_CTRL_MASK ((iomux_v3_cfg_t)0x1ffff << MUX_PAD_CTRL_SHIFT) -#define NO_PAD_CTRL ((iomux_v3_cfg_t)1 << (MUX_PAD_CTRL_SHIFT + 16)) -#define MUX_SEL_INPUT_SHIFT 58 +#define MUX_PAD_CTRL_MASK ((iomux_v3_cfg_t)0x3ffff << MUX_PAD_CTRL_SHIFT) +#define MUX_SEL_INPUT_SHIFT 59 #define MUX_SEL_INPUT_MASK ((iomux_v3_cfg_t)0xf << MUX_SEL_INPUT_SHIFT) #define MUX_PAD_CTRL(x) ((iomux_v3_cfg_t)(x) << MUX_PAD_CTRL_SHIFT) @@ -89,7 +88,7 @@ typedef u64 iomux_v3_cfg_t; /* * Use to set PAD control */ - +#define NO_PAD_CTRL (1 << 17) #define PAD_CTL_HYS (1 << 16) #define PAD_CTL_PUS_100K_DOWN (0 << 14) |