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| author | Stefan Roese <sr@denx.de> | 2007-01-18 16:05:47 +0100 |
|---|---|---|
| committer | Stefan Roese <sr@denx.de> | 2007-01-18 16:05:47 +0100 |
| commit | 9d8d5a5bfb64768f29a0cb47fc37cd6f4c40e276 (patch) | |
| tree | 43e50b8392361c983ca734135e3518d76c8fc806 /include | |
| parent | 0057d758e3e874cbe7f24745d0cce8c1cb6c207e (diff) | |
| download | u-boot-imx-9d8d5a5bfb64768f29a0cb47fc37cd6f4c40e276.zip u-boot-imx-9d8d5a5bfb64768f29a0cb47fc37cd6f4c40e276.tar.gz u-boot-imx-9d8d5a5bfb64768f29a0cb47fc37cd6f4c40e276.tar.bz2 | |
[PATCH] Add support for Prodrive SCPU (PDNB3 variant) board
Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'include')
| -rw-r--r-- | include/configs/pdnb3.h | 37 |
1 files changed, 35 insertions, 2 deletions
diff --git a/include/configs/pdnb3.h b/include/configs/pdnb3.h index ba6b113..2cc137c 100644 --- a/include/configs/pdnb3.h +++ b/include/configs/pdnb3.h @@ -71,12 +71,18 @@ #define CONFIG_BAUDRATE 115200 #define CFG_IXP425_CONSOLE IXP425_UART1 /* we use UART1 for console */ +#if defined(CONFIG_SCPU) +#define CMD_NAND_ADD 0 +#else +#define CMD_NAND_ADD CFG_CMD_NAND +#endif + #define CONFIG_COMMANDS (CONFIG_CMD_DFL | \ CFG_CMD_DHCP | \ CFG_CMD_DATE | \ CFG_CMD_NET | \ CFG_CMD_MII | \ - CFG_CMD_NAND | \ + CMD_NAND_ADD | \ CFG_CMD_I2C | \ CFG_CMD_ELF | \ CFG_CMD_PING) @@ -176,12 +182,20 @@ #define CFG_FLASH_BASE 0x50000000 #define CFG_MONITOR_BASE CFG_FLASH_BASE +#if defined(CONFIG_SCPU) +#define CFG_MONITOR_LEN (384 << 10) /* Reserve 512 kB for Monitor */ +#else #define CFG_MONITOR_LEN (504 << 10) /* Reserve 512 kB for Monitor */ +#endif /* * Expansion bus settings */ +#if defined(CONFIG_SCPU) +#define CFG_EXP_CS0 0x94d23C42 /* 8bit, max size */ +#else #define CFG_EXP_CS0 0x94913C43 /* 8bit, max size */ +#endif #define CFG_EXP_CS1 0x85000043 /* 8bit, 512bytes */ /* @@ -194,6 +208,12 @@ /* * FLASH and environment organization */ +#if defined(CONFIG_SCPU) +#define CFG_FLASH_CFI /* The flash is CFI compatible */ +#define CFG_FLASH_CFI_DRIVER /* Use common CFI driver */ +#define CFG_FLASH_CFI_WIDTH FLASH_CFI_16BIT /* no byte writes on IXP4xx */ +#endif + #define FLASH_BASE0_PRELIM CFG_FLASH_BASE /* FLASH bank #0 */ #define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */ @@ -217,20 +237,27 @@ #define CFG_ENV_IS_IN_FLASH 1 +#if defined(CONFIG_SCPU) +#define CFG_ENV_SECT_SIZE 0x20000 /* size of one complete sector */ +#define CFG_ENV_SIZE 0x4000 /* Total Size of Environment Sector */ +#else #define CFG_ENV_SECT_SIZE 0x1000 /* size of one complete sector */ -#define CFG_ENV_ADDR (CFG_FLASH_BASE + CFG_MONITOR_LEN) #define CFG_ENV_SIZE 0x1000 /* Total Size of Environment Sector */ +#endif +#define CFG_ENV_ADDR (CFG_FLASH_BASE + CFG_MONITOR_LEN) /* Address and size of Redundant Environment Sector */ #define CFG_ENV_ADDR_REDUND (CFG_ENV_ADDR + CFG_ENV_SECT_SIZE) #define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE) +#if !defined(CONFIG_SCPU) /* * NAND-FLASH stuff */ #define CFG_MAX_NAND_DEVICE 1 #define NAND_MAX_CHIPS 1 #define CFG_NAND_BASE 0x51000000 /* NAND FLASH Base Address */ +#endif /* * GPIO settings @@ -284,9 +311,15 @@ /* * I2C RTC */ +#if 0 /* test-only */ +#define CONFIG_RTC_DS1340 1 +#define CFG_I2C_RTC_ADDR 0x68 +#else +/* M41T11 Serial Access Timekeeper(R) SRAM */ #define CONFIG_RTC_M41T11 1 #define CFG_I2C_RTC_ADDR 0x68 #define CFG_M41T11_BASE_YEAR 1900 /* play along with the linux driver */ +#endif /* * Spartan3 FPGA configuration support |