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| author | Anish Trivedi <anish@freescale.com> | 2010-11-04 14:07:21 -0500 |
|---|---|---|
| committer | Terry Lv <r65388@freescale.com> | 2010-12-01 18:02:07 +0800 |
| commit | 48457509cdc009fddcdad859f3d5fc9a75eb9024 (patch) | |
| tree | dd37f588b63476167e7dcc35bc941936bc87ad47 /include | |
| parent | 7a9a5e1d912fbdcdf80b51a60dfd45214f65ddc8 (diff) | |
| download | u-boot-imx-48457509cdc009fddcdad859f3d5fc9a75eb9024.zip u-boot-imx-48457509cdc009fddcdad859f3d5fc9a75eb9024.tar.gz u-boot-imx-48457509cdc009fddcdad859f3d5fc9a75eb9024.tar.bz2 | |
ENGR00133437 MX50 Uboot support for TO 1.1.1 precode
Precoding: Update DDR configuration plugin to check SI Rev
and change ROM addresses as needed.
Signed-off-by: Anish Trivedi <anish@freescale.com>
Diffstat (limited to 'include')
| -rw-r--r-- | include/asm-arm/arch-mx50/mx50.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/include/asm-arm/arch-mx50/mx50.h b/include/asm-arm/arch-mx50/mx50.h index 69e639c..b2bb992 100644 --- a/include/asm-arm/arch-mx50/mx50.h +++ b/include/asm-arm/arch-mx50/mx50.h @@ -229,7 +229,10 @@ #define CLKCTL_CLK_DDR 0x98 #define CHIP_REV_1_0 0x10 +#define CHIP_REV_1_1_1 0x11 #define PLATFORM_ICGC 0x14 +/* ROM ID as the indicator of SOC rev */ +#define ROM_SI_REV 0x48 /* Assuming 24MHz input clock with doubler ON */ /* MFI PDF */ |