ENGR00211117 - U-Boot: Add EPDC splash screen for MX 6DL/S platforms

- EPDC Splash support for MX6DL/S Sabre SD
- EPDC Splash support for MX6DL/S ARM2
- Currently, splash screen consists of a simple black border
around a white screen.  Done this way to save in memory footprint.

Signed-off-by: Danny Nold <dannynold@freescale.com>

3 files changed, 63 insertions, 10 deletions

diff --git a/include/asm-arm/arch-mx6/mx6.h b/include/asm-arm/arch-mx6/mx6.h
index 26dd0b3..d03adc9 100644
--- a/include/asm-arm/arch-mx6/mx6.h
+++ b/include/asm-arm/arch-mx6/mx6.h
@@ -266,15 +266,15 @@
 #define CSI_BASE_ADDR               (AIPS1_OFF_BASE_ADDR + 0x64000)
 #define SIPIX_BASE_ADDR             (AIPS1_OFF_BASE_ADDR + 0x68000)
 #define SDMA_PORT_HOST_BASE_ADDR    (AIPS1_OFF_BASE_ADDR + 0x6C000)
-#define EPXP_BASE_ADDR              (AIPS1_OFF_BASE_ADDR + 0x70000)
-#define EPDC_BASE_ADDR              (AIPS1_OFF_BASE_ADDR + 0x74000)
-#define ELCDIF_BASE_ADDR            (AIPS1_OFF_BASE_ADDR + 0x78000)
-#define DCP_BASE_ADDR               (AIPS1_OFF_BASE_ADDR + 0x7C000)
 #else
 #define DCIC1_BASE_ADDR             (AIPS1_OFF_BASE_ADDR + 0x64000)
 #define DCIC2_BASE_ADDR             (AIPS1_OFF_BASE_ADDR + 0x68000)
 #define DMA_REQ_PORT_HOST_BASE_ADDR (AIPS1_OFF_BASE_ADDR + 0x6C000)
 #endif
+#define EPXP_BASE_ADDR              (AIPS1_OFF_BASE_ADDR + 0x70000)
+#define EPDC_BASE_ADDR              (AIPS1_OFF_BASE_ADDR + 0x74000)
+#define ELCDIF_BASE_ADDR            (AIPS1_OFF_BASE_ADDR + 0x78000)
+#define DCP_BASE_ADDR               (AIPS1_OFF_BASE_ADDR + 0x7C000)
 
 /* ATZ#2- On Platform */
 #define AIPS2_ON_BASE_ADDR          (ATZ2_BASE_ADDR + 0x7C000)
@@ -697,8 +697,9 @@
 #define CLKCTL_CCGR7            0x84
 #define CLKCTL_CMEOR            0x88
 
-#define ANATOP_USB1				0x10
-#define ANATOP_USB2				0x20
+#define ANATOP_USB1		0x10
+#define ANATOP_USB2		0x20
+#define ANATOP_PLL_VIDEO	0xA0
 
 #define CHIP_TYPE_DQ		0x63000
 #define CHIP_TYPE_DL		0x61000
diff --git a/include/configs/mx6dl_arm2.h b/include/configs/mx6dl_arm2.h
index 8b1d50c..72fd980 100644
--- a/include/configs/mx6dl_arm2.h
+++ b/include/configs/mx6dl_arm2.h
@@ -299,22 +299,48 @@
 	#define CONFIG_ENV_IS_NOWHERE	1
 #endif
 
+#define CONFIG_SPLASH_SCREEN
+#define CONFIG_MXC_EPDC
+
+/*
+ * SPLASH SCREEN Configs
+ */
 #ifdef CONFIG_SPLASH_SCREEN
 	/*
 	 * Framebuffer and LCD
 	 */
 	#define CONFIG_LCD
+	#define CONFIG_FB_BASE				(TEXT_BASE + 0x300000)
+	#define CONFIG_SYS_CONSOLE_IS_IN_ENV
+#ifdef CONFIG_MXC_EPDC
+	#undef LCD_TEST_PATTERN
+	/* #define CONFIG_SPLASH_IS_IN_MMC			1 */
+	#define LCD_BPP					LCD_MONOCHROME
+	/* #define CONFIG_SPLASH_SCREEN_ALIGN		1 */
+
+	#define CONFIG_MXC_EPDC				1
+
+	#define CONFIG_WORKING_BUF_ADDR			(TEXT_BASE + 0x100000)
+	#define CONFIG_WAVEFORM_BUF_ADDR		(TEXT_BASE + 0x200000)
+	#define CONFIG_WAVEFORM_FILE_OFFSET		0x100000
+	#define CONFIG_WAVEFORM_FILE_SIZE		0xF0988
+	#define CONFIG_WAVEFORM_FILE_IN_MMC
+
+#ifdef CONFIG_SPLASH_IS_IN_MMC
+	#define CONFIG_SPLASH_IMG_OFFSET		0x4c000
+	#define CONFIG_SPLASH_IMG_SIZE			0x19000
+#endif
+#else /* !CONFIG_MXC_EPDC */
 	#define CONFIG_IPU_V3H
 	#define CONFIG_VIDEO_MX5
 	#define CONFIG_IPU_CLKRATE	260000000
 	#define CONFIG_SYS_CONSOLE_ENV_OVERWRITE
 	#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
-	#define CONFIG_SYS_CONSOLE_IS_IN_ENV
 	#define LCD_BPP		LCD_COLOR16
 	#define CONFIG_CMD_BMP
 	#define CONFIG_BMP_8BPP
-	#define CONFIG_FB_BASE	(TEXT_BASE + 0x300000)
 	#define CONFIG_SPLASH_SCREEN_ALIGN
 	#define CONFIG_SYS_WHITE_ON_BLACK
 #endif
+#endif /* CONFIG_SPLASH_SCREEN */
 #endif				/* __CONFIG_H */
diff --git a/include/configs/mx6dl_sabresd.h b/include/configs/mx6dl_sabresd.h
index 5a9bde3..060c94a 100644
--- a/include/configs/mx6dl_sabresd.h
+++ b/include/configs/mx6dl_sabresd.h
@@ -303,22 +303,48 @@
 	#define CONFIG_ENV_IS_NOWHERE	1
 #endif
 
+#define CONFIG_SPLASH_SCREEN
+#define CONFIG_MXC_EPDC
+
+/*
+ * SPLASH SCREEN Configs
+ */
 #ifdef CONFIG_SPLASH_SCREEN
 	/*
 	 * Framebuffer and LCD
 	 */
 	#define CONFIG_LCD
+	#define CONFIG_FB_BASE				(TEXT_BASE + 0x300000)
+	#define CONFIG_SYS_CONSOLE_IS_IN_ENV
+#ifdef CONFIG_MXC_EPDC
+	#undef LCD_TEST_PATTERN
+	/* #define CONFIG_SPLASH_IS_IN_MMC			1 */
+	#define LCD_BPP					LCD_MONOCHROME
+	/* #define CONFIG_SPLASH_SCREEN_ALIGN		1 */
+
+	#define CONFIG_MXC_EPDC				1
+
+	#define CONFIG_WORKING_BUF_ADDR			(TEXT_BASE + 0x100000)
+	#define CONFIG_WAVEFORM_BUF_ADDR		(TEXT_BASE + 0x200000)
+	#define CONFIG_WAVEFORM_FILE_OFFSET		0x100000
+	#define CONFIG_WAVEFORM_FILE_SIZE		0xF0988
+	#define CONFIG_WAVEFORM_FILE_IN_MMC
+
+#ifdef CONFIG_SPLASH_IS_IN_MMC
+	#define CONFIG_SPLASH_IMG_OFFSET		0x4c000
+	#define CONFIG_SPLASH_IMG_SIZE			0x19000
+#endif
+#else /* !CONFIG_MXC_EPDC */
 	#define CONFIG_IPU_V3H
 	#define CONFIG_VIDEO_MX5
 	#define CONFIG_IPU_CLKRATE	260000000
 	#define CONFIG_SYS_CONSOLE_ENV_OVERWRITE
 	#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
-	#define CONFIG_SYS_CONSOLE_IS_IN_ENV
 	#define LCD_BPP		LCD_COLOR16
 	#define CONFIG_CMD_BMP
 	#define CONFIG_BMP_8BPP
-	#define CONFIG_FB_BASE	(TEXT_BASE + 0x300000)
 	#define CONFIG_SPLASH_SCREEN_ALIGN
 	#define CONFIG_SYS_WHITE_ON_BLACK
 #endif
+#endif /* CONFIG_SPLASH_SCREEN */
 #endif				/* __CONFIG_H */