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| author | Nobuhiro Iwamatsu <iwamatsu@nigauri.org> | 2007-11-29 00:56:37 +0900 |
|---|---|---|
| committer | Nobuhiro Iwamatsu <iwamatsu@nigauri.org> | 2007-11-29 00:56:37 +0900 |
| commit | 7fc792895be3c0edf423c4038992b40345672a12 (patch) | |
| tree | 6247dce2d1e72aa17fd2d7a138af66158d02f319 /include | |
| parent | eda3e1e6619ad0bee94ae4b16c99d88e77e2af13 (diff) | |
| parent | f92edbd8a0ef16a2b9127cbb564c09685728e4b0 (diff) | |
| download | u-boot-imx-7fc792895be3c0edf423c4038992b40345672a12.zip u-boot-imx-7fc792895be3c0edf423c4038992b40345672a12.tar.gz u-boot-imx-7fc792895be3c0edf423c4038992b40345672a12.tar.bz2 | |
Merge git://www.denx.de/git/u-boot
Conflicts:
drivers/Makefile
Diffstat (limited to 'include')
58 files changed, 1096 insertions, 580 deletions
diff --git a/include/.gitignore b/include/.gitignore new file mode 100644 index 0000000..d8fda80 --- /dev/null +++ b/include/.gitignore @@ -0,0 +1,6 @@ +/asm +/asm-ppc/arch +/bmp_logo.h +/config.h +/config.mk +/version_autogenerated.h diff --git a/include/asm-arm/arch-at91rm9200/hardware.h b/include/asm-arm/arch-at91rm9200/hardware.h index 8bb0c47..b868e38 100644 --- a/include/asm-arm/arch-at91rm9200/hardware.h +++ b/include/asm-arm/arch-at91rm9200/hardware.h @@ -24,8 +24,6 @@ #ifndef __ASSEMBLY__ #include "AT91RM9200.h" -#else -#include "AT91RM9200_inc.h" #endif /* Virtual and Physical base address for system peripherals */ diff --git a/include/asm-avr32/string.h b/include/asm-avr32/string.h index 8b05d1a..58582a3 100644 --- a/include/asm-avr32/string.h +++ b/include/asm-avr32/string.h @@ -23,6 +23,6 @@ #define __ASM_AVR32_STRING_H #define __HAVE_ARCH_MEMSET -extern void *memset(void *s, int c, size_t n); +extern void *memset(void *s, int c, __kernel_size_t n); #endif /* __ASM_AVR32_STRING_H */ diff --git a/include/asm-m68k/immap_5329.h b/include/asm-m68k/immap_5329.h index 2a3980c..271c276 100644 --- a/include/asm-m68k/immap_5329.h +++ b/include/asm-m68k/immap_5329.h @@ -57,7 +57,8 @@ #define MMAP_PWM 0xFC090000 #define MMAP_EPORT 0xFC094000 #define MMAP_WDOG 0xFC098000 -#define MMAP_CCM 0xFC0A0000 +#define MMAP_RCM 0xFC0A0000 +#define MMAP_CCM 0xFC0A0004 #define MMAP_GPIO 0xFC0A4000 #define MMAP_RTC 0xFC0A8000 #define MMAP_LCDC 0xFC0AC000 @@ -479,20 +480,22 @@ typedef struct wdog_ctrl { /*Chip configuration module registers */ typedef struct ccm_ctrl { - u8 rstctrl; /* 0x00 Reset Controller register */ - u8 rststat; /* 0x01 Reset Status register */ - u16 res1; /* 0x02 - 0x03 */ - u16 ccr; /* 0x04 Chip configuration register */ - u16 res2; /* 0x06 */ - u16 rcon; /* 0x08 Rreset configuration register */ - u16 cir; /* 0x0A Chip identification register */ - u32 res3; /* 0x0C */ - u16 misccr; /* 0x10 Miscellaneous control register */ - u16 cdr; /* 0x12 Clock divider register */ - u16 uhcsr; /* 0x14 USB Host controller status register */ - u16 uocsr; /* 0x16 USB On-the-Go Controller Status Register */ + u16 ccr; /* 0x00 Chip configuration register */ + u16 res2; /* 0x02 */ + u16 rcon; /* 0x04 Rreset configuration register */ + u16 cir; /* 0x06 Chip identification register */ + u32 res3; /* 0x08 */ + u16 misccr; /* 0x0A Miscellaneous control register */ + u16 cdr; /* 0x0C Clock divider register */ + u16 uhcsr; /* 0x10 USB Host controller status register */ + u16 uocsr; /* 0x12 USB On-the-Go Controller Status Reg */ } ccm_t; +typedef struct rcm { + u8 rcr; + u8 rsr; +} rcm_t; + /* GPIO port registers */ typedef struct gpio_ctrl { /* Port Output Data Registers */ diff --git a/include/asm-m68k/m5329.h b/include/asm-m68k/m5329.h index cd69fb0..3f05651 100644 --- a/include/asm-m68k/m5329.h +++ b/include/asm-m68k/m5329.h @@ -246,6 +246,21 @@ #define CSCR_BSTW (0x00000008) /********************************************************************* +* Reset Controller Module (RCM) +*********************************************************************/ + +/* Bit definitions and macros for RCR */ +#define RCM_RCR_FRCRSTOUT (0x40) +#define RCM_RCR_SOFTRST (0x80) + +/* Bit definitions and macros for RSR */ +#define RCM_RSR_LOL (0x01) +#define RCM_RSR_WDR_CORE (0x02) +#define RCM_RSR_EXT (0x04) +#define RCM_RSR_POR (0x08) +#define RCM_RSR_SOFT (0x20) + +/********************************************************************* * FlexCAN Module (CAN) *********************************************************************/ /* Bit definitions and macros for CAN_CANMCR */ diff --git a/include/asm-m68k/m5445x.h b/include/asm-m68k/m5445x.h index 8b886b0..b2bfb69 100644 --- a/include/asm-m68k/m5445x.h +++ b/include/asm-m68k/m5445x.h @@ -792,8 +792,8 @@ #define GPIO_PAR_FEC_FEC0_MASK (0xF8) #define GPIO_PAR_FEC_FEC0_MII (0x07) #define GPIO_PAR_FEC_FEC0_RMII_GPIO (0x03) -#define GPIO_PAR_FEC_FEC0_RMII_ATA (0x02) -#define GPIO_PAR_FEC_FEC0_ATA (0x01) +#define GPIO_PAR_FEC_FEC0_RMII_ULPI (0x02) +#define GPIO_PAR_FEC_FEC0_ULPI (0x01) #define GPIO_PAR_FEC_FEC0_GPIO (0x00) /* Bit definitions and macros for PAR_DMA */ diff --git a/include/asm-mips/addrspace.h b/include/asm-mips/addrspace.h index b8214b1..0e6abd7 100644 --- a/include/asm-mips/addrspace.h +++ b/include/asm-mips/addrspace.h @@ -49,7 +49,7 @@ cannot access physical memory directly from core */ #define UNCACHED_SDRAM(a) (((unsigned long)(a)) | 0x20000000) #else /* !CONFIG_AU1X00 */ -#define UNCACHED_SDRAM(a) PHYSADDR(a) +#define UNCACHED_SDRAM(a) KSEG1ADDR(a) #endif /* CONFIG_AU1X00 */ #endif /* __ASSEMBLY__ */ /* diff --git a/include/asm-mips/io.h b/include/asm-mips/io.h index cd4d5dc..1e060f7 100644 --- a/include/asm-mips/io.h +++ b/include/asm-mips/io.h @@ -71,7 +71,21 @@ * instruction, so the lower 16 bits must be zero. Should be true on * on any sane architecture; generic code does not use this assumption. */ -extern unsigned long mips_io_port_base; +extern const unsigned long mips_io_port_base; + +/* + * Gcc will generate code to load the value of mips_io_port_base after each + * function call which may be fairly wasteful in some cases. So we don't + * play quite by the book. We tell gcc mips_io_port_base is a long variable + * which solves the code generation issue. Now we need to violate the + * aliasing rules a little to make initialization possible and finally we + * will need the barrier() to fight side effects of the aliasing chat. + * This trickery will eventually collapse under gcc's optimizer. Oh well. + */ +static inline void set_io_port_base(unsigned long base) +{ + * (unsigned long *) &mips_io_port_base = base; +} /* * Thanks to James van Artsdalen for a better timing-fix than diff --git a/include/asm-mips/string.h b/include/asm-mips/string.h index c42ad82..579a591 100644 --- a/include/asm-mips/string.h +++ b/include/asm-mips/string.h @@ -19,21 +19,21 @@ extern char *strcpy(char *__dest, __const__ char *__src); #undef __HAVE_ARCH_STRNCPY -extern char *strncpy(char *__dest, __const__ char *__src, size_t __n); +extern char *strncpy(char *__dest, __const__ char *__src, __kernel_size_t __n); #undef __HAVE_ARCH_STRCMP extern int strcmp(__const__ char *__cs, __const__ char *__ct); #undef __HAVE_ARCH_STRNCMP -extern int strncmp(__const__ char *__cs, __const__ char *__ct, size_t __count); +extern int strncmp(__const__ char *__cs, __const__ char *__ct, __kernel_size_t __count); #undef __HAVE_ARCH_MEMSET -extern void *memset(void *__s, int __c, size_t __count); +extern void *memset(void *__s, int __c, __kernel_size_t __count); #undef __HAVE_ARCH_MEMCPY -extern void *memcpy(void *__to, __const__ void *__from, size_t __n); +extern void *memcpy(void *__to, __const__ void *__from, __kernel_size_t __n); #undef __HAVE_ARCH_MEMMOVE -extern void *memmove(void *__dest, __const__ void *__src, size_t __n); +extern void *memmove(void *__dest, __const__ void *__src, __kernel_size_t __n); #endif /* _ASM_STRING_H */ diff --git a/include/common.h b/include/common.h index aca281b..63ac8b0 100644 --- a/include/common.h +++ b/include/common.h @@ -63,19 +63,13 @@ typedef volatile unsigned char vu_char; #endif #elif defined(CONFIG_5xx) #include <asm/5xx_immap.h> -#define CONFIG_RELOC_FIXUP_WORKS #elif defined(CONFIG_MPC5xxx) #include <mpc5xxx.h> -#define CONFIG_RELOC_FIXUP_WORKS #elif defined(CONFIG_MPC512X) #include <mpc512x.h> #include <asm/immap_512x.h> -#define CONFIG_RELOC_FIXUP_WORKS #elif defined(CONFIG_MPC8220) #include <asm/immap_8220.h> -#define CONFIG_RELOC_FIXUP_WORKS -#elif defined(CONFIG_824X) -#define CONFIG_RELOC_FIXUP_WORKS #elif defined(CONFIG_8260) #if defined(CONFIG_MPC8247) \ || defined(CONFIG_MPC8248) \ @@ -87,7 +81,6 @@ typedef volatile unsigned char vu_char; #define CONFIG_MPC8260 1 #endif #include <asm/immap_8260.h> -#define CONFIG_RELOC_FIXUP_WORKS #endif #ifdef CONFIG_MPC86xx #include <mpc86xx.h> @@ -100,7 +93,6 @@ typedef volatile unsigned char vu_char; #ifdef CONFIG_MPC83XX #include <mpc83xx.h> #include <asm/immap_83xx.h> -#define CONFIG_RELOC_FIXUP_WORKS #endif #ifdef CONFIG_4xx #include <ppc4xx.h> diff --git a/include/config_cmd_all.h b/include/config_cmd_all.h index 3d91e99..d7ef65d 100644 --- a/include/config_cmd_all.h +++ b/include/config_cmd_all.h @@ -59,6 +59,7 @@ #define CONFIG_CMD_NAND /* NAND support */ #define CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */ #define CONFIG_CMD_NFS /* NFS support */ +#define CONFIG_CMD_ONENAND /* OneNAND support */ #define CONFIG_CMD_PCI /* pciinfo */ #define CONFIG_CMD_PCMCIA /* PCMCIA support */ #define CONFIG_CMD_PING /* ping support */ @@ -76,6 +77,6 @@ #define CONFIG_CMD_USB /* USB Support */ #define CONFIG_CMD_VFD /* VFD support (TRAB) */ #define CONFIG_CMD_XIMG /* Load part of Multi Image */ -#define CONFIG_CMD_MUX /* AT91 MMC/SPI Mux Support */ +#define CONFIG_CMD_AT91_SPIMUX /* AT91 MMC/SPI Mux Support */ #endif /* _CONFIG_CMD_ALL_H */ diff --git a/include/configs/ADNPESC1.h b/include/configs/ADNPESC1.h index 77938b1..c45c395 100644 --- a/include/configs/ADNPESC1.h +++ b/include/configs/ADNPESC1.h @@ -574,38 +574,30 @@ /* * Command line configuration. */ -#include <config_cmd_all.h> - -#undef CONFIG_CMD_ASKENV -#undef CONFIG_CMD_BEDBUG -#undef CONFIG_CMD_BMP -#undef CONFIG_CMD_CACHE -#undef CONFIG_CMD_DOC -#undef CONFIG_CMD_DTT -#undef CONFIG_CMD_EEPROM -#undef CONFIG_CMD_ELF -#undef CONFIG_CMD_FAT -#undef CONFIG_CMD_FDC -#undef CONFIG_CMD_FDOS -#undef CONFIG_CMD_HWFLOW -#undef CONFIG_CMD_IDE -#undef CONFIG_CMD_I2C -#undef CONFIG_CMD_JFFS2 -#undef CONFIG_CMD_KGDB -#undef CONFIG_CMD_NAND +#include <config_cmd_default.h> + +#define CONFIG_CMD_BSP +#define CONFIG_CMD_CDP +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_DIAG +#define CONFIG_CMD_DISPLAY +#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_IMMAP +#define CONFIG_CMD_IRQ +#define CONFIG_CMD_PING +#define CONFIG_CMD_PORTIO +#define CONFIG_CMD_REGINFO +#define CONFIG_CMD_REISER +#define CONFIG_CMD_SAVES +#define CONFIG_CMD_SDRAM +#define CONFIG_CMD_SNTP + #undef CONFIG_CMD_NFS -#undef CONFIG_CMD_MMC -#undef CONFIG_CMD_MII -#undef CONFIG_CMD_PCI -#undef CONFIG_CMD_PCMCIA -#undef CONFIG_CMD_SCSI -#undef CONFIG_CMD_VFD -#undef CONFIG_CMD_USB #undef CONFIG_CMD_XIMG -#if (CFG_NIOS_CPU_SPI_NUMS != 1) -#undef CONFIG_CMD_SPI -#undef CONFIG_CMD_DATE +#if (CFG_NIOS_CPU_SPI_NUMS == 1) +#define CONFIG_CMD_DATE +#define CONFIG_CMD_SPI #endif /*------------------------------------------------------------------------ diff --git a/include/configs/DK1C20.h b/include/configs/DK1C20.h index 0ddf0e3..eb78080 100644 --- a/include/configs/DK1C20.h +++ b/include/configs/DK1C20.h @@ -459,38 +459,27 @@ /* * Command line configuration. */ -#include <config_cmd_all.h> - -#undef CONFIG_CMD_ASKENV -#undef CONFIG_CMD_BEDBUG -#undef CONFIG_CMD_BMP -#undef CONFIG_CMD_BSP -#undef CONFIG_CMD_CACHE -#undef CONFIG_CMD_DATE -#undef CONFIG_CMD_DOC -#undef CONFIG_CMD_DTT -#undef CONFIG_CMD_EEPROM -#undef CONFIG_CMD_ELF -#undef CONFIG_CMD_FDC -#undef CONFIG_CMD_FDOS -#undef CONFIG_CMD_HWFLOW -#undef CONFIG_CMD_I2C -#undef CONFIG_CMD_JFFS2 -#undef CONFIG_CMD_KGDB -#undef CONFIG_CMD_NAND +#include <config_cmd_default.h> + +#define CONFIG_CMD_CDP +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_DIAG +#define CONFIG_CMD_DISPLAY +#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_FAT +#define CONFIG_CMD_IDE +#define CONFIG_CMD_IMMAP +#define CONFIG_CMD_IRQ +#define CONFIG_CMD_PING +#define CONFIG_CMD_PORTIO +#define CONFIG_CMD_REGINFO +#define CONFIG_CMD_SAVES +#define CONFIG_CMD_SDRAM +#define CONFIG_CMD_SNTP + #undef CONFIG_CMD_NFS -#undef CONFIG_CMD_MMC -#undef CONFIG_CMD_MII -#undef CONFIG_CMD_PCI -#undef CONFIG_CMD_PCMCIA -#undef CONFIG_CMD_REISER -#undef CONFIG_CMD_SCSI -#undef CONFIG_CMD_SPI -#undef CONFIG_CMD_VFD -#undef CONFIG_CMD_USB #undef CONFIG_CMD_XIMG - /*------------------------------------------------------------------------ * COMPACT FLASH *----------------------------------------------------------------------*/ diff --git a/include/configs/DK1S10.h b/include/configs/DK1S10.h index 0032fd3..bd36071 100644 --- a/include/configs/DK1S10.h +++ b/include/configs/DK1S10.h @@ -466,38 +466,25 @@ /* * Command line configuration. */ -#include <config_cmd_all.h> - -#undef CONFIG_CMD_ASKENV -#undef COND_CMD_BEDBUG -#undef COND_CMD_BMP -#undef COND_CMD_BSP -#undef COND_CMD_CACHE -#undef COND_CMD_DATE -#undef COND_CMD_DOC -#undef COND_CMD_DTT -#undef COND_CMD_EEPROM -#undef COND_CMD_ELF -#undef COND_CMD_FAT -#undef COND_CMD_FDC -#undef COND_CMD_FDOS -#undef COND_CMD_HWFLOW -#undef COND_CMD_IDE -#undef COND_CMD_I2C -#undef COND_CMD_JFFS2 -#undef COND_CMD_KGDB -#undef COND_CMD_NAND -#undef COND_CMD_NFS -#undef COND_CMD_MMC -#undef COND_CMD_MII -#undef COND_CMD_PCI -#undef COND_CMD_PCMCIA -#undef COND_CMD_SCSI -#undef COND_CMD_SPI -#undef COND_CMD_VFD -#undef COND_CMD_USB -#undef COND_CMD_XIMG - +#include <config_cmd_default.h> + +#define CONFIG_CMD_CDP +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_DIAG +#define CONFIG_CMD_DISPLAY +#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_IMMAP +#define CONFIG_CMD_IRQ +#define CONFIG_CMD_PING +#define CONFIG_CMD_PORTIO +#define CONFIG_CMD_REGINFO +#define CONFIG_CMD_REISER +#define CONFIG_CMD_SAVES +#define CONFIG_CMD_SDRAM +#define CONFIG_CMD_SNTP + +#undef CONFIG_CMD_NFS +#undef CONFIG_CMD_XIMG /*------------------------------------------------------------------------ * KGDB diff --git a/include/configs/IDS8247.h b/include/configs/IDS8247.h index 85d2bb3..bb87fae 100644 --- a/include/configs/IDS8247.h +++ b/include/configs/IDS8247.h @@ -120,6 +120,17 @@ #define CFG_NS16550_COM1 (CFG_UART_BASE + 0x8000) + +/* pass open firmware flat tree */ +#define CONFIG_OF_LIBFDT 1 +#define CONFIG_OF_BOARD_SETUP 1 + +#define OF_CPU "PowerPC,8247@0" +#define OF_SOC "soc@f0000000" +#define OF_TBCLK (bd->bi_busfreq / 4) +#define OF_STDOUT_PATH "/soc@f0000000/serial8250@e0008000" + + /* * select ethernet configuration * @@ -133,16 +144,18 @@ #undef CONFIG_ETHER_ON_SCC /* define if ether on SCC */ #define CONFIG_ETHER_ON_FCC /* define if ether on FCC */ #undef CONFIG_ETHER_NONE /* define if ether on something else */ -#define CONFIG_ETHER_INDEX 2 /* which SCC/FCC channel for ethernet */ +#define CONFIG_ETHER_INDEX 1 /* which SCC/FCC channel for ethernet */ +#define CONFIG_ETHER_ON_FCC1 +#define FCC_ENET /* - * - Rx-CLK is CLK13 - * - Tx-CLK is CLK14 + * - Rx-CLK is CLK10 + * - Tx-CLK is CLK9 * - RAM for BD/Buffers is on the 60x Bus (see 28-13) * - Enable Full Duplex in FSMR */ -# define CFG_CMXFCR_MASK (CMXFCR_FC2|CMXFCR_RF2CS_MSK|CMXFCR_TF2CS_MSK) -# define CFG_CMXFCR_VALUE (CMXFCR_RF2CS_CLK13|CMXFCR_TF2CS_CLK14) +# define CFG_CMXFCR_MASK (CMXFCR_FC1|CMXFCR_RF1CS_MSK|CMXFCR_TF1CS_MSK) +# define CFG_CMXFCR_VALUE (CMXFCR_RF1CS_CLK10|CMXFCR_TF1CS_CLK9) # define CFG_CPMFCR_RAMTYPE 0 # define CFG_FCC_PSMR (FCC_PSMR_FDE|FCC_PSMR_LPB) @@ -166,6 +179,8 @@ #define CONFIG_BOOTP_BOOTPATH #define CONFIG_BOOTP_BOOTFILESIZE +#define CONFIG_RTC_PCF8563 +#define CFG_I2C_RTC_ADDR 0x51 /* * Command line configuration. @@ -211,7 +226,10 @@ */ #define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ - +#define CFG_FLASH_CFI /* The flash is CFI compatible */ +#define CFG_FLASH_CFI_DRIVER /* Use common CFI driver */ +#define CFG_FLASH_BANKS_LIST { 0xFF800000 } +#define CFG_MAX_FLASH_BANKS_DETECT 1 /* What should the base address of the main FLASH be and how big is * it (in MBytes)? This must contain TEXT_BASE from board/ids8247/config.mk * The main FLASH is whichever is connected to *CS0. @@ -227,7 +245,7 @@ * FLASH organization */ #define CFG_MAX_FLASH_BANKS 1 /* max num of memory banks */ -#define CFG_MAX_FLASH_SECT 64 /* max num of sects on one chip */ +#define CFG_MAX_FLASH_SECT 128 /* max num of sects on one chip */ #define CFG_FLASH_ERASE_TOUT 240000 /* Flash Erase Timeout (in ms) */ #define CFG_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (in ms) */ @@ -511,12 +529,12 @@ */ #define CFG_OR2 ((~(CFG_GLOBAL_SDRAM_LIMIT-1) & ORxS_SDAM_MSK) |\ ORxS_BPD_4 |\ - ORxS_ROWST_PBI0_A10 |\ + ORxS_ROWST_PBI0_A9 |\ ORxS_NUMR_12) -#define CFG_PSDMR (PSDMR_SDAM_A13_IS_A5 |\ +#define CFG_PSDMR (PSDMR_SDAM_A14_IS_A5 |\ PSDMR_BSMA_A15_A17 |\ - PSDMR_SDA10_PBI0_A11 |\ + PSDMR_SDA10_PBI0_A10 |\ PSDMR_RFRC_5_CLK |\ PSDMR_PRETOACT_2W |\ PSDMR_ACTTORW_2W |\ diff --git a/include/configs/LANTEC.h b/include/configs/LANTEC.h index 46edd08..e92069b 100644 --- a/include/configs/LANTEC.h +++ b/include/configs/LANTEC.h @@ -87,37 +87,23 @@ /* * Command line configuration. */ -#include <config_cmd_all.h> - -#undef CONFIG_CMD_BEDBUG -#undef CONFIG_CMD_BMP -#undef CONFIG_CMD_BSP -#undef CONFIG_CMD_DISPLAY -#undef CONFIG_CMD_DOC -#undef CONFIG_CMD_DTT -#undef CONFIG_CMD_EEPROM -#undef CONFIG_CMD_ELF -#undef CONFIG_CMD_EXT2 -#undef CONFIG_CMD_FDC -#undef CONFIG_CMD_FDOS -#undef CONFIG_CMD_HWFLOW -#undef CONFIG_CMD_I2C -#undef CONFIG_CMD_IDE -#undef CONFIG_CMD_IRQ -#undef CONFIG_CMD_JFFS2 -#undef CONFIG_CMD_KGDB -#undef CONFIG_CMD_MFSL -#undef CONFIG_CMD_MII -#undef CONFIG_CMD_MMC -#undef CONFIG_CMD_NAND -#undef CONFIG_CMD_PCI -#undef CONFIG_CMD_PCMCIA -#undef CONFIG_CMD_REISER -#undef CONFIG_CMD_SCSI -#undef CONFIG_CMD_SPI -#undef CONFIG_CMD_UNIVERSE -#undef CONFIG_CMD_USB -#undef CONFIG_CMD_VFD +#include <config_cmd_default.h> + +#define CONFIG_CMD_ASKENV +#define CONFIG_CMD_CACHE +#define CONFIG_CMD_CDP +#define CONFIG_CMD_DATE +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_DIAG +#define CONFIG_CMD_FAT +#define CONFIG_CMD_IMMAP +#define CONFIG_CMD_PING +#define CONFIG_CMD_PORTIO +#define CONFIG_CMD_REGINFO +#define CONFIG_CMD_SAVES +#define CONFIG_CMD_SDRAM +#define CONFIG_CMD_SNTP + #undef CONFIG_CMD_XIMG #if !(CONFIG_LANTEC >= 2) diff --git a/include/configs/M5253EVBE.h b/include/configs/M5253EVBE.h index 48170e7..f5e1b64 100644 --- a/include/configs/M5253EVBE.h +++ b/include/configs/M5253EVBE.h @@ -146,7 +146,7 @@ * Please note that CFG_SDRAM_BASE _must_ start at 0 */ #define CFG_SDRAM_BASE 0x00000000 -#define CFG_SDRAM_SIZE 16 /* SDRAM size in MB */ +#define CFG_SDRAM_SIZE 8 /* SDRAM size in MB */ #ifdef CONFIG_MONITOR_IS_IN_RAM #define CFG_MONITOR_BASE 0x20000 diff --git a/include/configs/M5282EVB.h b/include/configs/M5282EVB.h index 3c17c1e..7bb9f60 100644 --- a/include/configs/M5282EVB.h +++ b/include/configs/M5282EVB.h @@ -163,7 +163,7 @@ * Please note that CFG_SDRAM_BASE _must_ start at 0 */ #define CFG_SDRAM_BASE 0x00000000 -#define CFG_SDRAM_SIZE 8 /* SDRAM size in MB */ +#define CFG_SDRAM_SIZE 16 /* SDRAM size in MB */ #define CFG_FLASH_BASE 0xffe00000 #define CFG_INT_FLASH_BASE 0xf0000000 #define CFG_INT_FLASH_ENABLE 0x21 diff --git a/include/configs/M5329EVB.h b/include/configs/M5329EVB.h index d3b1605..47d74a3 100644 --- a/include/configs/M5329EVB.h +++ b/include/configs/M5329EVB.h @@ -175,7 +175,7 @@ * Please note that CFG_SDRAM_BASE _must_ start at 0 */ #define CFG_SDRAM_BASE 0x40000000 -#define CFG_SDRAM_SIZE 16 /* SDRAM size in MB */ +#define CFG_SDRAM_SIZE 32 /* SDRAM size in MB */ #define CFG_SDRAM_CFG1 0x53722730 #define CFG_SDRAM_CFG2 0x56670000 #define CFG_SDRAM_CTRL 0xE1092000 diff --git a/include/configs/M54455EVB.h b/include/configs/M54455EVB.h index 6f4859c..db30958 100644 --- a/include/configs/M54455EVB.h +++ b/include/configs/M54455EVB.h @@ -27,8 +27,8 @@ * board/config.h - configuration options, board specific */ -#ifndef _JAMICA54455_H -#define _JAMICA54455_H +#ifndef _M54455EVB_H +#define _M54455EVB_H /* * High Level Configuration Options @@ -75,7 +75,7 @@ #define CONFIG_CMD_MISC #define CONFIG_CMD_MII #define CONFIG_CMD_NET -#define CONFIG_CMD_PCI +#undef CONFIG_CMD_PCI #define CONFIG_CMD_PING #define CONFIG_CMD_REGINFO @@ -129,8 +129,8 @@ "u-boot=u-boot.bin\0" \ "load=tftp ${loadaddr) ${u-boot}\0" \ "upd=run load; run prog\0" \ - "prog=prot off 0 2ffff;" \ - "era 0 2ffff;" \ + "prog=prot off 4000000 402ffff;" \ + "era 4000000 402ffff;" \ "cp.b ${loadaddr} 0 ${filesize};" \ "save\0" \ "" @@ -174,6 +174,7 @@ #define CFG_IMMR CFG_MBAR /* PCI */ +#ifdef CONFIG_CMD_PCI #define CONFIG_PCI 1 #define CFG_PCI_MEM_BUS 0xA0000000 @@ -187,6 +188,7 @@ #define CFG_PCI_CFG_BUS 0xB0000000 #define CFG_PCI_CFG_PHYS CFG_PCI_CFG_BUS #define CFG_PCI_CFG_SIZE 0x01000000 +#endif /* FPGA - Spartan 2 */ /* experiment @@ -268,8 +270,6 @@ /* Configuration for environment * Environment is embedded in u-boot in the second sector of the flash */ -#define CFG_ENV_OFFSET 0x4000 -#define CFG_ENV_SECT_SIZE 0x2000 #define CFG_ENV_IS_IN_FLASH 1 #define CONFIG_ENV_OVERWRITE 1 #undef CFG_ENV_IS_EMBEDDED @@ -278,13 +278,17 @@ * FLASH organization */ #ifdef CFG_ATMEL_BOOT -# define CFG_FLASH_BASE 0 +# define CFG_FLASH_BASE CFG_CS0_BASE # define CFG_FLASH0_BASE CFG_CS0_BASE # define CFG_FLASH1_BASE CFG_CS1_BASE +# define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x4000) +# define CFG_ENV_SECT_SIZE 0x2000 #else # define CFG_FLASH_BASE CFG_FLASH0_BASE # define CFG_FLASH0_BASE CFG_CS1_BASE # define CFG_FLASH1_BASE CFG_CS0_BASE +# define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x60000) +# define CFG_ENV_SECT_SIZE 0x20000 #endif /* M54455EVB has one non CFI flash, defined CFG_FLASH_CFI will cause the system @@ -328,9 +332,9 @@ * NOTE: Enable CONFIG_CMD_JFFS2 for JFFS2 support. */ #ifdef CFG_ATMEL_BOOT -# define CONFIG_JFFS2_DEV "nor0" +# define CONFIG_JFFS2_DEV "nor1" # define CONFIG_JFFS2_PART_SIZE 0x01000000 -# define CONFIG_JFFS2_PART_OFFSET CFG_FLASH1_BASE +# define CONFIG_JFFS2_PART_OFFSET (CFG_FLASH1_BASE + 0x500000) #else # define CONFIG_JFFS2_DEV "nor0" # define CONFIG_JFFS2_PART_SIZE (0x01000000 - 0x500000) @@ -356,20 +360,20 @@ #ifdef CFG_ATMEL_BOOT /* Atmel Flash */ -#define CFG_CS0_BASE 0 +#define CFG_CS0_BASE 0x04000000 #define CFG_CS0_MASK 0x00070001 #define CFG_CS0_CTRL 0x00001140 /* Intel Flash */ -#define CFG_CS1_BASE 0x04000000 +#define CFG_CS1_BASE 0x00000000 #define CFG_CS1_MASK 0x01FF0001 -#define CFG_CS1_CTRL 0x003F3D60 +#define CFG_CS1_CTRL 0x00000D60 #define CFG_ATMEL_BASE CFG_CS0_BASE #else /* Intel Flash */ -#define CFG_CS0_BASE 0 +#define CFG_CS0_BASE 0x00000000 #define CFG_CS0_MASK 0x01FF0001 -#define CFG_CS0_CTRL 0x003F3D60 +#define CFG_CS0_CTRL 0x00000D60 /* Atmel Flash */ #define CFG_CS1_BASE 0x04000000 #define CFG_CS1_MASK 0x00070001 @@ -388,4 +392,4 @@ #define CFG_CS3_MASK 0x00070001 #define CFG_CS3_CTRL 0x00000020 -#endif /* _JAMICA54455_H */ +#endif /* _M54455EVB_H */ diff --git a/include/configs/MPC8260ADS.h b/include/configs/MPC8260ADS.h index 713518d..23508f9 100644 --- a/include/configs/MPC8260ADS.h +++ b/include/configs/MPC8260ADS.h @@ -209,35 +209,25 @@ /* * Command line configuration. */ -#include <config_cmd_all.h> - -#undef CONFIG_CMD_BEDBUG -#undef CONFIG_CMD_BMP -#undef CONFIG_CMD_BSP -#undef CONFIG_CMD_DATE -#undef CONFIG_CMD_DISPLAY -#undef CONFIG_CMD_DOC -#undef CONFIG_CMD_DTT -#undef CONFIG_CMD_EEPROM -#undef CONFIG_CMD_ELF -#undef CONFIG_CMD_EXT2 -#undef CONFIG_CMD_FAT -#undef CONFIG_CMD_FDC -#undef CONFIG_CMD_FDOS -#undef CONFIG_CMD_HWFLOW -#undef CONFIG_CMD_IDE -#undef CONFIG_CMD_KGDB -#undef CONFIG_CMD_MFSL -#undef CONFIG_CMD_MMC -#undef CONFIG_CMD_NAND -#undef CONFIG_CMD_PCMCIA -#undef CONFIG_CMD_REISER -#undef CONFIG_CMD_SCSI -#undef CONFIG_CMD_SPI -#undef CONFIG_CMD_SNTP -#undef CONFIG_CMD_UNIVERSE -#undef CONFIG_CMD_USB -#undef CONFIG_CMD_VFD +#include <config_cmd_default.h> + +#define CONFIG_CMD_ASKENV +#define CONFIG_CMD_CACHE +#define CONFIG_CMD_CDP +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_DIAG +#define CONFIG_CMD_I2C +#define CONFIG_CMD_IMMAP +#define CONFIG_CMD_IRQ +#define CONFIG_CMD_JFFS2 +#define CONFIG_CMD_MII +#define CONFIG_CMD_PCI +#define CONFIG_CMD_PING +#define CONFIG_CMD_PORTIO +#define CONFIG_CMD_REGINFO +#define CONFIG_CMD_SAVES +#define CONFIG_CMD_SDRAM + #undef CONFIG_CMD_XIMG #if CONFIG_ADSTYPE == CFG_8272ADS diff --git a/include/configs/MPC8266ADS.h b/include/configs/MPC8266ADS.h index 14b041e..3659002 100644 --- a/include/configs/MPC8266ADS.h +++ b/include/configs/MPC8266ADS.h @@ -146,37 +146,26 @@ /* * Command line configuration. */ -#include <config_cmd_all.h> - -#undef CONFIG_CMD_BEDBUG -#undef CONFIG_CMD_BMP -#undef CONFIG_CMD_BSP -#undef CONFIG_CMD_DATE -#undef CONFIG_CMD_DHCP -#undef CONFIG_CMD_DISPLAY -#undef CONFIG_CMD_DOC -#undef CONFIG_CMD_DTT -#undef CONFIG_CMD_EEPROM -#undef CONFIG_CMD_ELF -#undef CONFIG_CMD_EXT2 -#undef CONFIG_CMD_FDC -#undef CONFIG_CMD_FDOS -#undef CONFIG_CMD_HWFLOW -#undef CONFIG_CMD_IDE -#undef CONFIG_CMD_JFFS2 -#undef CONFIG_CMD_KGDB -#undef CONFIG_CMD_MFSL -#undef CONFIG_CMD_MMC -#undef CONFIG_CMD_NAND -#undef CONFIG_CMD_PCMCIA -#undef CONFIG_CMD_REISER -#undef CONFIG_CMD_SCSI -#undef CONFIG_CMD_SPI -#undef CONFIG_CMD_SNTP -#undef CONFIG_CMD_VFD -#undef CONFIG_CMD_UNIVERSE -#undef CONFIG_CMD_USB -#undef CONFIG_CMD_XIMG +#include <config_cmd_default.h> + +/* Commands we want, that are not part of default set */ +#define CONFIG_CMD_ASKENV /* ask for env variable */ +#define CONFIG_CMD_CACHE /* icache, dcache */ +#define CONFIG_CMD_DHCP /* DHCP Support */ +#define CONFIG_CMD_DIAG /* Diagnostics */ +#define CONFIG_CMD_IMMAP /* IMMR dump support */ +#define CONFIG_CMD_IRQ /* irqinfo */ +#define CONFIG_CMD_MII /* MII support */ +#define CONFIG_CMD_PCI /* pciinfo */ +#define CONFIG_CMD_PING /* ping support */ +#define CONFIG_CMD_PORTIO /* Port I/O */ +#define CONFIG_CMD_REGINFO /* Register dump */ +#define CONFIG_CMD_SAVES /* save S record dump */ +#define CONFIG_CMD_SDRAM /* SDRAM DIMM SPD info printout */ + +/* Commands from default set we don't need */ +#undef CONFIG_CMD_FPGA /* FPGA configuration Support */ +#undef CONFIG_CMD_SETGETDCR /* DCR support on 4xx */ /* Define a command string that is automatically executed when no character * is read on the console interface withing "Boot Delay" after reset. diff --git a/include/configs/MPC8541CDS.h b/include/configs/MPC8541CDS.h index 4e061bd..8dda665 100644 --- a/include/configs/MPC8541CDS.h +++ b/include/configs/MPC8541CDS.h @@ -316,6 +316,7 @@ extern unsigned long get_clock_freq(void); #define OF_SOC "soc8541@e0000000" #define OF_TBCLK (bd->bi_busfreq / 8) #define OF_STDOUT_PATH "/soc8541@e0000000/serial@4600" +#define OF_PCI "pci@e0008000" /* * I2C diff --git a/include/configs/MPC8544DS.h b/include/configs/MPC8544DS.h index f580cca..13e2a2c 100644 --- a/include/configs/MPC8544DS.h +++ b/include/configs/MPC8544DS.h @@ -198,6 +198,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define PIXIS_VSPEED1 0x18 /* VELA VSpeed 1 */ #define PIXIS_VCLKH 0x19 /* VELA VCLKH register */ #define PIXIS_VCLKL 0x1A /* VELA VCLKL register */ +#define CFG_PIXIS_VBOOT_MASK 0x40 /* Reset altbank mask*/ /* define to use L1 as initial stack */ diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h index 6083715..4edc7fd 100644 --- a/include/configs/MPC8548CDS.h +++ b/include/configs/MPC8548CDS.h @@ -340,6 +340,7 @@ extern unsigned long get_clock_freq(void); #define OF_SOC "soc8548@e0000000" #define OF_TBCLK (bd->bi_busfreq / 8) #define OF_STDOUT_PATH "/soc8548@e0000000/serial@4600" +#define OF_PCI "pci@e0008000" /* * I2C diff --git a/include/configs/MPC8555CDS.h b/include/configs/MPC8555CDS.h index 1d1b7c9..c414bf0 100644 --- a/include/configs/MPC8555CDS.h +++ b/include/configs/MPC8555CDS.h @@ -316,6 +316,7 @@ extern unsigned long get_clock_freq(void); #define OF_SOC "soc8555@e0000000" #define OF_TBCLK (bd->bi_busfreq / 8) #define OF_STDOUT_PATH "/soc8555@e0000000/serial@4600" +#define OF_PCI "pci@e0008000" /* * I2C diff --git a/include/configs/MPC8568MDS.h b/include/configs/MPC8568MDS.h index ba744e9..b9366cc 100644 --- a/include/configs/MPC8568MDS.h +++ b/include/configs/MPC8568MDS.h @@ -297,7 +297,7 @@ extern unsigned long get_clock_freq(void); #define OF_SOC "soc8568@e0000000" #define OF_QE "qe@e0080000" #define OF_TBCLK (bd->bi_busfreq / 8) -#define OF_STDOUT_PATH "/soc8568@e0000000/serial@4600" +#define OF_STDOUT_PATH "/soc8568@e0000000/serial@4500" /* * I2C @@ -334,11 +334,6 @@ extern unsigned long get_clock_freq(void); #define CFG_SRIO_MEM_BASE 0xc0000000 -#if defined(CONFIG_PCI) - -#define CONFIG_NET_MULTI -#define CONFIG_PCI_PNP /* do pci plug-and-play */ - #ifdef CONFIG_QE /* * QE UEC ethernet configuration @@ -377,6 +372,11 @@ extern unsigned long get_clock_freq(void); #endif #endif /* CONFIG_QE */ +#if defined(CONFIG_PCI) + +#define CONFIG_NET_MULTI +#define CONFIG_PCI_PNP /* do pci plug-and-play */ + #undef CONFIG_EEPRO100 #undef CONFIG_TULIP diff --git a/include/configs/MPC8641HPCN.h b/include/configs/MPC8641HPCN.h index 7d8a380..6f87240 100644 --- a/include/configs/MPC8641HPCN.h +++ b/include/configs/MPC8641HPCN.h @@ -201,6 +201,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define PIXIS_VSPEED1 0x18 /* VELA VSpeed 1 */ #define PIXIS_VCLKH 0x19 /* VELA VCLKH register */ #define PIXIS_VCLKL 0x1A /* VELA VCLKL register */ +#define CFG_PIXIS_VBOOT_MASK 0x40 /* Reset altbank mask*/ #define CFG_MAX_FLASH_BANKS 2 /* number of banks */ #define CFG_MAX_FLASH_SECT 128 /* sectors per device */ @@ -346,6 +347,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define CFG_USB_EVENT_POLL 1 #define CFG_USB_OHCI_SLOT_NAME "ohci_pci" #define CFG_USB_OHCI_MAX_ROOT_PORTS 15 +#define CFG_OHCI_SWAP_REG_ACCESS 1 #if !defined(CONFIG_PCI_PNP) #define PCI_ENET0_IOADDR 0xe0000000 @@ -544,6 +546,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_CMD_PCI #define CONFIG_CMD_SCSI #define CONFIG_CMD_EXT2 + #define CONFIG_CMD_USB #endif diff --git a/include/configs/RBC823.h b/include/configs/RBC823.h index 2f6de81..fa32e33 100644 --- a/include/configs/RBC823.h +++ b/include/configs/RBC823.h @@ -105,36 +105,31 @@ /* * Command line configuration. */ -#include <config_cmd_all.h> - -#undef CONFIG_CMD_BSP -#undef CONFIG_CMD_DATE -#undef CONFIG_CMD_DISPLAY -#undef CONFIG_CMD_DTT -#undef CONFIG_CMD_EXT2 -#undef CONFIG_CMD_FDC -#undef CONFIG_CMD_FDOS -#undef CONFIG_CMD_HWFLOW -#undef CONFIG_CMD_IDE -#undef CONFIG_CMD_IRQ -#undef CONFIG_CMD_JFFS2 -#undef CONFIG_CMD_MII -#undef CONFIG_CMD_MFSL -#undef CONFIG_CMD_MMC -#undef CONFIG_CMD_NAND -#undef CONFIG_CMD_PCI -#undef CONFIG_CMD_PCMCIA -#undef CONFIG_CMD_REISER -#undef CONFIG_CMD_SCSI +#include <config_cmd_default.h> + +#define CONFIG_CMD_ASKENV +#define CONFIG_CMD_BEDBUG +#define CONFIG_CMD_BMP +#define CONFIG_CMD_CACHE +#define CONFIG_CMD_CDP +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_DIAG +#define CONFIG_CMD_DOC +#define CONFIG_CMD_EEPROM +#define CONFIG_CMD_ELF +#define CONFIG_CMD_FAT +#define CONFIG_CMD_I2C +#define CONFIG_CMD_IMMAP +#define CONFIG_CMD_KGDB +#define CONFIG_CMD_PING +#define CONFIG_CMD_PORTIO +#define CONFIG_CMD_REGINFO +#define CONFIG_CMD_SAVES +#define CONFIG_CMD_SDRAM + #undef CONFIG_CMD_SETGETDCR -#undef CONFIG_CMD_SNTP -#undef CONFIG_CMD_SPI -#undef CONFIG_CMD_UNIVERSE -#undef CONFIG_CMD_USB -#undef CONFIG_CMD_VFD #undef CONFIG_CMD_XIMG - /* * Miscellaneous configurable options */ diff --git a/include/configs/TQM5200.h b/include/configs/TQM5200.h index e0c9d81..7ecc275 100644 --- a/include/configs/TQM5200.h +++ b/include/configs/TQM5200.h @@ -188,7 +188,7 @@ #endif #ifdef CONFIG_PCI -#define CONFIG_CMD_CMD_PCI +#define CONFIG_CMD_PCI #endif #if defined(CONFIG_MINIFAP) || defined(CONFIG_STK52XX) || defined(CONFIG_FO300) @@ -238,13 +238,13 @@ "protect on FC000000 +${filesize}\0" #endif -#ifndef CONFIG_CAM5200 +#if defined(CONFIG_TQM5200) #define CUSTOM_ENV_SETTINGS \ + "hostname=tqm5200\0" \ "bootfile=/tftpboot/tqm5200/uImage\0" \ - "bootfile_fdt=/tftpboot/tqm5200/uImage_fdt\0" \ "fdt_file=/tftpboot/tqm5200/tqm5200.dtb\0" \ "u-boot=/tftpboot/tqm5200/u-boot.bin\0" -#else +#elif defined(CONFIG_CAM5200) #define CUSTOM_ENV_SETTINGS \ "bootfile=cam5200/uImage\0" \ "u-boot=cam5200/u-boot.bin\0" \ @@ -252,11 +252,13 @@ #endif #define CONFIG_EXTRA_ENV_SETTINGS \ - "console=ttyS0\0" \ - "kernel_addr=200000\0" \ - "fdt_addr=400000\0" \ - "hostname=tqm5200\0" \ "netdev=eth0\0" \ + "console=ttyPSC0\0" \ + "fdt_addr=FC0A0000\0" \ + "kernel_addr=FC0C0000\0" \ + "ramdisk_addr=FC300000\0" \ + "kernel_addr_r=400000\0" \ + "fdt_addr_r=600000\0" \ "rootpath=/opt/eldk/ppc_6xx\0" \ "ramargs=setenv bootargs root=/dev/ram rw\0" \ "nfsargs=setenv bootargs root=/dev/nfs rw " \ @@ -266,16 +268,20 @@ ":${hostname}:${netdev}:off panic=1\0" \ "addcons=setenv bootargs ${bootargs} " \ "console=${console},${baudrate}\0" \ - "flash_self=run ramargs addip addcons;" \ + "flash_self_old=sete console ttyS0; run ramargs addip addcons;" \ "bootm ${kernel_addr} ${ramdisk_addr}\0" \ - "flash_nfs=run nfsargs addip addcons;" \ + "flash_self=run ramargs addip addcons;" \ + "bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0" \ + "flash_nfs_old=sete console ttyS0; run nfsargs addip addcons;" \ "bootm ${kernel_addr}\0" \ - "net_nfs=tftp ${kernel_addr} ${bootfile};" \ - "run nfsargs addip addcons;bootm\0" \ - "net_nfs_fdt=tftp ${kernel_addr} ${bootfile_fdt};" \ - "tftp ${fdt_addr} ${fdt_file};setenv console ttyPSC0;" \ - "run nfsargs addip addcons;" \ + "flash_nfs=run nfsargs addip addcons;" \ "bootm ${kernel_addr} - ${fdt_addr}\0" \ + "net_nfs_old=tftp ${kernel_addr_r} ${bootfile};" \ + "sete console ttyS0; run nfsargs addip addcons;bootm\0" \ + "net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \ + "tftp ${fdt_addr_r} ${fdt_file}; " \ + "run nfsargs addip addcons; " \ + "bootm ${kernel_addr_r} - ${fdt_addr_r}\0" \ CUSTOM_ENV_SETTINGS \ "load=tftp 200000 ${u-boot}\0" \ ENV_UPDT \ @@ -408,11 +414,12 @@ # endif /* CFG_LOWBOOT */ # else /* !CONFIG_TQM5200_B */ # define MTDPARTS_DEFAULT "mtdparts=TQM5200-0:640k(firmware)," \ - "1408k(kernel)," \ + "128k(dtb)," \ + "2304k(kernel)," \ "2m(initrd)," \ "4m(small-fs)," \ "8m(misc)," \ - "16m(big-fs)" + "15m(big-fs)" # endif /* CONFIG_TQM5200_B */ #elif defined (CONFIG_CAM5200) # define MTDPARTS_DEFAULT "mtdparts=TQM5200-0:768k(firmware)," \ @@ -540,7 +547,7 @@ # if defined (CONFIG_TQM5200_REV100) # error TQM5200 REV100 not supported on STK52XX REV200 or above # else/* TQM5200 REV200 and above */ -# define CFG_GPS_PORT_CONFIG 0x91500004 +# define CFG_GPS_PORT_CONFIG 0x91500404 # endif # endif #elif defined (CONFIG_FO300) diff --git a/include/configs/TQM860M.h b/include/configs/TQM860M.h index 684b86f..fe3a2f0 100644 --- a/include/configs/TQM860M.h +++ b/include/configs/TQM860M.h @@ -69,9 +69,14 @@ "net_nfs=tftp 200000 ${bootfile};run nfsargs addip;bootm\0" \ "rootpath=/opt/eldk/ppc_8xx\0" \ "bootfile=/tftpboot/TQM860M/uImage\0" \ - "fdt_addr=40080000\0" \ - "kernel_addr=400A0000\0" \ + "fdt_addr=400C0000\0" \ + "kernel_addr=40100000\0" \ "ramdisk_addr=40280000\0" \ + "load=tftp 200000 ${u-boot}\0" \ + "update=protect off 40000000 +${filesize};" \ + "erase 40000000 +${filesize};" \ + "cp.b 200000 40000000 ${filesize};" \ + "protect on 40000000 +${filesize}\0" \ "" #define CONFIG_BOOTCOMMAND "run flash_self" @@ -172,7 +177,7 @@ #define CFG_FLASH_BASE 0x40000000 #define CFG_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ #define CFG_MONITOR_BASE CFG_FLASH_BASE -#define CFG_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */ +#define CFG_MALLOC_LEN (256 << 10) /* Reserve 256 kB for malloc() */ /* * For booting Linux, the board info and command line data @@ -193,7 +198,7 @@ #define CFG_ENV_IS_IN_FLASH 1 #define CFG_ENV_OFFSET 0x40000 /* Offset of Environment Sector */ #define CFG_ENV_SIZE 0x08000 /* Total Size of Environment Sector */ -#define CFG_ENV_SECT_SIZE 0x20000 /* Total Size of Environment Sector */ +#define CFG_ENV_SECT_SIZE 0x40000 /* Total Size of Environment Sector */ /* Address and size of Redundant Environment Sector */ #define CFG_ENV_OFFSET_REDUND (CFG_ENV_OFFSET+CFG_ENV_SECT_SIZE) diff --git a/include/configs/TQM866M.h b/include/configs/TQM866M.h index 0d77891..ca3c166 100644 --- a/include/configs/TQM866M.h +++ b/include/configs/TQM866M.h @@ -81,9 +81,14 @@ "net_nfs=tftp 200000 ${bootfile};run nfsargs addip;bootm\0" \ "rootpath=/opt/eldk/ppc_8xx\0" \ "bootfile=/tftpboot/TQM866M/uImage\0" \ - "fdt_addr=40080000\0" \ - "kernel_addr=400A0000\0" \ + "fdt_addr=400C0000\0" \ + "kernel_addr=40100000\0" \ "ramdisk_addr=40280000\0" \ + "load=tftp 200000 ${u-boot}\0" \ + "update=protect off 40000000 +${filesize};" \ + "erase 40000000 +${filesize};" \ + "cp.b 200000 40000000 ${filesize};" \ + "protect on 40000000 +${filesize}\0" \ "" #define CONFIG_BOOTCOMMAND "run flash_self" @@ -215,7 +220,7 @@ #define CFG_FLASH_BASE 0x40000000 #define CFG_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ #define CFG_MONITOR_BASE CFG_FLASH_BASE -#define CFG_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */ +#define CFG_MALLOC_LEN (256 << 10) /* Reserve 256 kB for malloc() */ /* * For booting Linux, the board info and command line data @@ -236,7 +241,7 @@ #define CFG_ENV_IS_IN_FLASH 1 #define CFG_ENV_OFFSET 0x40000 /* Offset of Environment Sector */ #define CFG_ENV_SIZE 0x08000 /* Total Size of Environment Sector */ -#define CFG_ENV_SECT_SIZE 0x20000 /* Total Size of Environment Sector */ +#define CFG_ENV_SECT_SIZE 0x40000 /* Total Size of Environment Sector */ /* Address and size of Redundant Environment Sector */ #define CFG_ENV_OFFSET_REDUND (CFG_ENV_OFFSET+CFG_ENV_SECT_SIZE) @@ -421,26 +426,30 @@ #define CFG_PTA_PER_CLK ((4096 * 64 * 1000) / (4 * 64)) /* - * Memory Periodic Timer Prescaler - * Periodic timer for refresh, start with refresh rate for 40 MHz clock - * (CFG_8xx_CPUCLK_MIN / CFG_PTA_PER_CLK) + * Periodic timer (MAMR[PTx]) for 4 * 7.8 us refresh (= 31.2 us per quad) + * + * CPUclock(MHz) * 31.2 + * CFG_MAMR_PTA = ----------------------------------- with DFBRG = 0 + * 2^(2*SCCR[DFBRG]) * MPTPR_PTP_DIV16 + * + * CPU clock = 15 MHz: CFG_MAMR_PTA = 29 -> 4 * 7.73 us + * CPU clock = 50 MHz: CFG_MAMR_PTA = 97 -> 4 * 7.76 us + * CPU clock = 66 MHz: CFG_MAMR_PTA = 128 -> 4 * 7.75 us + * CPU clock = 133 MHz: CFG_MAMR_PTA = 255 -> 4 * 7.67 us + * + * Value 97 is for 4 * 7.8 us at 50 MHz. So the refresh cycle requirement will + * be met also in the default configuration, i.e. if environment variable + * 'cpuclk' is not set. */ -#define CFG_MAMR_PTA 39 +#define CFG_MAMR_PTA 97 /* - * For 16 MBit, refresh rates could be 31.3 us - * (= 64 ms / 2K = 125 / quad bursts). - * For a simpler initialization, 15.6 us is used instead. - * - * #define CFG_MPTPR_2BK_2K MPTPR_PTP_DIV32 for 2 banks - * #define CFG_MPTPR_1BK_2K MPTPR_PTP_DIV64 for 1 bank + * Memory Periodic Timer Prescaler Register (MPTPR) values. */ -#define CFG_MPTPR_2BK_4K MPTPR_PTP_DIV16 /* setting for 2 banks */ -#define CFG_MPTPR_1BK_4K MPTPR_PTP_DIV32 /* setting for 1 bank */ - -/* refresh rate 7.8 us (= 64 ms / 8K = 31.2 / quad bursts) for 256 MBit */ -#define CFG_MPTPR_2BK_8K MPTPR_PTP_DIV8 /* setting for 2 banks */ -#define CFG_MPTPR_1BK_8K MPTPR_PTP_DIV16 /* setting for 1 bank */ +/* 4 * 7.8 us refresh (= 31.2 us per quad) at 50 MHz and PTA = 97 */ +#define CFG_MPTPR_2BK_4K MPTPR_PTP_DIV16 +/* 4 * 3.9 us refresh (= 15.6 us per quad) at 50 MHz and PTA = 97 */ +#define CFG_MPTPR_2BK_8K MPTPR_PTP_DIV8 /* * MAMR settings for SDRAM diff --git a/include/configs/ads5121.h b/include/configs/ads5121.h index 22eac1b..bb1efdf 100644 --- a/include/configs/ads5121.h +++ b/include/configs/ads5121.h @@ -235,6 +235,14 @@ #endif /* + * EEPROM configuration + */ +#define CFG_I2C_EEPROM_ADDR_LEN 2 /* 16-bit EEPROM address */ +#define CFG_I2C_EEPROM_ADDR 0x50 /* Atmel: AT24C32A-10TQ-2.7 */ +#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 /* 10ms of delay */ +#define CFG_EEPROM_PAGE_WRITE_BITS 5 /* 32-Byte Page Write Mode */ + +/* * Ethernet configuration */ #define CONFIG_MPC512x_FEC 1 @@ -275,6 +283,7 @@ #define CONFIG_CMD_NFS #define CONFIG_CMD_PING #define CONFIG_CMD_REGINFO +#define CONFIG_CMD_EEPROM #if defined(CONFIG_PCI) #define CONFIG_CMD_PCI diff --git a/include/configs/atstk1002.h b/include/configs/atstk1002.h index 75b153e..b33e26f 100644 --- a/include/configs/atstk1002.h +++ b/include/configs/atstk1002.h @@ -39,8 +39,10 @@ #define CFG_HZ 1000 /* - * Set up the PLL to run at 199.5 MHz, the CPU to run at 1/2 the PLL - * frequency and the peripherals to run at 1/4 the PLL frequency. + * Set up the PLL to run at 140 MHz, the CPU to run at the PLL + * frequency, the HSB and PBB at 1/2, and the PBA to run at 1/4 the + * PLL frequency. + * (CFG_OSC0_HZ * CFG_PLL0_MUL) / CFG_PLL0_DIV = PLL MHz */ #define CONFIG_PLL 1 #define CFG_POWER_MANAGER 1 @@ -48,9 +50,25 @@ #define CFG_PLL0_DIV 1 #define CFG_PLL0_MUL 7 #define CFG_PLL0_SUPPRESS_CYCLES 16 +/* + * Set the CPU running at: + * PLL / (2^CFG_CLKDIV_CPU) = CPU MHz + */ #define CFG_CLKDIV_CPU 0 +/* + * Set the HSB running at: + * PLL / (2^CFG_CLKDIV_HSB) = HSB MHz + */ #define CFG_CLKDIV_HSB 1 +/* + * Set the PBA running at: + * PLL / (2^CFG_CLKDIV_PBA) = PBA MHz + */ #define CFG_CLKDIV_PBA 2 +/* + * Set the PBB running at: + * PLL / (2^CFG_CLKDIV_PBB) = PBB MHz + */ #define CFG_CLKDIV_PBB 1 /* @@ -78,7 +96,7 @@ #define CONFIG_BAUDRATE 115200 #define CONFIG_BOOTARGS \ - "console=ttyS0 root=/dev/mtdblock1 rootfstype=jffs2 fbmem=600k" + "console=ttyS0 root=/dev/mmcblk0p1 fbmem=600k rootwait=1" #define CONFIG_BOOTCOMMAND \ "fsload; bootm $(fileaddr)" @@ -87,7 +105,7 @@ * Only interrupt autoboot if <space> is pressed. Otherwise, garbage * data on the serial line may interrupt the boot sequence. */ -#define CONFIG_BOOTDELAY 2 +#define CONFIG_BOOTDELAY 1 #define CONFIG_AUTOBOOT 1 #define CONFIG_AUTOBOOT_KEYED 1 #define CONFIG_AUTOBOOT_PROMPT \ @@ -96,15 +114,10 @@ #define CONFIG_AUTOBOOT_STOP_STR " " /* - * These are "locally administered ethernet addresses" generated by - * ./tools/gen_eth_addr - * - * After booting the board for the first time, new addresses should be - * generated and assigned to the environment variables "ethaddr" and - * "eth1addr". + * After booting the board for the first time, new ethernet addresses + * should be generated and assigned to the environment variables + * "ethaddr" and "eth1addr". This is normally done during production. */ -#define CONFIG_ETHADDR "6a:87:71:14:cd:cb" -#define CONFIG_ETH1ADDR "ca:f8:15:e6:3e:e6" #define CONFIG_OVERWRITE_ETHADDR_ONCE 1 #define CONFIG_NET_MULTI 1 @@ -182,12 +195,8 @@ #define CFG_PBSIZE (CFG_CBSIZE + sizeof(CFG_PROMPT) + 16) #define CFG_LONGHELP 1 -#define CFG_MEMTEST_START \ - ({ gd->bd->bi_dram[0].start; }) -#define CFG_MEMTEST_END \ - ({ \ - gd->bd->bi_dram[0].start + gd->bd->bi_dram[0].size; \ - }) +#define CFG_MEMTEST_START CFG_SDRAM_BASE +#define CFG_MEMTEST_END (CFG_MEMTEST_START + 0x700000) #define CFG_BAUDRATE_TABLE { 115200, 38400, 19200, 9600, 2400 } #endif /* __CONFIG_H */ diff --git a/include/configs/delta.h b/include/configs/delta.h index 09667ed..14fde1a 100644 --- a/include/configs/delta.h +++ b/include/configs/delta.h @@ -123,6 +123,8 @@ #define CONFIG_USB_STORAGE 1 #define CONFIG_DOS_PARTITION 1 +#include <asm/arch/pxa-regs.h> /* for OHCI_REGS_BASE */ + #undef CFG_USB_OHCI_BOARD_INIT #define CFG_USB_OHCI_CPU_INIT 1 #define CFG_USB_OHCI_REGS_BASE OHCI_REGS_BASE diff --git a/include/configs/ep8260.h b/include/configs/ep8260.h index 025c249..490db5f 100644 --- a/include/configs/ep8260.h +++ b/include/configs/ep8260.h @@ -303,38 +303,29 @@ /* * Command line configuration. */ -#include <config_cmd_all.h> +#include <config_cmd_default.h> + +#define CONFIG_CMD_ASKENV +#define CONFIG_CMD_BEDBUG +#define CONFIG_CMD_CACHE +#define CONFIG_CMD_CDP +#define CONFIG_CMD_DATE +#define CONFIG_CMD_DIAG +#define CONFIG_CMD_ELF +#define CONFIG_CMD_FAT +#define CONFIG_CMD_I2C +#define CONFIG_CMD_IMMAP +#define CONFIG_CMD_IRQ +#define CONFIG_CMD_PING +#define CONFIG_CMD_PORTIO +#define CONFIG_CMD_REGINFO +#define CONFIG_CMD_SAVES +#define CONFIG_CMD_SDRAM +#define CONFIG_CMD_SNTP -#undef CONFIG_CMD_BMP -#undef CONFIG_CMD_BSP #undef CONFIG_CMD_DCR -#undef CONFIG_CMD_DHCP -#undef CONFIG_CMD_DISPLAY -#undef CONFIG_CMD_DOC -#undef CONFIG_CMD_DTT -#undef CONFIG_CMD_EEPROM -#undef CONFIG_CMD_EXT2 -#undef CONFIG_CMD_FDC -#undef CONFIG_CMD_FDOS -#undef CONFIG_CMD_HWFLOW -#undef CONFIG_CMD_IDE -#undef CONFIG_CMD_JFFS2 -#undef CONFIG_CMD_KGDB -#undef CONFIG_CMD_MII -#undef CONFIG_CMD_MFSL -#undef CONFIG_CMD_MMC -#undef CONFIG_CMD_NAND -#undef CONFIG_CMD_PCI -#undef CONFIG_CMD_PCMCIA -#undef CONFIG_CMD_REISER -#undef CONFIG_CMD_SCSI -#undef CONFIG_CMD_SPI -#undef CONFIG_CMD_UNIVERSE -#undef CONFIG_CMD_USB -#undef CONFIG_CMD_VFD #undef CONFIG_CMD_XIMG - /* Where do the internal registers live? */ #define CFG_IMMR 0xF0000000 #define CFG_DEFAULT_IMMR 0x00010000 diff --git a/include/configs/hymod.h b/include/configs/hymod.h index 2547afb..01e7970 100644 --- a/include/configs/hymod.h +++ b/include/configs/hymod.h @@ -185,33 +185,34 @@ /* * Command line configuration. */ -#include <config_cmd_all.h> - -#undef CONFIG_CMD_BEDBUG -#undef CONFIG_CMD_BMP -#undef CONFIG_CMD_DISPLAY -#undef CONFIG_CMD_DOC -#undef CONFIG_CMD_EXT2 -#undef CONFIG_CMD_FDC -#undef CONFIG_CMD_FDOS +#include <config_cmd_default.h> + +#define CONFIG_CMD_ASKENV +#define CONFIG_CMD_BSP +#define CONFIG_CMD_CACHE +#define CONFIG_CMD_CDP +#define CONFIG_CMD_DATE +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_DIAG +#define CONFIG_CMD_DTT +#define CONFIG_CMD_EEPROM +#define CONFIG_CMD_ELF +#define CONFIG_CMD_FAT +#define CONFIG_CMD_I2C +#define CONFIG_CMD_IMMAP +#define CONFIG_CMD_IRQ +#define CONFIG_CMD_KGDB +#define CONFIG_CMD_MII +#define CONFIG_CMD_PING +#define CONFIG_CMD_PORTIO +#define CONFIG_CMD_REGINFO +#define CONFIG_CMD_SAVES +#define CONFIG_CMD_SDRAM +#define CONFIG_CMD_SNTP + #undef CONFIG_CMD_FPGA -#undef CONFIG_CMD_HWFLOW -#undef CONFIG_CMD_IDE -#undef CONFIG_CMD_JFFS2 -#undef CONFIG_CMD_NAND -#undef CONFIG_CMD_MFSL -#undef CONFIG_CMD_MMC -#undef CONFIG_CMD_PCMCIA -#undef CONFIG_CMD_PCI -#undef CONFIG_CMD_USB -#undef CONFIG_CMD_REISER -#undef CONFIG_CMD_SCSI -#undef CONFIG_CMD_SPI -#undef CONFIG_CMD_UNIVERSE -#undef CONFIG_CMD_VFD #undef CONFIG_CMD_XIMG - #ifdef DEBUG #define CONFIG_BOOTDELAY -1 /* autoboot disabled */ #else diff --git a/include/configs/lubbock.h b/include/configs/lubbock.h index 4adf254..82fe19c 100644 --- a/include/configs/lubbock.h +++ b/include/configs/lubbock.h @@ -42,6 +42,7 @@ #endif #define CONFIG_MMC 1 #define BOARD_LATE_INIT 1 +#define CONFIG_DOS_PARTITION #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ diff --git a/include/configs/lwmon5.h b/include/configs/lwmon5.h index be48324..52deab4 100644 --- a/include/configs/lwmon5.h +++ b/include/configs/lwmon5.h @@ -200,12 +200,13 @@ "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \ ":${hostname}:${netdev}:off panic=1\0" \ "addtty=setenv bootargs ${bootargs} console=ttyS1,${baudrate}\0"\ - "flash_nfs=run nfsargs addip addtty;" \ + "addmisc=setenv bootargs ${bootargs} rtc-pcf8563.probe=0,0x51\0"\ + "flash_nfs=run nfsargs addip addtty addmisc;" \ "bootm ${kernel_addr}\0" \ - "flash_self=run ramargs addip addtty;" \ + "flash_self=run ramargs addip addtty addmisc;" \ "bootm ${kernel_addr} ${ramdisk_addr}\0" \ - "net_nfs=tftp 200000 ${bootfile};run nfsargs addip addtty;" \ - "bootm\0" \ + "net_nfs=tftp 200000 ${bootfile};" \ + "run nfsargs addip addtty addmisc;bootm\0" \ "rootpath=/opt/eldk/ppc_4xxFP\0" \ "bootfile=/tftpboot/lwmon5/uImage\0" \ "kernel_addr=FC000000\0" \ @@ -338,7 +339,12 @@ #define CFG_PCI_SUBSYS_VENDORID 0x10e8 /* AMCC */ #define CFG_PCI_SUBSYS_ID 0xcafe /* Whatever */ +#if 0 +/* + * ToDo: Watchdog is not test fully, so exclude it for now + */ #define CONFIG_HW_WATCHDOG 1 /* Use external HW-Watchdog */ +#endif /* * For booting Linux, the board info and command line data @@ -426,7 +432,7 @@ {GPIO0_BASE, GPIO_OUT, GPIO_SEL , GPIO_OUT_0}, /* GPIO12 */ \ {GPIO0_BASE, GPIO_OUT, GPIO_SEL , GPIO_OUT_0}, /* GPIO13 */ \ {GPIO0_BASE, GPIO_OUT, GPIO_SEL , GPIO_OUT_1}, /* GPIO14 */ \ -{GPIO0_BASE, GPIO_OUT, GPIO_SEL , GPIO_OUT_0}, /* GPIO15 */ \ +{GPIO0_BASE, GPIO_OUT, GPIO_SEL , GPIO_OUT_1}, /* GPIO15 */ \ {GPIO0_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_0}, /* GPIO16 GMCTxD(4) */ \ {GPIO0_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_0}, /* GPIO17 GMCTxD(5) */ \ {GPIO0_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_0}, /* GPIO18 GMCTxD(6) */ \ @@ -467,12 +473,12 @@ {GPIO1_BASE, GPIO_IN, GPIO_SEL , GPIO_OUT_0}, /* GPIO50 Unselect via TraceSelect Bit */ \ {GPIO1_BASE, GPIO_IN , GPIO_SEL , GPIO_OUT_0}, /* GPIO51 Unselect via TraceSelect Bit */ \ {GPIO1_BASE, GPIO_IN , GPIO_SEL , GPIO_OUT_0}, /* GPIO52 Unselect via TraceSelect Bit */ \ -{GPIO1_BASE, GPIO_OUT, GPIO_SEL , GPIO_OUT_1}, /* GPIO53 Unselect via TraceSelect Bit */ \ +{GPIO1_BASE, GPIO_OUT, GPIO_SEL , GPIO_OUT_0}, /* GPIO53 Unselect via TraceSelect Bit */ \ {GPIO1_BASE, GPIO_OUT, GPIO_SEL , GPIO_OUT_0}, /* GPIO54 Unselect via TraceSelect Bit */ \ {GPIO1_BASE, GPIO_OUT, GPIO_SEL , GPIO_OUT_1}, /* GPIO55 Unselect via TraceSelect Bit */ \ {GPIO1_BASE, GPIO_OUT, GPIO_SEL , GPIO_OUT_0}, /* GPIO56 Unselect via TraceSelect Bit */ \ {GPIO1_BASE, GPIO_OUT, GPIO_SEL , GPIO_OUT_1}, /* GPIO57 Unselect via TraceSelect Bit */ \ -{GPIO1_BASE, GPIO_OUT, GPIO_SEL , GPIO_OUT_1}, /* GPIO58 Unselect via TraceSelect Bit */ \ +{GPIO1_BASE, GPIO_OUT, GPIO_SEL , GPIO_OUT_0}, /* GPIO58 Unselect via TraceSelect Bit */ \ {GPIO1_BASE, GPIO_OUT, GPIO_SEL , GPIO_OUT_0}, /* GPIO59 Unselect via TraceSelect Bit */ \ {GPIO1_BASE, GPIO_OUT, GPIO_SEL , GPIO_OUT_0}, /* GPIO60 Unselect via TraceSelect Bit */ \ {GPIO1_BASE, GPIO_IN , GPIO_SEL , GPIO_OUT_0}, /* GPIO61 Unselect via TraceSelect Bit */ \ diff --git a/include/configs/ml401.h b/include/configs/ml401.h index 7eeae70..b320438 100644 --- a/include/configs/ml401.h +++ b/include/configs/ml401.h @@ -1,7 +1,7 @@ /* - * (C) Copyright 2007 Czech Technical University. + * (C) Copyright 2007 Michal Simek * - * Michal SIMEK <monstr@seznam.cz> + * Michal SIMEK <monstr@monstr.eu> * * See file CREDITS for list of people who contributed to this * project. @@ -32,6 +32,7 @@ #define CONFIG_ML401 1 /* ML401 Board */ /* uart */ +#define CONFIG_XILINX_UARTLITE #define CONFIG_SERIAL_BASE XILINX_UART_BASEADDR #define CONFIG_BAUDRATE XILINX_UART_BAUDRATE #define CFG_BAUDRATE_TABLE { CONFIG_BAUDRATE } @@ -58,6 +59,7 @@ #define CFG_TIMER_0_IRQ XILINX_TIMER_IRQ #define FREQUENCE XILINX_CLOCK_FREQ #define CFG_TIMER_0_PRELOAD ( FREQUENCE/1000 ) +#define CONFIG_XILINX_CLOCK_FREQ XILINX_CLOCK_FREQ /* FSL */ #define CFG_FSL_2 @@ -86,7 +88,7 @@ * 0x11FB_F000 CFG_MONITOR_BASE * MONITOR_CODE 256kB Env * 0x13FF_F000 CFG_GBL_DATA_OFFSET - * GLOBAL_DATA 4kB bd, gd + * GLOBAL_DATA 4kB bd, gd * 0x1400_0000 CFG_SDRAM_BASE + CFG_SDRAM_SIZE */ @@ -99,7 +101,7 @@ /* global pointer */ #define CFG_GBL_DATA_SIZE 0x1000 /* size of global data */ /* start of global data */ -#define CFG_GBL_DATA_OFFSET (CFG_SDRAM_BASE + CFG_SDRAM_SIZE - CFG_GBL_DATA_SIZE) +#define CFG_GBL_DATA_OFFSET (CFG_SDRAM_BASE + CFG_SDRAM_SIZE - CFG_GBL_DATA_SIZE) /* monitor code */ #define SIZE 0x40000 @@ -145,6 +147,16 @@ #define CFG_FLASH_PROTECTION /* hardware flash protection */ #endif /* !FLASH */ +/* system ace */ +#ifdef XILINX_SYSACE_BASEADDR + #define CONFIG_SYSTEMACE + /* #define DEBUG_SYSTEMACE */ + #define SYSTEMACE_CONFIG_FPGA + #define CFG_SYSTEMACE_BASE XILINX_SYSACE_BASEADDR + #define CFG_SYSTEMACE_WIDTH XILINX_SYSACE_MEM_WIDTH + #define CONFIG_DOS_PARTITION +#endif + /* * BOOTP options */ @@ -153,28 +165,21 @@ #define CONFIG_BOOTP_GATEWAY #define CONFIG_BOOTP_HOSTNAME - /* * Command line configuration. */ #include <config_cmd_default.h> #define CONFIG_CMD_ASKENV -#define CONFIG_CMD_AUTOSCRIPT -#define CONFIG_CMD_BDI #define CONFIG_CMD_CACHE -#define CONFIG_CMD_EXT2 -#define CONFIG_CMD_FAT -#define CONFIG_CMD_IMI #define CONFIG_CMD_IRQ -#define CONFIG_CMD_LOADB -#define CONFIG_CMD_LOADS -#define CONFIG_CMD_MEMORY -#define CONFIG_CMD_MISC #define CONFIG_CMD_MFSL -#define CONFIG_CMD_NET #define CONFIG_CMD_PING -#define CONFIG_CMD_RUN + +#if defined(CONFIG_SYSTEMACE) + #define CONFIG_CMD_EXT2 + #define CONFIG_CMD_FAT +#endif #if defined(FLASH) #define CONFIG_CMD_ECHO @@ -186,6 +191,8 @@ #define CONFIG_CMD_ENV #define CONFIG_CMD_SAVES #endif +#else + #undef CONFIG_CMD_FLASH #endif #if defined(CONFIG_CMD_JFFS2) @@ -210,24 +217,16 @@ #define CONFIG_BOOTDELAY 30 #define CONFIG_BOOTARGS "root=romfs" #define CONFIG_HOSTNAME "ml401" -#define CONFIG_BOOTCOMMAND "base 0;tftp 11000000 image.img;bootm" +#define CONFIG_BOOTCOMMAND "base 0;tftp 11000000 image.img;bootm" #define CONFIG_IPADDR 192.168.0.3 -#define CONFIG_SERVERIP 192.168.0.5 -#define CONFIG_GATEWAYIP 192.168.0.1 +#define CONFIG_SERVERIP 192.168.0.5 +#define CONFIG_GATEWAYIP 192.168.0.1 #define CONFIG_ETHADDR 00:E0:0C:00:00:FD /* architecture dependent code */ #define CFG_USR_EXCEP /* user exception */ #define CFG_HZ 1000 -/* system ace */ -#define CONFIG_SYSTEMACE -/* #define DEBUG_SYSTEMACE */ -#define SYSTEMACE_CONFIG_FPGA -#define CFG_SYSTEMACE_BASE XILINX_SYSACE_BASEADDR -#define CFG_SYSTEMACE_WIDTH XILINX_SYSACE_MEM_WIDTH -#define CONFIG_DOS_PARTITION - #define CONFIG_PREBOOT "echo U-BOOT for ML401;setenv preboot;echo" #define CONFIG_EXTRA_ENV_SETTINGS "unlock=yes\0" /* hardware flash protection */\ diff --git a/include/configs/motionpro.h b/include/configs/motionpro.h index 9a21632..1503598 100644 --- a/include/configs/motionpro.h +++ b/include/configs/motionpro.h @@ -163,9 +163,9 @@ /* - * Clock configuration: SYS_XTALIN = 25MHz + * Clock configuration: SYS_XTALIN = 33MHz */ -#define CFG_MPC5XXX_CLKIN 25000000 +#define CFG_MPC5XXX_CLKIN 33000000 /* @@ -211,7 +211,7 @@ #endif #define CFG_MONITOR_LEN (256 << 10) /* 256 kB for Monitor */ -#define CFG_MALLOC_LEN (128 << 10) /* 128 kB for malloc() */ +#define CFG_MALLOC_LEN (1024 << 10) /* 1 MiB for malloc() */ #define CFG_BOOTMAPSZ (8 << 20) /* initial mem map for Linux */ @@ -221,7 +221,7 @@ /* Boot Chipselect */ #define CFG_BOOTCS_START CFG_FLASH_BASE #define CFG_BOOTCS_SIZE CFG_FLASH_SIZE -#define CFG_BOOTCS_CFG 0x03035D00 +#define CFG_BOOTCS_CFG 0x00045D00 /* Flash memory addressing */ #define CFG_CS0_START CFG_FLASH_BASE @@ -251,11 +251,11 @@ /* * SDRAM configuration */ -/* 2 x MT48LC16M16A2BG-75 IT:D, CASL 2, 32 bit data bus */ -#define SDRAM_CONFIG1 0x52222600 -#define SDRAM_CONFIG2 0x88b70000 -#define SDRAM_CONTROL 0x50570000 -#define SDRAM_MODE 0x008d0000 +/* 2 x MT48LC16M16A2BG-75 IT:D, CASL 3, 32 bit data bus */ +#define SDRAM_CONFIG1 0x62322900 +#define SDRAM_CONFIG2 0x88c70000 +#define SDRAM_CONTROL 0x504f0000 +#define SDRAM_MODE 0x00cd0000 /* @@ -267,7 +267,7 @@ #define CFG_FLASH_SIZE 0x01000000 #define CFG_MAX_FLASH_BANKS 1 /* max num of memory banks */ #define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE } -#define CFG_MAX_FLASH_SECT 256 /* max num of sects on one chip */ +#define CFG_MAX_FLASH_SECT 128 /* max num of sects on one chip */ #define CONFIG_FLASH_16BIT /* Flash is 16-bit */ /* @@ -277,8 +277,8 @@ #define MTDIDS_DEFAULT "nor0=motionpro-0" #define MTDPARTS_DEFAULT "mtdparts=motionpro-0:" \ "13m(fs),2m(kernel),256k(uboot)," \ - "64k(env),64k(redund_env),64k(dtb)," \ - "-(user_data)" + "128k(env),128k(redund_env)," \ + "128k(dtb),-(user_data)" /* * IDE/ATA configuration @@ -356,7 +356,7 @@ extern void __led_set(led_id_t id, int state); /* This has to be a multiple of the Flash sector size */ #define CFG_ENV_ADDR (CFG_MONITOR_BASE + CFG_MONITOR_LEN) #define CFG_ENV_SIZE 0x1000 -#define CFG_ENV_SECT_SIZE 0x10000 +#define CFG_ENV_SECT_SIZE 0x20000 /* Configuration of redundant environment */ #define CFG_ENV_ADDR_REDUND (CFG_ENV_ADDR + CFG_ENV_SECT_SIZE) @@ -394,7 +394,8 @@ extern void __led_set(led_id_t id, int state); #define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */ #define CFG_MEMTEST_START 0x00100000 /* memtest works on */ -#define CFG_MEMTEST_END 0x03f00000 /* 1 ... 64 MiB in DRAM */ +#define CFG_MEMTEST_END 0x03e00000 /* 1 ... 62 MiB in DRAM */ +#define CFG_ALT_MEMTEST #define CFG_LOAD_ADDR 0x200000 /* default kernel load addr */ diff --git a/include/configs/pxa255_idp.h b/include/configs/pxa255_idp.h index 0e884fc..4a9cadb 100644 --- a/include/configs/pxa255_idp.h +++ b/include/configs/pxa255_idp.h @@ -38,10 +38,11 @@ #include <asm/arch/pxa-regs.h> /* - * If we are developing, we might want to start armboot from ram + * If we are developing, we might want to start U-Boot from RAM * so we MUST NOT initialize critical regs like mem-timing ... */ -#define CONFIG_INIT_CRITICAL /* undef for developing */ +#undef CONFIG_SKIP_LOWLEVEL_INIT /* define for developing */ +#undef CONFIG_SKIP_RELOCATE_UBOOT /* define for developing */ /* * define the following to enable debug blinks. A debug blink function @@ -62,6 +63,7 @@ #endif #define CONFIG_MMC 1 +#define CONFIG_DOS_PARTITION 1 #define BOARD_LATE_INIT 1 #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ @@ -121,7 +123,6 @@ #define CONFIG_CMD_FAT #define CONFIG_CMD_DHCP - #define CONFIG_BOOTDELAY 3 #define CONFIG_BOOTCOMMAND "bootm 40000" #define CONFIG_BOOTARGS "root=/dev/mtdblock2 rootfstype=cramfs console=ttyS0,115200" @@ -332,7 +333,7 @@ #define CFG_FLASH_CFI_DRIVER 1 #define CFG_MONITOR_BASE 0 -#define CFG_MONITOR_LEN 0x40000 +#define CFG_MONITOR_LEN PHYS_FLASH_SECT_SIZE #define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */ #define CFG_MAX_FLASH_SECT 128 /* max number of sectors on one chip */ @@ -347,7 +348,7 @@ #define CFG_ENV_IS_IN_FLASH 1 /* Addr of Environment Sector */ #define CFG_ENV_ADDR (PHYS_FLASH_1 + PHYS_FLASH_SIZE - 0x40000) -#define CFG_ENV_SIZE 0x40000 /* Total Size of Environment Sector */ -#define CFG_ENV_SECT_SIZE 0x40000 +#define CFG_ENV_SIZE PHYS_FLASH_SECT_SIZE /* Total Size of Environment Sector */ +#define CFG_ENV_SECT_SIZE (PHYS_FLASH_SECT_SIZE / 16) #endif /* __CONFIG_H */ diff --git a/include/configs/rsdproto.h b/include/configs/rsdproto.h index 814082c..40a05fa 100644 --- a/include/configs/rsdproto.h +++ b/include/configs/rsdproto.h @@ -92,8 +92,8 @@ /* enable I2C */ #define CONFIG_HARD_I2C 1 /* I2C with hardware support */ -#define CFG_I2C_SPEED 400000 /* I2C speed and slave address */ -#define CFG_I2C_SLAVE 0x7F +#define CFG_I2C_SPEED 50000 /* I2C speed and slave address */ +#define CFG_I2C_SLAVE 0x30 /* system clock rate (CLKIN) - equal to the 60x and local bus speed */ diff --git a/include/configs/sequoia.h b/include/configs/sequoia.h index c2e1386..600f98c 100644 --- a/include/configs/sequoia.h +++ b/include/configs/sequoia.h @@ -450,6 +450,8 @@ #define CFG_EBC_PB2AP 0x24814580 #define CFG_EBC_PB2CR (CFG_BCSR_BASE | 0x38000) +#define CFG_BCSR5_PCI66EN 0x80 + /*----------------------------------------------------------------------- * NAND FLASH *----------------------------------------------------------------------*/ diff --git a/include/configs/stxssa.h b/include/configs/stxssa.h index b41dafa..c6e7953 100644 --- a/include/configs/stxssa.h +++ b/include/configs/stxssa.h @@ -189,20 +189,21 @@ #define CFG_PROMPT_HUSH_PS2 "> " #endif -/* I2C */ +/* + * I2C + */ #define CONFIG_FSL_I2C /* Use FSL common I2C driver */ #define CONFIG_HARD_I2C /* I2C with hardware support*/ #undef CONFIG_SOFT_I2C /* I2C bit-banged */ #define CFG_I2C_SPEED 400000 /* I2C speed and slave address */ #define CFG_I2C_SLAVE 0x7F -#if 0 -#define CFG_I2C_NOPROBES {0x00} /* Don't probe these addrs */ -#else -/* I did the 'if 0' so we could keep the syntax above if ever needed. */ #undef CFG_I2C_NOPROBES -#endif #define CFG_I2C_OFFSET 0x3000 +/* I2C RTC */ +#define CONFIG_RTC_DS1337 /* This is really a DS1339 RTC */ +#define CFG_I2C_RTC_ADDR 0x68 /* at address 0x68 */ + /* I2C EEPROM. AT24C32, we keep our environment in here. */ #define CFG_I2C_EEPROM_ADDR 0x51 /* 1010001x */ @@ -341,8 +342,13 @@ */ #include <config_cmd_default.h> -#define CONFIG_CMD_PING +#define CONFIG_CMD_DATE +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_EEPROM #define CONFIG_CMD_I2C +#define CONFIG_CMD_NFS +#define CONFIG_CMD_PING +#define CONFIG_CMD_SNTP #if defined(CONFIG_PCI) #define CONFIG_CMD_PCI diff --git a/include/configs/suzaku.h b/include/configs/suzaku.h index 08ac9cb..020ed02 100644 --- a/include/configs/suzaku.h +++ b/include/configs/suzaku.h @@ -48,6 +48,7 @@ #define CFG_MALLOC_LEN (256 << 10) /* Reserve 256 kB for malloc */ #define CFG_MALLOC_BASE (CFG_MONITOR_BASE - (1024 * 1024)) +#define CONFIG_XILINX_UARTLITE #define CONFIG_BAUDRATE 115200 #define CFG_BAUDRATE_TABLE { 115200 } @@ -55,21 +56,16 @@ #define MICROBLAZE_SYSREG_BASE_ADDR 0xFFFFA000 #define MICROBLAZE_SYSREG_RECONFIGURE (1 << 0) - -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME - - /* * Command line configuration. */ #include <config_cmd_default.h> +#undef CONFIG_CMD_BDI +#undef CONFIG_CMD_ENV +#undef CONFIG_CMD_MEMORY +#undef CONFIG_CMD_NET +#undef CONFIG_CMD_MISC #define CFG_UART1_BASE (0xFFFF2000) #define CONFIG_SERIAL_BASE CFG_UART1_BASE @@ -108,4 +104,7 @@ #define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE) #define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET +#define XILINX_CLOCK_FREQ 50000000 +#define CONFIG_XILINX_CLOCK_FREQ XILINX_CLOCK_FREQ + #endif /* __CONFIG_H */ diff --git a/include/configs/uc101.h b/include/configs/uc101.h index aed80ec..81df141 100644 --- a/include/configs/uc101.h +++ b/include/configs/uc101.h @@ -297,7 +297,7 @@ /* 8Mbit SRAM @0x80100000 */ #define CFG_CS1_START CFG_SRAM_BASE -#define CFG_CS1_SIZE 0x00100000 +#define CFG_CS1_SIZE 0x00200000 #define CFG_CS1_CFG 0x21D00 /* Display H1, Status Inputs, EPLD @0x80600000 8 Bit */ diff --git a/include/configs/xsengine.h b/include/configs/xsengine.h index 5733933..766617e 100644 --- a/include/configs/xsengine.h +++ b/include/configs/xsengine.h @@ -32,6 +32,7 @@ #define CONFIG_PXA250 1 /* This is an PXA250 CPU */ #define CONFIG_XSENGINE 1 #define CONFIG_MMC 1 +#define CONFIG_DOS_PARTITION 1 #define BOARD_POST_INIT 1 #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ #define CFG_HZ 3686400 /* incrementer freq: 3.6864 MHz */ diff --git a/include/configs/xupv2p.h b/include/configs/xupv2p.h index 35001d7..c9320c2 100644 --- a/include/configs/xupv2p.h +++ b/include/configs/xupv2p.h @@ -1,5 +1,5 @@ /* - * (C) Copyright 2007 Czech Technical University. + * (C) Copyright 2007 Michal Simek * * Michal SIMEK <monstr@monstr.eu> * @@ -31,6 +31,7 @@ #define CONFIG_XUPV2P 1 /* uart */ +#define CONFIG_XILINX_UARTLITE #define CONFIG_SERIAL_BASE XILINX_UART_BASEADDR #define CONFIG_BAUDRATE XILINX_UART_BAUDRATE #define CFG_BAUDRATE_TABLE { CONFIG_BAUDRATE } @@ -48,11 +49,13 @@ * U-BOOT auto-relocate to TEXT_BASE. After RESET command Microblaze * jump to CFG_RESET_ADDRESS where is the original U-BOOT code. */ -#define CFG_RESET_ADDRESS 0x36000000 +/* #define CFG_RESET_ADDRESS 0x36000000 */ /* gpio */ +#ifdef XILINX_GPIO_BASEADDR #define CFG_GPIO_0 1 #define CFG_GPIO_0_ADDR XILINX_GPIO_BASEADDR +#endif /* interrupt controller */ #define CFG_INTC_0 1 @@ -65,6 +68,7 @@ #define CFG_TIMER_0_IRQ XILINX_TIMER_IRQ #define FREQUENCE XILINX_CLOCK_FREQ #define CFG_TIMER_0_PRELOAD ( FREQUENCE/1000 ) +#define CONFIG_XILINX_CLOCK_FREQ XILINX_CLOCK_FREQ /* * memory layout - Example @@ -119,7 +123,6 @@ #define CFG_ENV_SIZE 0x1000 #define CFG_ENV_ADDR (CFG_MONITOR_BASE - CFG_ENV_SIZE) - /* * BOOTP options */ @@ -128,29 +131,23 @@ #define CONFIG_BOOTP_GATEWAY #define CONFIG_BOOTP_HOSTNAME - /* * Command line configuration. */ #include <config_cmd_default.h> -#define CONFIG_CMD_MEMORY -#define CONFIG_CMD_IRQ -#define CONFIG_CMD_BDI -#define CONFIG_CMD_NET -#define CONFIG_CMD_IMI -#define CONFIG_CMD_ECHO -#define CONFIG_CMD_CACHE -#define CONFIG_CMD_RUN -#define CONFIG_CMD_AUTOSCRIPT +#undef CONFIG_CMD_FLASH +#undef CONFIG_CMD_IMLS + #define CONFIG_CMD_ASKENV -#define CONFIG_CMD_LOADS -#define CONFIG_CMD_LOADB -#define CONFIG_CMD_MISC -#define CONFIG_CMD_FAT -#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_CACHE +#define CONFIG_CMD_IRQ #define CONFIG_CMD_PING +#ifdef XILINX_SYSACE_BASEADDR +#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_FAT +#endif /* Miscellaneous configurable options */ #define CFG_PROMPT "U-Boot-mONStR> " @@ -162,7 +159,7 @@ #define CONFIG_BOOTDELAY 30 #define CONFIG_BOOTARGS "root=romfs" -#define CONFIG_HOSTNAME "ml401" +#define CONFIG_HOSTNAME "xupv2p" #define CONFIG_BOOTCOMMAND "base 0;tftp 11000000 image.img;bootm" #define CONFIG_IPADDR 192.168.0.3 #define CONFIG_SERVERIP 192.168.0.5 @@ -178,11 +175,13 @@ "echo" /* system ace */ +#ifdef XILINX_SYSACE_BASEADDR #define CONFIG_SYSTEMACE /* #define DEBUG_SYSTEMACE */ #define SYSTEMACE_CONFIG_FPGA #define CFG_SYSTEMACE_BASE XILINX_SYSACE_BASEADDR #define CFG_SYSTEMACE_WIDTH XILINX_SYSACE_MEM_WIDTH #define CONFIG_DOS_PARTITION +#endif #endif /* __CONFIG_H */ diff --git a/include/configs/yosemite.h b/include/configs/yosemite.h index 6a5b7f1..35bce4a 100644 --- a/include/configs/yosemite.h +++ b/include/configs/yosemite.h @@ -359,6 +359,8 @@ #define CFG_EBC_PB2AP 0x04814500 #define CFG_EBC_PB2CR (CFG_CPLD | 0x18000) +#define CFG_BCSR5_PCI66EN 0x80 + /*----------------------------------------------------------------------- * Cache Configuration */ diff --git a/include/led.h b/include/led.h deleted file mode 100644 index 57c2b4a..0000000 --- a/include/led.h +++ /dev/null @@ -1,45 +0,0 @@ -/* - * (C) Copyright 2006 - * Atmel Nordic AB <www.atmel.com> - * Ulf Samuelsson <ulf@atmel.com> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef __LED_H -#define __LED_H - -#ifndef __ASSEMBLY__ -extern void LED_init (void); -extern void red_LED_on(void); -extern void red_LED_off(void); -extern void green_LED_on(void); -extern void green_LED_off(void); -extern void yellow_LED_on(void); -extern void yellow_LED_off(void); -#else - .extern LED_init - .extern red_LED_on - .extern red_LED_off - .extern yellow_LED_on - .extern yellow_LED_off - .extern green_LED_on - .extern green_LED_off -#endif -#endif diff --git a/include/linux/mtd/bbm.h b/include/linux/mtd/bbm.h new file mode 100644 index 0000000..f194cf1 --- /dev/null +++ b/include/linux/mtd/bbm.h @@ -0,0 +1,127 @@ +/* + * linux/include/linux/mtd/bbm.h + * + * NAND family Bad Block Management (BBM) header file + * - Bad Block Table (BBT) implementation + * + * Copyright (c) 2005-2007 Samsung Electronics + * Kyungmin Park <kyungmin.park@samsung.com> + * + * Copyright (c) 2000-2005 + * Thomas Gleixner <tglx@linuxtronix.de> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#ifndef __LINUX_MTD_BBM_H +#define __LINUX_MTD_BBM_H + +/* The maximum number of NAND chips in an array */ +#ifndef NAND_MAX_CHIPS +#define NAND_MAX_CHIPS 8 +#endif + +/** + * struct nand_bbt_descr - bad block table descriptor + * @param options options for this descriptor + * @param pages the page(s) where we find the bbt, used with + * option BBT_ABSPAGE when bbt is searched, + * then we store the found bbts pages here. + * Its an array and supports up to 8 chips now + * @param offs offset of the pattern in the oob area of the page + * @param veroffs offset of the bbt version counter in the oob are of the page + * @param version version read from the bbt page during scan + * @param len length of the pattern, if 0 no pattern check is performed + * @param maxblocks maximum number of blocks to search for a bbt. This number of + * blocks is reserved at the end of the device + * where the tables are written. + * @param reserved_block_code if non-0, this pattern denotes a reserved + * (rather than bad) block in the stored bbt + * @param pattern pattern to identify bad block table or factory marked + * good / bad blocks, can be NULL, if len = 0 + * + * Descriptor for the bad block table marker and the descriptor for the + * pattern which identifies good and bad blocks. The assumption is made + * that the pattern and the version count are always located in the oob area + * of the first block. + */ +struct nand_bbt_descr { + int options; + int pages[NAND_MAX_CHIPS]; + int offs; + int veroffs; + uint8_t version[NAND_MAX_CHIPS]; + int len; + int maxblocks; + int reserved_block_code; + uint8_t *pattern; +}; + +/* Options for the bad block table descriptors */ + +/* The number of bits used per block in the bbt on the device */ +#define NAND_BBT_NRBITS_MSK 0x0000000F +#define NAND_BBT_1BIT 0x00000001 +#define NAND_BBT_2BIT 0x00000002 +#define NAND_BBT_4BIT 0x00000004 +#define NAND_BBT_8BIT 0x00000008 +/* The bad block table is in the last good block of the device */ +#define NAND_BBT_LASTBLOCK 0x00000010 +/* The bbt is at the given page, else we must scan for the bbt */ +#define NAND_BBT_ABSPAGE 0x00000020 +/* The bbt is at the given page, else we must scan for the bbt */ +#define NAND_BBT_SEARCH 0x00000040 +/* bbt is stored per chip on multichip devices */ +#define NAND_BBT_PERCHIP 0x00000080 +/* bbt has a version counter at offset veroffs */ +#define NAND_BBT_VERSION 0x00000100 +/* Create a bbt if none axists */ +#define NAND_BBT_CREATE 0x00000200 +/* Search good / bad pattern through all pages of a block */ +#define NAND_BBT_SCANALLPAGES 0x00000400 +/* Scan block empty during good / bad block scan */ +#define NAND_BBT_SCANEMPTY 0x00000800 +/* Write bbt if neccecary */ +#define NAND_BBT_WRITE 0x00001000 +/* Read and write back block contents when writing bbt */ +#define NAND_BBT_SAVECONTENT 0x00002000 +/* Search good / bad pattern on the first and the second page */ +#define NAND_BBT_SCAN2NDPAGE 0x00004000 + +/* The maximum number of blocks to scan for a bbt */ +#define NAND_BBT_SCAN_MAXBLOCKS 4 + +/* + * Constants for oob configuration + */ +#define ONENAND_BADBLOCK_POS 0 + +/** + * struct bbt_info - [GENERIC] Bad Block Table data structure + * @param bbt_erase_shift [INTERN] number of address bits in a bbt entry + * @param badblockpos [INTERN] position of the bad block marker in the oob area + * @param bbt [INTERN] bad block table pointer + * @param badblock_pattern [REPLACEABLE] bad block scan pattern used for initial bad block scan + * @param priv [OPTIONAL] pointer to private bbm date + */ +struct bbm_info { + int bbt_erase_shift; + int badblockpos; + int options; + + uint8_t *bbt; + + int (*isbad_bbt) (struct mtd_info * mtd, loff_t ofs, int allowbbt); + + /* TODO Add more NAND specific fileds */ + struct nand_bbt_descr *badblock_pattern; + + void *priv; +}; + +/* OneNAND BBT interface */ +extern int onenand_scan_bbt (struct mtd_info *mtd, struct nand_bbt_descr *bd); +extern int onenand_default_bbt (struct mtd_info *mtd); + +#endif /* __LINUX_MTD_BBM_H */ diff --git a/include/linux/mtd/onenand.h b/include/linux/mtd/onenand.h new file mode 100644 index 0000000..4b0c2df --- /dev/null +++ b/include/linux/mtd/onenand.h @@ -0,0 +1,143 @@ +/* + * linux/include/linux/mtd/onenand.h + * + * Copyright (C) 2005-2007 Samsung Electronics + * Kyungmin Park <kyungmin.park@samsung.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __LINUX_MTD_ONENAND_H +#define __LINUX_MTD_ONENAND_H + +#include <linux/mtd/onenand_regs.h> + +/* Note: The header order is impoertant */ +#include <onenand_uboot.h> + +#include <linux/mtd/bbm.h> + +#define MAX_BUFFERRAM 2 +#define MAX_ONENAND_PAGESIZE (2048 + 64) + +/* Scan and identify a OneNAND device */ +extern int onenand_scan (struct mtd_info *mtd, int max_chips); +/* Free resources held by the OneNAND device */ +extern void onenand_release (struct mtd_info *mtd); + +/** + * onenand_state_t - chip states + * Enumeration for OneNAND flash chip state + */ +typedef enum { + FL_READY, + FL_READING, + FL_WRITING, + FL_ERASING, + FL_SYNCING, + FL_UNLOCKING, + FL_LOCKING, +} onenand_state_t; + +/** + * struct onenand_bufferram - OneNAND BufferRAM Data + * @param block block address in BufferRAM + * @param page page address in BufferRAM + * @param valid valid flag + */ +struct onenand_bufferram { + int block; + int page; + int valid; +}; + +/** + * struct onenand_chip - OneNAND Private Flash Chip Data + * @param base [BOARDSPECIFIC] address to access OneNAND + * @param chipsize [INTERN] the size of one chip for multichip arrays + * @param device_id [INTERN] device ID + * @param verstion_id [INTERN] version ID + * @param options [BOARDSPECIFIC] various chip options. They can partly be set to inform onenand_scan about + * @param erase_shift [INTERN] number of address bits in a block + * @param page_shift [INTERN] number of address bits in a page + * @param ppb_shift [INTERN] number of address bits in a pages per block + * @param page_mask [INTERN] a page per block mask + * @param bufferam_index [INTERN] BufferRAM index + * @param bufferam [INTERN] BufferRAM info + * @param readw [REPLACEABLE] hardware specific function for read short + * @param writew [REPLACEABLE] hardware specific function for write short + * @param command [REPLACEABLE] hardware specific function for writing commands to the chip + * @param wait [REPLACEABLE] hardware specific function for wait on ready + * @param read_bufferram [REPLACEABLE] hardware specific function for BufferRAM Area + * @param write_bufferram [REPLACEABLE] hardware specific function for BufferRAM Area + * @param chip_lock [INTERN] spinlock used to protect access to this structure and the chip + * @param wq [INTERN] wait queue to sleep on if a OneNAND operation is in progress + * @param state [INTERN] the current state of the OneNAND device + * @param autooob [REPLACEABLE] the default (auto)placement scheme + * @param priv [OPTIONAL] pointer to private chip date + */ +struct onenand_chip { + void __iomem *base; + unsigned int chipsize; + unsigned int device_id; + unsigned int options; + + unsigned int erase_shift; + unsigned int page_shift; + unsigned int ppb_shift; /* Pages per block shift */ + unsigned int page_mask; + + unsigned int bufferram_index; + struct onenand_bufferram bufferram[MAX_BUFFERRAM]; + + int (*command) (struct mtd_info * mtd, int cmd, loff_t address, + size_t len); + int (*wait) (struct mtd_info * mtd, int state); + int (*read_bufferram) (struct mtd_info * mtd, int area, + unsigned char *buffer, int offset, size_t count); + int (*write_bufferram) (struct mtd_info * mtd, int area, + const unsigned char *buffer, int offset, + size_t count); + unsigned short (*read_word) (void __iomem * addr); + void (*write_word) (unsigned short value, void __iomem * addr); + void (*mmcontrol) (struct mtd_info * mtd, int sync_read); + + spinlock_t chip_lock; + wait_queue_head_t wq; + onenand_state_t state; + + struct nand_oobinfo *autooob; + + void *bbm; + + void *priv; +}; + +#define ONENAND_CURRENT_BUFFERRAM(this) (this->bufferram_index) +#define ONENAND_NEXT_BUFFERRAM(this) (this->bufferram_index ^ 1) +#define ONENAND_SET_NEXT_BUFFERRAM(this) (this->bufferram_index ^= 1) + +/* + * Options bits + */ +#define ONENAND_CONT_LOCK (0x0001) + +/* + * OneNAND Flash Manufacturer ID Codes + */ +#define ONENAND_MFR_SAMSUNG 0xec +#define ONENAND_MFR_UNKNOWN 0x00 + +/** + * struct nand_manufacturers - NAND Flash Manufacturer ID Structure + * @param name: Manufacturer name + * @param id: manufacturer ID code of device. +*/ +struct onenand_manufacturers { + int id; + char *name; +}; + +#endif /* __LINUX_MTD_ONENAND_H */ diff --git a/include/linux/mtd/onenand_regs.h b/include/linux/mtd/onenand_regs.h new file mode 100644 index 0000000..c8a9f3e --- /dev/null +++ b/include/linux/mtd/onenand_regs.h @@ -0,0 +1,181 @@ +/* + * linux/include/linux/mtd/onenand_regs.h + * + * OneNAND Register header file + * + * Copyright (C) 2005-2007 Samsung Electronics + * Kyungmin Park <kyungmin.park@samsung.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __ONENAND_REG_H +#define __ONENAND_REG_H + +/* Memory Address Map Translation (Word order) */ +#define ONENAND_MEMORY_MAP(x) ((x) << 1) + +/* + * External BufferRAM area + */ +#define ONENAND_BOOTRAM ONENAND_MEMORY_MAP(0x0000) +#define ONENAND_DATARAM ONENAND_MEMORY_MAP(0x0200) +#define ONENAND_SPARERAM ONENAND_MEMORY_MAP(0x8010) + +/* + * OneNAND Registers + */ +#define ONENAND_REG_MANUFACTURER_ID ONENAND_MEMORY_MAP(0xF000) +#define ONENAND_REG_DEVICE_ID ONENAND_MEMORY_MAP(0xF001) +#define ONENAND_REG_VERSION_ID ONENAND_MEMORY_MAP(0xF002) +#define ONENAND_REG_DATA_BUFFER_SIZE ONENAND_MEMORY_MAP(0xF003) +#define ONENAND_REG_BOOT_BUFFER_SIZE ONENAND_MEMORY_MAP(0xF004) +#define ONENAND_REG_NUM_BUFFERS ONENAND_MEMORY_MAP(0xF005) +#define ONENAND_REG_TECHNOLOGY ONENAND_MEMORY_MAP(0xF006) + +#define ONENAND_REG_START_ADDRESS1 ONENAND_MEMORY_MAP(0xF100) +#define ONENAND_REG_START_ADDRESS2 ONENAND_MEMORY_MAP(0xF101) +#define ONENAND_REG_START_ADDRESS3 ONENAND_MEMORY_MAP(0xF102) +#define ONENAND_REG_START_ADDRESS4 ONENAND_MEMORY_MAP(0xF103) +#define ONENAND_REG_START_ADDRESS5 ONENAND_MEMORY_MAP(0xF104) +#define ONENAND_REG_START_ADDRESS6 ONENAND_MEMORY_MAP(0xF105) +#define ONENAND_REG_START_ADDRESS7 ONENAND_MEMORY_MAP(0xF106) +#define ONENAND_REG_START_ADDRESS8 ONENAND_MEMORY_MAP(0xF107) + +#define ONENAND_REG_START_BUFFER ONENAND_MEMORY_MAP(0xF200) +#define ONENAND_REG_COMMAND ONENAND_MEMORY_MAP(0xF220) +#define ONENAND_REG_SYS_CFG1 ONENAND_MEMORY_MAP(0xF221) +#define ONENAND_REG_SYS_CFG2 ONENAND_MEMORY_MAP(0xF222) +#define ONENAND_REG_CTRL_STATUS ONENAND_MEMORY_MAP(0xF240) +#define ONENAND_REG_INTERRUPT ONENAND_MEMORY_MAP(0xF241) +#define ONENAND_REG_START_BLOCK_ADDRESS ONENAND_MEMORY_MAP(0xF24C) +#define ONENAND_REG_END_BLOCK_ADDRESS ONENAND_MEMORY_MAP(0xF24D) +#define ONENAND_REG_WP_STATUS ONENAND_MEMORY_MAP(0xF24E) + +#define ONENAND_REG_ECC_STATUS ONENAND_MEMORY_MAP(0xFF00) +#define ONENAND_REG_ECC_M0 ONENAND_MEMORY_MAP(0xFF01) +#define ONENAND_REG_ECC_S0 ONENAND_MEMORY_MAP(0xFF02) +#define ONENAND_REG_ECC_M1 ONENAND_MEMORY_MAP(0xFF03) +#define ONENAND_REG_ECC_S1 ONENAND_MEMORY_MAP(0xFF04) +#define ONENAND_REG_ECC_M2 ONENAND_MEMORY_MAP(0xFF05) +#define ONENAND_REG_ECC_S2 ONENAND_MEMORY_MAP(0xFF06) +#define ONENAND_REG_ECC_M3 ONENAND_MEMORY_MAP(0xFF07) +#define ONENAND_REG_ECC_S3 ONENAND_MEMORY_MAP(0xFF08) + +/* + * Device ID Register F001h (R) + */ +#define ONENAND_DEVICE_DENSITY_SHIFT (4) +#define ONENAND_DEVICE_IS_DDP (1 << 3) +#define ONENAND_DEVICE_IS_DEMUX (1 << 2) +#define ONENAND_DEVICE_VCC_MASK (0x3) + +#define ONENAND_DEVICE_DENSITY_512Mb (0x002) + +/* + * Version ID Register F002h (R) + */ +#define ONENAND_VERSION_PROCESS_SHIFT (8) + +/* + * Start Address 1 F100h (R/W) + */ +#define ONENAND_DDP_SHIFT (15) + +/* + * Start Address 8 F107h (R/W) + */ +#define ONENAND_FPA_MASK (0x3f) +#define ONENAND_FPA_SHIFT (2) +#define ONENAND_FSA_MASK (0x03) + +/* + * Start Buffer Register F200h (R/W) + */ +#define ONENAND_BSA_MASK (0x03) +#define ONENAND_BSA_SHIFT (8) +#define ONENAND_BSA_BOOTRAM (0 << 2) +#define ONENAND_BSA_DATARAM0 (2 << 2) +#define ONENAND_BSA_DATARAM1 (3 << 2) +#define ONENAND_BSC_MASK (0x03) + +/* + * Command Register F220h (R/W) + */ +#define ONENAND_CMD_READ (0x00) +#define ONENAND_CMD_READOOB (0x13) +#define ONENAND_CMD_PROG (0x80) +#define ONENAND_CMD_PROGOOB (0x1A) +#define ONENAND_CMD_UNLOCK (0x23) +#define ONENAND_CMD_LOCK (0x2A) +#define ONENAND_CMD_LOCK_TIGHT (0x2C) +#define ONENAND_CMD_ERASE (0x94) +#define ONENAND_CMD_RESET (0xF0) +#define ONENAND_CMD_READID (0x90) + +/* NOTE: Those are not *REAL* commands */ +#define ONENAND_CMD_BUFFERRAM (0x1978) + +/* + * System Configuration 1 Register F221h (R, R/W) + */ +#define ONENAND_SYS_CFG1_SYNC_READ (1 << 15) +#define ONENAND_SYS_CFG1_BRL_7 (7 << 12) +#define ONENAND_SYS_CFG1_BRL_6 (6 << 12) +#define ONENAND_SYS_CFG1_BRL_5 (5 << 12) +#define ONENAND_SYS_CFG1_BRL_4 (4 << 12) +#define ONENAND_SYS_CFG1_BRL_3 (3 << 12) +#define ONENAND_SYS_CFG1_BRL_10 (2 << 12) +#define ONENAND_SYS_CFG1_BRL_9 (1 << 12) +#define ONENAND_SYS_CFG1_BRL_8 (0 << 12) +#define ONENAND_SYS_CFG1_BRL_SHIFT (12) +#define ONENAND_SYS_CFG1_BL_32 (4 << 9) +#define ONENAND_SYS_CFG1_BL_16 (3 << 9) +#define ONENAND_SYS_CFG1_BL_8 (2 << 9) +#define ONENAND_SYS_CFG1_BL_4 (1 << 9) +#define ONENAND_SYS_CFG1_BL_CONT (0 << 9) +#define ONENAND_SYS_CFG1_BL_SHIFT (9) +#define ONENAND_SYS_CFG1_NO_ECC (1 << 8) +#define ONENAND_SYS_CFG1_RDY (1 << 7) +#define ONENAND_SYS_CFG1_INT (1 << 6) +#define ONENAND_SYS_CFG1_IOBE (1 << 5) +#define ONENAND_SYS_CFG1_RDY_CONF (1 << 4) + +/* + * Controller Status Register F240h (R) + */ +#define ONENAND_CTRL_ONGO (1 << 15) +#define ONENAND_CTRL_LOCK (1 << 14) +#define ONENAND_CTRL_LOAD (1 << 13) +#define ONENAND_CTRL_PROGRAM (1 << 12) +#define ONENAND_CTRL_ERASE (1 << 11) +#define ONENAND_CTRL_ERROR (1 << 10) +#define ONENAND_CTRL_RSTB (1 << 7) + +/* + * Interrupt Status Register F241h (R) + */ +#define ONENAND_INT_MASTER (1 << 15) +#define ONENAND_INT_READ (1 << 7) +#define ONENAND_INT_WRITE (1 << 6) +#define ONENAND_INT_ERASE (1 << 5) +#define ONENAND_INT_RESET (1 << 4) +#define ONENAND_INT_CLEAR (0 << 0) + +/* + * NAND Flash Write Protection Status Register F24Eh (R) + */ +#define ONENAND_WP_US (1 << 2) +#define ONENAND_WP_LS (1 << 1) +#define ONENAND_WP_LTS (1 << 0) + +/* + * ECC Status Reigser FF00h (R) + */ +#define ONENAND_ECC_1BIT (1 << 0) +#define ONENAND_ECC_2BIT (1 << 1) +#define ONENAND_ECC_2BIT_ALL (0xAAAA) + +#endif /* __ONENAND_REG_H */ diff --git a/include/miiphy.h b/include/miiphy.h index 71716b0..5518a0a 100644 --- a/include/miiphy.h +++ b/include/miiphy.h @@ -26,56 +26,49 @@ | | Author: Mark Wisner | -| Change Activity- -| -| Date Description of Change BY -| --------- --------------------- --- -| 04-May-99 Created MKW -| 07-Jul-99 Added full duplex support MKW -| 08-Sep-01 Tweaks gvb -| +----------------------------------------------------------------------------*/ #ifndef _miiphy_h_ #define _miiphy_h_ #include <net.h> -int miiphy_read(char *devname, unsigned char addr, unsigned char reg, - unsigned short *value); -int miiphy_write(char *devname, unsigned char addr, unsigned char reg, - unsigned short value); -int miiphy_info(char *devname, unsigned char addr, unsigned int *oui, - unsigned char *model, unsigned char *rev); -int miiphy_reset(char *devname, unsigned char addr); -int miiphy_speed(char *devname, unsigned char addr); -int miiphy_duplex(char *devname, unsigned char addr); +int miiphy_read (char *devname, unsigned char addr, unsigned char reg, + unsigned short *value); +int miiphy_write (char *devname, unsigned char addr, unsigned char reg, + unsigned short value); +int miiphy_info (char *devname, unsigned char addr, unsigned int *oui, + unsigned char *model, unsigned char *rev); +int miiphy_reset (char *devname, unsigned char addr); +int miiphy_speed (char *devname, unsigned char addr); +int miiphy_duplex (char *devname, unsigned char addr); +int miiphy_is_1000base_x (char *devname, unsigned char addr); #ifdef CFG_FAULT_ECHO_LINK_DOWN -int miiphy_link(char *devname, unsigned char addr); +int miiphy_link (char *devname, unsigned char addr); #endif -void miiphy_init(void); +void miiphy_init (void); -void miiphy_register(char *devname, - int (* read)(char *devname, unsigned char addr, - unsigned char reg, unsigned short *value), - int (* write)(char *devname, unsigned char addr, - unsigned char reg, unsigned short value)); +void miiphy_register (char *devname, + int (*read) (char *devname, unsigned char addr, + unsigned char reg, unsigned short *value), + int (*write) (char *devname, unsigned char addr, + unsigned char reg, unsigned short value)); -int miiphy_set_current_dev(char *devname); -char *miiphy_get_current_dev(void); +int miiphy_set_current_dev (char *devname); +char *miiphy_get_current_dev (void); -void miiphy_listdev(void); +void miiphy_listdev (void); #define BB_MII_DEVNAME "bbmii" int bb_miiphy_read (char *devname, unsigned char addr, - unsigned char reg, unsigned short *value); + unsigned char reg, unsigned short *value); int bb_miiphy_write (char *devname, unsigned char addr, - unsigned char reg, unsigned short value); + unsigned char reg, unsigned short value); /* phy seed setup */ #define AUTO 99 -#define _1000BASET 1000 +#define _1000BASET 1000 #define _100BASET 100 #define _10BASET 10 #define HALF 22 @@ -90,9 +83,10 @@ int bb_miiphy_write (char *devname, unsigned char addr, #define PHY_ANLPAR 0x05 #define PHY_ANER 0x06 #define PHY_ANNPTR 0x07 -#define PHY_ANLPNP 0x08 -#define PHY_1000BTCR 0x09 -#define PHY_1000BTSR 0x0A +#define PHY_ANLPNP 0x08 +#define PHY_1000BTCR 0x09 +#define PHY_1000BTSR 0x0A +#define PHY_EXSR 0x0F #define PHY_PHYSTS 0x10 #define PHY_MIPSCR 0x11 #define PHY_MIPGSR 0x12 @@ -115,10 +109,10 @@ int bb_miiphy_write (char *devname, unsigned char addr, #define PHY_BMCR_DPLX 0x0100 #define PHY_BMCR_COL_TST 0x0080 -#define PHY_BMCR_SPEED_MASK 0x2040 -#define PHY_BMCR_1000_MBPS 0x0040 -#define PHY_BMCR_100_MBPS 0x2000 -#define PHY_BMCR_10_MBPS 0x0000 +#define PHY_BMCR_SPEED_MASK 0x2040 +#define PHY_BMCR_1000_MBPS 0x0040 +#define PHY_BMCR_100_MBPS 0x2000 +#define PHY_BMCR_10_MBPS 0x0000 /* phy BMSR */ #define PHY_BMSR_100T4 0x8000 @@ -126,6 +120,7 @@ int bb_miiphy_write (char *devname, unsigned char addr, #define PHY_BMSR_100TXH 0x2000 #define PHY_BMSR_10TF 0x1000 #define PHY_BMSR_10TH 0x0800 +#define PHY_BMSR_EXT_STAT 0x0100 #define PHY_BMSR_PRE_SUP 0x0040 #define PHY_BMSR_AUTN_COMP 0x0020 #define PHY_BMSR_RF 0x0010 @@ -138,23 +133,42 @@ int bb_miiphy_write (char *devname, unsigned char addr, #define PHY_ANLPAR_NP 0x8000 #define PHY_ANLPAR_ACK 0x4000 #define PHY_ANLPAR_RF 0x2000 +#define PHY_ANLPAR_ASYMP 0x0800 +#define PHY_ANLPAR_PAUSE 0x0400 #define PHY_ANLPAR_T4 0x0200 #define PHY_ANLPAR_TXFD 0x0100 #define PHY_ANLPAR_TX 0x0080 #define PHY_ANLPAR_10FD 0x0040 #define PHY_ANLPAR_10 0x0020 -#define PHY_ANLPAR_100 0x0380 /* we can run at 100 */ - -#define PHY_ANLPAR_PSB_MASK 0x001f -#define PHY_ANLPAR_PSB_802_3 0x0001 -#define PHY_ANLPAR_PSB_802_9 0x0002 - -/* PHY_1000BTSR */ -#define PHY_1000BTSR_MSCF 0x8000 -#define PHY_1000BTSR_MSCR 0x4000 -#define PHY_1000BTSR_LRS 0x2000 -#define PHY_1000BTSR_RRS 0x1000 -#define PHY_1000BTSR_1000FD 0x0800 -#define PHY_1000BTSR_1000HD 0x0400 +#define PHY_ANLPAR_100 0x0380 /* we can run at 100 */ +/* phy ANLPAR 1000BASE-X */ +#define PHY_X_ANLPAR_NP 0x8000 +#define PHY_X_ANLPAR_ACK 0x4000 +#define PHY_X_ANLPAR_RF_MASK 0x3000 +#define PHY_X_ANLPAR_PAUSE_MASK 0x0180 +#define PHY_X_ANLPAR_HD 0x0040 +#define PHY_X_ANLPAR_FD 0x0020 + +#define PHY_ANLPAR_PSB_MASK 0x001f +#define PHY_ANLPAR_PSB_802_3 0x0001 +#define PHY_ANLPAR_PSB_802_9 0x0002 + +/* phy 1000BTCR */ +#define PHY_1000BTCR_1000FD 0x0200 +#define PHY_1000BTCR_1000HD 0x0100 + +/* phy 1000BTSR */ +#define PHY_1000BTSR_MSCF 0x8000 +#define PHY_1000BTSR_MSCR 0x4000 +#define PHY_1000BTSR_LRS 0x2000 +#define PHY_1000BTSR_RRS 0x1000 +#define PHY_1000BTSR_1000FD 0x0800 +#define PHY_1000BTSR_1000HD 0x0400 + +/* phy EXSR */ +#define PHY_EXSR_1000XF 0x8000 +#define PHY_EXSR_1000XH 0x4000 +#define PHY_EXSR_1000TF 0x2000 +#define PHY_EXSR_1000TH 0x1000 #endif diff --git a/include/onenand_uboot.h b/include/onenand_uboot.h new file mode 100644 index 0000000..bd1831e --- /dev/null +++ b/include/onenand_uboot.h @@ -0,0 +1,39 @@ +/* + * Header file for OneNAND support for U-Boot + * + * Adaptation from kernel to U-Boot + * + * Copyright (C) 2005-2007 Samsung Electronics + * Kyungmin Park <kyungmin.park@samsung.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __UBOOT_ONENAND_H +#define __UBOOT_ONENAND_H + +struct kvec { + void *iov_base; + size_t iov_len; +}; + +typedef int spinlock_t; +typedef int wait_queue_head_t; + +/* Functions */ +extern void onenand_init(void); +extern int onenand_read(struct mtd_info *mtd, loff_t from, size_t len, + size_t * retlen, u_char * buf); +extern int onenand_read_oob(struct mtd_info *mtd, loff_t from, size_t len, + size_t * retlen, u_char * buf); +extern int onenand_write(struct mtd_info *mtd, loff_t from, size_t len, + size_t * retlen, const u_char * buf); +extern int onenand_erase(struct mtd_info *mtd, struct erase_info *instr); + +extern int onenand_unlock(struct mtd_info *mtd, loff_t ofs, size_t len); + +extern void onenand_print_device_info(int device, int verbose); + +#endif /* __UBOOT_ONENAND_H */ diff --git a/include/part.h b/include/part.h index 29c0320..37b2b68 100644 --- a/include/part.h +++ b/include/part.h @@ -38,9 +38,9 @@ typedef struct block_dev_desc { #endif lbaint_t lba; /* number of blocks */ unsigned long blksz; /* block size */ - unsigned char vendor [40+1]; /* IDE model, SCSI Vendor */ - unsigned char product[20+1]; /* IDE Serial no, SCSI product */ - unsigned char revision[8+1]; /* firmware revision */ + char vendor [40+1]; /* IDE model, SCSI Vendor */ + char product[20+1]; /* IDE Serial no, SCSI product */ + char revision[8+1]; /* firmware revision */ unsigned long (*block_read)(int dev, unsigned long start, lbaint_t blkcnt, diff --git a/include/status_led.h b/include/status_led.h index a646814..d12bb67 100644 --- a/include/status_led.h +++ b/include/status_led.h @@ -383,6 +383,27 @@ extern void __led_set (led_id_t mask, int state); # include <asm/status_led.h> #endif +/* + * Coloured LEDs API + */ +#ifndef __ASSEMBLY__ +extern void coloured_LED_init (void); +extern void red_LED_on(void); +extern void red_LED_off(void); +extern void green_LED_on(void); +extern void green_LED_off(void); +extern void yellow_LED_on(void); +extern void yellow_LED_off(void); +#else + .extern LED_init + .extern red_LED_on + .extern red_LED_off + .extern yellow_LED_on + .extern yellow_LED_off + .extern green_LED_on + .extern green_LED_off +#endif + #endif /* CONFIG_STATUS_LED */ #endif /* _STATUS_LED_H_ */ |