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author | Robby Cai <R63905@freescale.com> | 2012-08-23 15:47:20 +0800 |
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committer | Robby Cai <R63905@freescale.com> | 2012-08-24 16:37:40 +0800 |
commit | 439a5e37ab1ac43b55b80df92ffcf05fabc3b3f6 (patch) | |
tree | 0cd6df2b89207a1173bd76e61929f2d23f1239f6 /include | |
parent | 7ada9f6b7da6b07545d2a5d81704a565e1b6dfeb (diff) | |
download | u-boot-imx-439a5e37ab1ac43b55b80df92ffcf05fabc3b3f6.zip u-boot-imx-439a5e37ab1ac43b55b80df92ffcf05fabc3b3f6.tar.gz u-boot-imx-439a5e37ab1ac43b55b80df92ffcf05fabc3b3f6.tar.bz2 |
ENGR00221135: imx6x: clear PowerDown Enable bit of WDOG1_WMCR
From IC spec:
---
The Power down Counter inside WDOG-1 will be enabled out of reset.
This counter has a fixed time-out value of 16 seconds, after which
it will drive the WDOG-1 signal low.
To prevent this, the software must disable this counter by clearing
the PDE bit of Watchdog Miscellaneous Control Register (WDOG_WMCR)
within 16 seconds of reset de-assertion. Once disabled, this counter
cannot be enabled again until the next system reset occurs. This
feature is provided to prevent the hanging up of cores after reset, as
WDOG-1 is not enabled out of reset.
---
NOTE for the last sentence:
This feature requires a dedicated WDOG_B pin for it. The fact that changing
the IOMUX configuration can alter the WDOG_B functionality (GPIO by default)
is not ideal as it defeats the purpose of this feature. But it still
takes effect when the muxed pin is configured as WDOG_B within 16 seconds.
Clear PDE bit to avoid WDOG_B (aka, WDOG-1) assertion.
Tested on MX6SL. May add this for other MX6x.
Signed-off-by: Robby Cai <R63905@freescale.com>
Diffstat (limited to 'include')
-rw-r--r-- | include/imx_wdog.h | 39 |
1 files changed, 39 insertions, 0 deletions
diff --git a/include/imx_wdog.h b/include/imx_wdog.h new file mode 100644 index 0000000..40920f7 --- /dev/null +++ b/include/imx_wdog.h @@ -0,0 +1,39 @@ +/* + * Copyright (C) 2012 Freescale Semiconductor, Inc. All Rights Reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + */ + +#ifndef _IMX_WDOG_H +#define _IMX_WDOG_H + +#include <asm/io.h> + +#define WDOGx_WMCR 0x8 +static inline void wdog_preconfig(int base_addr) +{ + /* + * From IC spec: + * The Power down Counter inside WDOG-1 will be enabled out of reset. + * This counter has a fixed time-out value of 16 seconds, after which + * it will drive the WDOG-1 signal low. + * + * To prevent this, the software must disable this counter by clearing + * the PDE bit of Watchdog Miscellaneous Control Register (WDOG_WMCR). + */ + writew(0, base_addr + WDOGx_WMCR); +} + +#endif |