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authorWolfgang Denk <wd@fifi.denx.de>2006-09-20 23:47:49 +0200
committerWolfgang Denk <wd@fifi.denx.de>2006-09-20 23:47:49 +0200
commitac611700e5bcdd5a762dcc4d28db256fcc5a4bf2 (patch)
tree9988ae650e9ac437b1cb60ce237245976d869bb3 /include
parentaeec782b020930732eab075af97212c3f03afcae (diff)
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Fix comments in include/ppc440.h
Patch by Martin Hicks, 16 Jun 2006
Diffstat (limited to 'include')
-rw-r--r--include/ppc440.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/include/ppc440.h b/include/ppc440.h
index c4a3ed5..e407320 100644
--- a/include/ppc440.h
+++ b/include/ppc440.h
@@ -1570,8 +1570,8 @@
#define malrxctp0r (MAL_DCR_BASE+0x40) /* RX 0 Channel table pointer reg */
#define malrxctp1r (MAL_DCR_BASE+0x41) /* RX 1 Channel table pointer reg */
#if defined(CONFIG_440GX)
-#define malrxctp2r (MAL_DCR_BASE+0x42) /* RX 0 Channel table pointer reg */
-#define malrxctp3r (MAL_DCR_BASE+0x43) /* RX 1 Channel table pointer reg */
+#define malrxctp2r (MAL_DCR_BASE+0x42) /* RX 2 Channel table pointer reg */
+#define malrxctp3r (MAL_DCR_BASE+0x43) /* RX 3 Channel table pointer reg */
#endif /* CONFIG_440GX */
#define malrcbs0 (MAL_DCR_BASE+0x60) /* RX 0 Channel buffer size reg */
#define malrcbs1 (MAL_DCR_BASE+0x61) /* RX 1 Channel buffer size reg */