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author | Gerald Van Baren <vanbaren@cideas.com> | 2008-03-21 11:42:54 -0400 |
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committer | Gerald Van Baren <vanbaren@cideas.com> | 2008-03-21 11:42:54 -0400 |
commit | 493a2b1dc97367e904bf83869501f6290f3b374e (patch) | |
tree | 5e5905f085107242093e39a5e2175622df1bb73a /include | |
parent | 11abe45c48ec3485a6c1a5168ce8d79c3288adc1 (diff) | |
parent | 81a0ac62ea29f8252d0a714709d0ecfdbba2a15e (diff) | |
download | u-boot-imx-493a2b1dc97367e904bf83869501f6290f3b374e.zip u-boot-imx-493a2b1dc97367e904bf83869501f6290f3b374e.tar.gz u-boot-imx-493a2b1dc97367e904bf83869501f6290f3b374e.tar.bz2 |
Merge git://www.denx.de/git/u-boot into uboot
Diffstat (limited to 'include')
-rw-r--r-- | include/asm-arm/global_data.h | 1 | ||||
-rw-r--r-- | include/asm-avr32/global_data.h | 1 | ||||
-rw-r--r-- | include/asm-blackfin/global_data.h | 1 | ||||
-rw-r--r-- | include/asm-i386/global_data.h | 1 | ||||
-rw-r--r-- | include/asm-m68k/global_data.h | 1 | ||||
-rw-r--r-- | include/asm-microblaze/global_data.h | 1 | ||||
-rw-r--r-- | include/asm-mips/global_data.h | 1 | ||||
-rw-r--r-- | include/asm-nios/global_data.h | 1 | ||||
-rw-r--r-- | include/asm-nios2/global_data.h | 1 | ||||
-rw-r--r-- | include/asm-ppc/global_data.h | 1 | ||||
-rw-r--r-- | include/asm-sh/global_data.h | 1 | ||||
-rw-r--r-- | include/configs/lwmon5.h | 96 | ||||
-rw-r--r-- | include/post.h | 9 | ||||
-rw-r--r-- | include/ppc440.h | 5 | ||||
-rw-r--r-- | include/rtc.h | 2 |
15 files changed, 118 insertions, 5 deletions
diff --git a/include/asm-arm/global_data.h b/include/asm-arm/global_data.h index c2d5291..0410b5e 100644 --- a/include/asm-arm/global_data.h +++ b/include/asm-arm/global_data.h @@ -60,6 +60,7 @@ typedef struct global_data { #define GD_FLG_RELOC 0x00001 /* Code was relocated to RAM */ #define GD_FLG_DEVINIT 0x00002 /* Devices have been initialized */ #define GD_FLG_SILENT 0x00004 /* Silent mode */ +#define GD_FLG_POSTFAIL 0x00008 /* Critical POST test failed */ #define DECLARE_GLOBAL_DATA_PTR register volatile gd_t *gd asm ("r8") diff --git a/include/asm-avr32/global_data.h b/include/asm-avr32/global_data.h index 681c514..daf64bc 100644 --- a/include/asm-avr32/global_data.h +++ b/include/asm-avr32/global_data.h @@ -51,6 +51,7 @@ typedef struct global_data { #define GD_FLG_RELOC 0x00001 /* Code was relocated to RAM */ #define GD_FLG_DEVINIT 0x00002 /* Devices have been initialized */ #define GD_FLG_SILENT 0x00004 /* Silent mode */ +#define GD_FLG_POSTFAIL 0x00008 /* Critical POST test failed */ #define DECLARE_GLOBAL_DATA_PTR register gd_t *gd asm("r5") diff --git a/include/asm-blackfin/global_data.h b/include/asm-blackfin/global_data.h index cb0dfc2..6debfc7 100644 --- a/include/asm-blackfin/global_data.h +++ b/include/asm-blackfin/global_data.h @@ -61,6 +61,7 @@ typedef struct global_data { #define GD_FLG_RELOC 0x00001 /* Code was relocated to RAM */ #define GD_FLG_DEVINIT 0x00002 /* Devices have been initialized */ #define GD_FLG_SILENT 0x00004 /* Silent mode */ +#define GD_FLG_POSTFAIL 0x00008 /* Critical POST test failed */ #define DECLARE_GLOBAL_DATA_PTR register gd_t * volatile gd asm ("P5") diff --git a/include/asm-i386/global_data.h b/include/asm-i386/global_data.h index 1d309d5..68a9ad6 100644 --- a/include/asm-i386/global_data.h +++ b/include/asm-i386/global_data.h @@ -54,6 +54,7 @@ typedef struct { #define GD_FLG_RELOC 0x00001 /* Code was relocated to RAM */ #define GD_FLG_DEVINIT 0x00002 /* Devices have been initialized */ #define GD_FLG_SILENT 0x00004 /* Silent mode */ +#define GD_FLG_POSTFAIL 0x00008 /* Critical POST test failed */ extern gd_t *global_data; diff --git a/include/asm-m68k/global_data.h b/include/asm-m68k/global_data.h index 1e26eb0..958736e 100644 --- a/include/asm-m68k/global_data.h +++ b/include/asm-m68k/global_data.h @@ -68,6 +68,7 @@ typedef struct global_data { #define GD_FLG_RELOC 0x00001 /* Code was relocated to RAM */ #define GD_FLG_DEVINIT 0x00002 /* Devices have been initialized */ #define GD_FLG_SILENT 0x00004 /* Silent mode */ +#define GD_FLG_POSTFAIL 0x00008 /* Critical POST test failed */ #if 0 extern gd_t *global_data; diff --git a/include/asm-microblaze/global_data.h b/include/asm-microblaze/global_data.h index a6e7834..91243b2 100644 --- a/include/asm-microblaze/global_data.h +++ b/include/asm-microblaze/global_data.h @@ -52,6 +52,7 @@ typedef struct global_data { #define GD_FLG_RELOC 0x00001 /* Code was relocated to RAM */ #define GD_FLG_DEVINIT 0x00002 /* Devices have been initialized */ #define GD_FLG_SILENT 0x00004 /* Silent mode */ +#define GD_FLG_POSTFAIL 0x00008 /* Critical POST test failed */ #define DECLARE_GLOBAL_DATA_PTR register volatile gd_t *gd asm ("r31") diff --git a/include/asm-mips/global_data.h b/include/asm-mips/global_data.h index a024194..bd9e4dd 100644 --- a/include/asm-mips/global_data.h +++ b/include/asm-mips/global_data.h @@ -54,6 +54,7 @@ typedef struct global_data { #define GD_FLG_RELOC 0x00001 /* Code was relocated to RAM */ #define GD_FLG_DEVINIT 0x00002 /* Devices have been initialized */ #define GD_FLG_SILENT 0x00004 /* Silent mode */ +#define GD_FLG_POSTFAIL 0x00008 /* Critical POST test failed */ #define DECLARE_GLOBAL_DATA_PTR register volatile gd_t *gd asm ("k0") diff --git a/include/asm-nios/global_data.h b/include/asm-nios/global_data.h index fd11389..ddd66cf 100644 --- a/include/asm-nios/global_data.h +++ b/include/asm-nios/global_data.h @@ -45,6 +45,7 @@ typedef struct global_data { #define GD_FLG_RELOC 0x00001 /* Code was relocated to RAM */ #define GD_FLG_DEVINIT 0x00002 /* Devices have been initialized */ #define GD_FLG_SILENT 0x00004 /* Silent mode */ +#define GD_FLG_POSTFAIL 0x00008 /* Critical POST test failed */ #define DECLARE_GLOBAL_DATA_PTR register gd_t *gd asm ("%g7") diff --git a/include/asm-nios2/global_data.h b/include/asm-nios2/global_data.h index a1ac288..ae5f617 100644 --- a/include/asm-nios2/global_data.h +++ b/include/asm-nios2/global_data.h @@ -44,6 +44,7 @@ typedef struct global_data { #define GD_FLG_RELOC 0x00001 /* Code was relocated to RAM */ #define GD_FLG_DEVINIT 0x00002 /* Devices have been initialized */ #define GD_FLG_SILENT 0x00004 /* Silent mode */ +#define GD_FLG_POSTFAIL 0x00008 /* Critical POST test failed */ #define DECLARE_GLOBAL_DATA_PTR register gd_t *gd asm ("r15") diff --git a/include/asm-ppc/global_data.h b/include/asm-ppc/global_data.h index 205f7ed..e07092b 100644 --- a/include/asm-ppc/global_data.h +++ b/include/asm-ppc/global_data.h @@ -164,6 +164,7 @@ typedef struct global_data { #define GD_FLG_RELOC 0x00001 /* Code was relocated to RAM */ #define GD_FLG_DEVINIT 0x00002 /* Devices have been initialized */ #define GD_FLG_SILENT 0x00004 /* Silent mode */ +#define GD_FLG_POSTFAIL 0x00008 /* Critical POST test failed */ #if 1 #define DECLARE_GLOBAL_DATA_PTR register volatile gd_t *gd asm ("r2") diff --git a/include/asm-sh/global_data.h b/include/asm-sh/global_data.h index 0a44a34..521a66f 100644 --- a/include/asm-sh/global_data.h +++ b/include/asm-sh/global_data.h @@ -44,6 +44,7 @@ typedef struct global_data #define GD_FLG_RELOC 0x00001 /* Code was relocated to RAM */ #define GD_FLG_DEVINIT 0x00002 /* Devices have been initialized */ #define GD_FLG_SILENT 0x00004 /* Silent mode */ +#define GD_FLG_POSTFAIL 0x00008 /* Critical POST test failed */ #define DECLARE_GLOBAL_DATA_PTR register gd_t *gd asm ("r13") diff --git a/include/configs/lwmon5.h b/include/configs/lwmon5.h index c3f10c7..ced7ba6 100644 --- a/include/configs/lwmon5.h +++ b/include/configs/lwmon5.h @@ -36,6 +36,7 @@ #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */ #define CONFIG_BOARD_POSTCLK_INIT 1 /* Call board_postclk_init */ #define CONFIG_MISC_INIT_R 1 /* Call misc_init_r */ +#define CONFIG_BOARD_RESET 1 /* Call board_reset */ /*----------------------------------------------------------------------- * Base addresses -- Note these are effective addresses where the @@ -86,6 +87,15 @@ #define CFG_POST_ALT_WORD_ADDR (CFG_PERIPHERAL_BASE + GPT0_COMP6) /* unused GPT0 COMP reg */ +/* Additional registers for watchdog timer post test */ + +#define CFG_DSPIC_TEST_ADDR (CFG_PERIPHERAL_BASE + GPT0_COMP5) +#define CFG_WATCHDOG_TIME_ADDR (CFG_PERIPHERAL_BASE + GPT0_COMP4) +#define CFG_WATCHDOG_FLAGS_ADDR (CFG_PERIPHERAL_BASE + GPT0_COMP5) +#define CFG_WATCHDOG_MAGIC 0x12480000 +#define CFG_WATCHDOG_MAGIC_MASK 0xFFFF0000 +#define CFG_DSPIC_TEST_MASK 0x00000001 + /*----------------------------------------------------------------------- * Serial Port *----------------------------------------------------------------------*/ @@ -156,10 +166,86 @@ CFG_POST_MEMORY | \ CFG_POST_RTC | \ CFG_POST_SPR | \ - CFG_POST_UART) + CFG_POST_UART | \ + CFG_POST_SYSMON | \ + CFG_POST_WATCHDOG | \ + CFG_POST_DSP | \ + CFG_POST_BSPEC1 | \ + CFG_POST_BSPEC2 | \ + CFG_POST_BSPEC3 | \ + CFG_POST_BSPEC4 | \ + CFG_POST_BSPEC5) + +#define CONFIG_POST_WATCHDOG {\ + "Watchdog timer test", \ + "watchdog", \ + "This test checks the watchdog timer.", \ + POST_RAM | POST_POWERON | POST_SLOWTEST | POST_MANUAL | POST_REBOOT, \ + &lwmon5_watchdog_post_test, \ + NULL, \ + NULL, \ + CFG_POST_WATCHDOG \ + } + +#define CONFIG_POST_BSPEC1 {\ + "dsPIC init test", \ + "dspic_init", \ + "This test returns result of dsPIC READY test run earlier.", \ + POST_RAM | POST_ALWAYS, \ + &dspic_init_post_test, \ + NULL, \ + NULL, \ + CFG_POST_BSPEC1 \ + } + +#define CONFIG_POST_BSPEC2 {\ + "dsPIC test", \ + "dspic", \ + "This test gets result of dsPIC POST and dsPIC version.", \ + POST_RAM | POST_ALWAYS, \ + &dspic_post_test, \ + NULL, \ + NULL, \ + CFG_POST_BSPEC2 \ + } + +#define CONFIG_POST_BSPEC3 {\ + "FPGA test", \ + "fpga", \ + "This test checks FPGA registers and memory.", \ + POST_RAM | POST_ALWAYS, \ + &fpga_post_test, \ + NULL, \ + NULL, \ + CFG_POST_BSPEC3 \ + } + +#define CONFIG_POST_BSPEC4 {\ + "GDC test", \ + "gdc", \ + "This test checks GDC registers and memory.", \ + POST_RAM | POST_ALWAYS, \ + &gdc_post_test, \ + NULL, \ + NULL, \ + CFG_POST_BSPEC4 \ + } + +#define CONFIG_POST_BSPEC5 {\ + "SYSMON1 test", \ + "sysmon1", \ + "This test checks GPIO_62_EPX pin indicating power failure.", \ + POST_RAM | POST_MANUAL | POST_NORMAL | POST_SLOWTEST, \ + &sysmon1_post_test, \ + NULL, \ + NULL, \ + CFG_POST_BSPEC5 \ + } #define CFG_POST_CACHE_ADDR 0x7fff0000 /* free virtual address */ #define CONFIG_LOGBUFFER +#define CONFIG_ALT_LH_ADDR (CFG_PERIPHERAL_BASE + GPT0_COMP1) +#define CONFIG_ALT_LB_ADDR (CFG_OCM_BASE) #define CFG_CONSOLE_IS_IN_ENV /* Otherwise it catches logbuffer as output */ /*----------------------------------------------------------------------- @@ -181,6 +267,7 @@ #define CONFIG_RTC_PCF8563 1 /* enable Philips PCF8563 RTC */ #define CFG_I2C_RTC_ADDR 0x51 /* Philips PCF8563 RTC address */ #define CFG_I2C_KEYBD_ADDR 0x56 /* PIC LWE keyboard */ +#define CFG_I2C_DSPIC_IO_ADDR 0x57 /* PIC I/O addr */ #define CONFIG_POST_KEY_MAGIC "3C+3E" /* press F3 + F5 keys to force POST */ #if 0 @@ -366,9 +453,6 @@ #define CFG_PCI_SUBSYS_VENDORID 0x10e8 /* AMCC */ #define CFG_PCI_SUBSYS_ID 0xcafe /* Whatever */ -/* - * ToDo: Watchdog is not test fully, so exclude it for now - */ #define CONFIG_HW_WATCHDOG 1 /* Use external HW-Watchdog */ #define CONFIG_WD_PERIOD 40000 /* in usec */ @@ -431,10 +515,14 @@ #define CFG_GPIO_PHY1_RST 12 #define CFG_GPIO_FLASH_WP 14 #define CFG_GPIO_PHY0_RST 22 +#define CFG_GPIO_DSPIC_READY 51 #define CFG_GPIO_EEPROM_EXT_WP 55 +#define CFG_GPIO_HIGHSIDE 56 #define CFG_GPIO_EEPROM_INT_WP 57 +#define CFG_GPIO_BOARD_RESET 58 #define CFG_GPIO_LIME_S 59 #define CFG_GPIO_LIME_RST 60 +#define CFG_GPIO_SYSMON_STATUS 62 #define CFG_GPIO_WATCHDOG 63 /*----------------------------------------------------------------------- diff --git a/include/post.h b/include/post.h index c8062bb..ee07d2c 100644 --- a/include/post.h +++ b/include/post.h @@ -42,12 +42,16 @@ #define POST_REBOOT 0x0800 /* test may cause rebooting */ #define POST_PREREL 0x1000 /* test runs before relocation */ +#define POST_CRITICAL 0x2000 /* Use failbootcmd if test failed */ + #define POST_MEM (POST_RAM | POST_ROM) #define POST_ALWAYS (POST_NORMAL | \ POST_SLOWTEST | \ POST_MANUAL | \ POST_POWERON ) +#define POST_FAIL_SAVE 0x80 + #ifndef __ASSEMBLY__ struct post_test { @@ -93,6 +97,11 @@ extern int post_hotkeys_pressed(void); #define CFG_POST_CODEC 0x00002000 #define CFG_POST_FPU 0x00004000 #define CFG_POST_ECC 0x00008000 +#define CFG_POST_BSPEC1 0x00010000 +#define CFG_POST_BSPEC2 0x00020000 +#define CFG_POST_BSPEC3 0x00040000 +#define CFG_POST_BSPEC4 0x00080000 +#define CFG_POST_BSPEC5 0x00100000 #endif /* CONFIG_POST */ diff --git a/include/ppc440.h b/include/ppc440.h index 80dd332..10517cb 100644 --- a/include/ppc440.h +++ b/include/ppc440.h @@ -1431,6 +1431,11 @@ #define SDR0_MFR_PKT_REJ_POL 0x00200000 /* Packet Reject Polarity */ #define GPT0_COMP6 0x00000098 +#define GPT0_COMP5 0x00000094 +#define GPT0_COMP4 0x00000090 +#define GPT0_COMP3 0x0000008C +#define GPT0_COMP2 0x00000088 +#define GPT0_COMP1 0x00000084 #if defined(CONFIG_440EPX) || defined(CONFIG_440GRX) #define SDR0_USB2D0CR 0x0320 diff --git a/include/rtc.h b/include/rtc.h index 15f3571..2995144 100644 --- a/include/rtc.h +++ b/include/rtc.h @@ -52,7 +52,7 @@ struct rtc_time { int tm_isdst; }; -void rtc_get (struct rtc_time *); +int rtc_get (struct rtc_time *); void rtc_set (struct rtc_time *); void rtc_reset (void); |