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authorAnish Trivedi <anish@freescale.com>2011-10-19 13:51:30 -0500
committerAnish Trivedi <anish@freescale.com>2011-10-27 15:56:23 -0500
commitec10ca317794cd7e83e11df57e89085046ccd940 (patch)
treeb48157b44d03963573adf2b3fefc1721097a3645 /include
parent1b69b48bbaacca9b355a56598ae5e7342442251f (diff)
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ENGR00139221 USDHC Add SDXC UHS-I support
Modified MMC library for UHS-I command sequence Added support to USDHC driver for UHS-I Signed-off-by: Anish Trivedi <anish@freescale.com>
Diffstat (limited to 'include')
-rw-r--r--include/asm-arm/arch-mx6/mx6_pins.h4
-rw-r--r--include/fsl_esdhc.h16
-rw-r--r--include/mmc.h30
3 files changed, 47 insertions, 3 deletions
diff --git a/include/asm-arm/arch-mx6/mx6_pins.h b/include/asm-arm/arch-mx6/mx6_pins.h
index 9648aa9..d50e17c 100644
--- a/include/asm-arm/arch-mx6/mx6_pins.h
+++ b/include/asm-arm/arch-mx6/mx6_pins.h
@@ -51,8 +51,8 @@ typedef enum iomux_config {
PAD_CTL_DSE_40ohm | PAD_CTL_HYS)
#define MX6Q_USDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
- PAD_CTL_PUS_47K_UP | PAD_CTL_SPEED_LOW | \
- PAD_CTL_DSE_80ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS)
+ PAD_CTL_PUS_47K_UP | PAD_CTL_SPEED_HIGH | \
+ PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS)
#define MX6Q_ENET_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
diff --git a/include/fsl_esdhc.h b/include/fsl_esdhc.h
index df73e22..da7e584 100644
--- a/include/fsl_esdhc.h
+++ b/include/fsl_esdhc.h
@@ -29,6 +29,11 @@
#include <asm/errno.h>
/* FSL eSDHC-specific constants */
+
+#define VENDORSPEC_VSELECT 0x00000002
+#define VENDORSPEC_FRC_SDCLK_ON 0x00000100
+#define VENDORSPEC_INIT 0x20007809
+
#define SYSCTL 0x0002e02c
#define SYSCTL_INITA 0x08000000
#define SYSCTL_TIMEOUT_MASK 0x000f0000
@@ -97,7 +102,7 @@
#define PRSSTAT_CIDHB (0x00000001)
#define PROCTL 0x0002e028
-#define PROCTL_INIT 0x00000020
+#define PROCTL_INIT 0x08800020
#define PROCTL_DTW_4 0x00000002
#define PROCTL_DTW_8 0x00000004
#define PROCTL_D3CD 0x00000008
@@ -173,11 +178,20 @@
#define USDHC_DLL_LOW_MASK 0xF
#define USDHC_DLL_HIGH_SHIFT 4
+#define USDHC_MIXCTRL_EXE_TUNE 0x00400000
+#define USDHC_MIXCTRL_SMPCLK_SEL 0x00800000
+#define USDHC_MIXCTRL_FBCLK_SEL 0x02000000
+
+#define USDHC_TUNE_CTRL_STEP 0x1
+#define USDHC_TUNE_CTRL_MIN 0x0
+#define USDHC_TUNE_CTRL_MAX ((1 << 7) - 1)
+
struct fsl_esdhc_cfg {
u32 esdhc_base;
u32 no_snoop;
u32 clk_enable;
u32 is_usdhc;
+ u32 port_supports_uhs18v;
};
#if defined(CONFIG_FSL_ESDHC) || defined(CONFIG_IMX_MMC)
diff --git a/include/mmc.h b/include/mmc.h
index dd47dfc..769fb92 100644
--- a/include/mmc.h
+++ b/include/mmc.h
@@ -31,6 +31,7 @@
#include <linux/list.h>
#define SD_VERSION_SD 0x20000
+#define SD_VERSION_3 (SD_VERSION_SD | 0x30)
#define SD_VERSION_2 (SD_VERSION_SD | 0x20)
#define SD_VERSION_1_0 (SD_VERSION_SD | 0x10)
#define SD_VERSION_1_10 (SD_VERSION_SD | 0x1a)
@@ -51,6 +52,24 @@
#define MMC_MODE_SPI 0x010
#define MMC_MODE_HC 0x020
+/* UHS-I modes - host and card capabilities*/
+#define SD_UHSI_CAP_SDR104 0x00080000
+#define SD_UHSI_CAP_SDR50 0x00040000
+#define SD_UHSI_CAP_SDR25 0x00020000
+#define SD_UHSI_CAP_SDR12 0x00010000
+#define SD_UHSI_CAP_DDR50 0x00100000
+#define SD_UHSI_CAP_ALL_MODES (SD_UHSI_CAP_SDR104 | SD_UHSI_CAP_SDR50 |\
+ SD_UHSI_CAP_DDR50 | SD_UHSI_CAP_SDR25 | SD_UHSI_CAP_SDR12)
+#define SD_UHSI_CAP_HS_MODES (SD_UHSI_CAP_SDR104 | SD_UHSI_CAP_SDR50 |\
+ SD_UHSI_CAP_DDR50)
+
+/* UHS-I modes - function numbers */
+#define SD_UHSI_FUNC_SDR12 0
+#define SD_UHSI_FUNC_SDR25 1
+#define SD_UHSI_FUNC_SDR50 2
+#define SD_UHSI_FUNC_SDR104 3
+#define SD_UHSI_FUNC_DDR50 4
+
#define SD_DATA_4BIT 0x00040000
#define IS_SD(x) (x->version & SD_VERSION_SD)
@@ -121,6 +140,11 @@
#define OCR_VOLTAGE_MASK 0x007FFF80
#define OCR_ACCESS_MODE 0x60000000
+/* UHS-I related defines */
+#define SD_SWITCH_18V 0x01000000
+#define SD_CMD_SWITCH_UHS18V 11
+#define SD_CMD_TUNING 19
+
#define SECURE_ERASE 0x80000000
#define MMC_STATUS_MASK (~0x0206BF7F)
@@ -315,10 +339,15 @@ struct mmc {
uint f_min;
uint f_max;
int high_capacity;
+ uint uhs18v; /* UHS-I complaint 1.8V signalling */
uint bus_width;
uint clock;
uint card_caps;
uint host_caps;
+ uint card_uhs_mode;
+ uint tuning_min;
+ uint tuning_max;
+ uint tuning_step;
uint ocr;
uint scr[2];
uint csd[4];
@@ -337,6 +366,7 @@ struct mmc {
struct mmc_cmd *cmd, struct mmc_data *data);
void (*set_ios)(struct mmc *mmc);
int (*init)(struct mmc *mmc);
+ void (*set_tuning)(struct mmc *mmc, uint val);
uint b_max;
};