diff options
author | Terry Lv <r65388@freescale.com> | 2010-05-18 16:43:51 +0800 |
---|---|---|
committer | Terry Lv <r65388@freescale.com> | 2010-05-31 10:21:05 +0800 |
commit | 5ceff9165b3d259f82e5ea181fee9bd6be25bf28 (patch) | |
tree | 96d6fbc52c5440e1abc76f9fb9911981f3944734 /include | |
parent | 161ebc6c0813e3d9adc267c8c58c5f727dc3e44c (diff) | |
download | u-boot-imx-5ceff9165b3d259f82e5ea181fee9bd6be25bf28.zip u-boot-imx-5ceff9165b3d259f82e5ea181fee9bd6be25bf28.tar.gz u-boot-imx-5ceff9165b3d259f82e5ea181fee9bd6be25bf28.tar.bz2 |
ENGR00123551: Add mx25 splash screen support
Add mx25 splash screen support.
Signed-off-by: Terry Lv <r65388@freescale.com>
Signed-off-by: Renato Frias <renato.frias@freescale.com>
Signed-off-by: Terry Lv <r65388@freescale.com>
Diffstat (limited to 'include')
-rw-r--r-- | include/configs/mx25_3stack.h | 32 | ||||
-rw-r--r-- | include/lcd.h | 22 | ||||
-rw-r--r-- | include/mx2fb.h | 47 |
3 files changed, 100 insertions, 1 deletions
diff --git a/include/configs/mx25_3stack.h b/include/configs/mx25_3stack.h index fde7b12..9a6391c 100644 --- a/include/configs/mx25_3stack.h +++ b/include/configs/mx25_3stack.h @@ -105,6 +105,7 @@ #define CONFIG_CMD_MMC #define CONFIG_MXC_NAND + /* * MMC Configs * */ @@ -141,7 +142,8 @@ "bootcmd=run bootcmd_net\0" \ "bootcmd_net=run bootargs_base bootargs_nfs; " \ "tftpboot ${loadaddr} ${kernel}; bootm\0" \ - "load_uboot=tftpboot ${loadaddr} ${uboot}\0" + "load_uboot=tftpboot ${loadaddr} ${uboot}\0" \ + "splashimage=0x80800000\0" /*Support LAN9217*/ #define CONFIG_SMC911X @@ -211,6 +213,34 @@ #define PHYS_SDRAM_1_SIZE (64 * 1024 * 1024) #endif +/* LCD */ +/* +#define CONFIG_SPLASH_SCREEN +*/ + +#ifdef CONFIG_SPLASH_SCREEN + #define CONFIG_LCD + #define CONFIG_MXC2_LCD 1 + #undef LCD_TEST_PATTERN + #define CONFIG_FB_BASE 0x81400000 + #define CONFIG_SYS_CONSOLE_IS_IN_ENV 1 + #define CONFIG_SPLASH_SCREEN 1 + #define CONFIG_SPLASH_IS_IN_MMC 1 + #define LCD_BPP LCD_COLOR16 + /* #define CONFIG_SPLASH_SCREEN_ALIGN 1 */ + + #define CONFIG_CMD_BMP + #define CONFIG_BMP_24BPP 1 + #define CONFIG_BMP_16BPP 1 +#endif + + +#ifdef CONFIG_SPLASH_IS_IN_MMC + #define CONFIG_SPLASH_IMG_MMC_DEV 0 + #define CONFIG_SPLASH_IMG_OFFSET 0x4c000 + #define CONFIG_SPLASH_IMG_SIZE 0x19000 +#endif + /* Monitor at beginning of flash */ /* #define CONFIG_FSL_ENV_IN_MMC */ #define CONFIG_FSL_ENV_IN_NAND diff --git a/include/lcd.h b/include/lcd.h index 1f85daa..afb99ba 100644 --- a/include/lcd.h +++ b/include/lcd.h @@ -1,4 +1,6 @@ /* + * Copyright (C) 2004-2010 Freescale Semiconductor, Inc. + * * MPC823 and PXA LCD Controller * * Modeled after video interface by Paolo Scaffardi @@ -181,6 +183,26 @@ typedef struct vidinfo { u_long mmio; /* Memory mapped registers */ } vidinfo_t; +#elif defined(CONFIG_MXC2_LCD) + +typedef struct vidinfo { + u_long vl_refresh; /* Refresh Rate Hz */ + u_long vl_row; /* resolution in x */ + u_long vl_col; /* resolution in y */ + u_long vl_pixclock; /* pixel clock in picoseconds */ + u_long vl_left_margin; /* Horizontal back porch */ + u_long vl_right_margin; /* Horizontal front porch */ + u_long vl_upper_margin; /* Vertical back porch */ + u_long vl_lower_margin; /* Vertical front porch */ + u_long vl_hsync; /* Horizontal sync pulse length */ + u_long vl_vsync; /* Vertical sync pulse length */ + u_long vl_sync; /* Polarity on data enable */ + u_long vl_mode; /* Video Mode */ + u_long vl_flag; + u_char vl_bpix; + ushort *cmap; +} vidinfo_t; + #else typedef struct vidinfo { diff --git a/include/mx2fb.h b/include/mx2fb.h new file mode 100644 index 0000000..de05bc0 --- /dev/null +++ b/include/mx2fb.h @@ -0,0 +1,47 @@ +/* + * Copyright (C) 2004-2010 Freescale Semiconductor, Inc. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file mx2fb.h + * + * @brief MX 25 LCD controller header file. + * + * + */ + +#ifndef __MX2FB_H__ +#define __MX2FB_H__ + + +/* LCDC register settings */ + +#define LCDC_LSCR 0x00120300 + +#define LCDC_LRMCR 0x00000000 + +#define LCDC_LDCR 0x00020010 + +#define LCDC_LPCCR 0x00a9037f + +#define LCDC_LPCR 0xFA008B80 + +#define LCDC_LPCR_PCD 0x4 + +#define FB_SYNC_OE_LOW_ACT 0x80000000 +#define FB_SYNC_CLK_LAT_FALL 0x40000000 +#define FB_SYNC_DATA_INVERT 0x20000000 +#define FB_SYNC_CLK_IDLE_EN 0x10000000 +#define FB_SYNC_SHARP_MODE 0x08000000 +#define FB_SYNC_SWAP_RGB 0x04000000 + +#endif /* __MX2FB_H__ */ |