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authorZhang Jiejing <jiejing.zhang@freescale.com>2012-05-25 18:41:50 +0800
committerZhang Jiejing <jiejing.zhang@freescale.com>2012-05-29 17:57:00 +0800
commitf5d0383f915bd4d4d211d9958d7819b284276483 (patch)
treed6a8a9f9bd60d92a654070f9f134c7a39ce1ff21 /include
parentb704d5b48d36d7bfcd4d46c21c8daf7f89352204 (diff)
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ENGR00210918-1 android: add mx6sl android support
- add android build config for mx6sl_arm2 board. - add gpio support for mx6sl - add boot image support - add android recovery support - add fastboot support, but fastboot cannot transfer file. Signed-off-by Zhang Jiejing <jiejing.zhang@freescale.com>
Diffstat (limited to 'include')
-rw-r--r--include/configs/mx6sl_arm2.h1
-rw-r--r--include/configs/mx6sl_arm2_android.h74
-rw-r--r--include/usb/imx_udc.h3
3 files changed, 77 insertions, 1 deletions
diff --git a/include/configs/mx6sl_arm2.h b/include/configs/mx6sl_arm2.h
index 5b0cda1..6485609 100644
--- a/include/configs/mx6sl_arm2.h
+++ b/include/configs/mx6sl_arm2.h
@@ -171,6 +171,7 @@
#define CONFIG_IPADDR 192.168.1.103
#define CONFIG_SERVERIP 192.168.1.101
#define CONFIG_NETMASK 255.255.255.0
+#define CONFIG_MXC_GPIO
/*
* OCOTP Configs
diff --git a/include/configs/mx6sl_arm2_android.h b/include/configs/mx6sl_arm2_android.h
new file mode 100644
index 0000000..5afb8ac
--- /dev/null
+++ b/include/configs/mx6sl_arm2_android.h
@@ -0,0 +1,74 @@
+/*
+ * Copyright (C) 2012 Freescale Semiconductor, Inc.
+ *
+ * Configuration settings for the MX6Q Sabre Lite2 Freescale board.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef MX6SL_ARM2_ANDROID_H
+#define MX6SL_ARM2_ANDROID_H
+
+#include <configs/mx6sl_arm2.h>
+
+#if 0
+#define CONFIG_USB_DEVICE
+#define CONFIG_IMX_UDC 1
+#define CONFIG_FASTBOOT 1
+#define CONFIG_FASTBOOT_STORAGE_EMMC_SATA
+#define CONFIG_FASTBOOT_VENDOR_ID 0x18d1
+#define CONFIG_FASTBOOT_PRODUCT_ID 0x0d02
+#define CONFIG_FASTBOOT_BCD_DEVICE 0x311
+#define CONFIG_FASTBOOT_MANUFACTURER_STR "Freescale"
+#define CONFIG_FASTBOOT_PRODUCT_NAME_STR "i.mx6q Sabre Smart Device"
+#define CONFIG_FASTBOOT_INTERFACE_STR "Android fastboot"
+#define CONFIG_FASTBOOT_CONFIGURATION_STR "Android fastboot"
+#define CONFIG_FASTBOOT_SERIAL_NUM "12345"
+#define CONFIG_FASTBOOT_SATA_NO 0
+#define CONFIG_FASTBOOT_TRANSFER_BUF 0x30000000
+#define CONFIG_FASTBOOT_TRANSFER_BUF_SIZE 0x10000000 /* 256M byte */
+#endif
+
+#define CONFIG_CMD_BOOTI
+#define CONFIG_ANDROID_RECOVERY
+/* which mmc bus is your main storage ? */
+#define CONFIG_ANDROID_MAIN_MMC_BUS 0
+#define CONFIG_ANDROID_BOOT_PARTITION_MMC 1
+#define CONFIG_ANDROID_SYSTEM_PARTITION_MMC 5
+#define CONFIG_ANDROID_RECOVERY_PARTITION_MMC 2
+#define CONFIG_ANDROID_CACHE_PARTITION_MMC 6
+
+
+#define CONFIG_ANDROID_RECOVERY_BOOTARGS_MMC NULL
+#define CONFIG_ANDROID_RECOVERY_BOOTCMD_MMC \
+ "booti mmc0 recovery"
+#define CONFIG_INITRD_TAG
+
+#undef CONFIG_LOADADDR
+#undef CONFIG_RD_LOADADDR
+#undef CONFIG_EXTRA_ENV_SETTINGS
+
+#define CONFIG_LOADADDR 0x80800000 /* loadaddr env var */
+#define CONFIG_RD_LOADADDR 0x81000000
+
+#define CONFIG_INITRD_TAG
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "netdev=eth0\0" \
+ "ethprime=FEC0\0" \
+ "fastboot_dev=mmc0\0" \
+ "bootcmd=booti mmc0\0"
+#endif
diff --git a/include/usb/imx_udc.h b/include/usb/imx_udc.h
index c3238e0..3809640 100644
--- a/include/usb/imx_udc.h
+++ b/include/usb/imx_udc.h
@@ -33,7 +33,8 @@
#define USB_OTGREGS_BASE (OTG_BASE_ADDR + 0x000)
#define USB_H1REGS_BASE (OTG_BASE_ADDR + 0x200)
#define USB_H2REGS_BASE (OTG_BASE_ADDR + 0x400)
-#if (defined CONFIG_MX6Q || defined CONFIG_MX53 || defined CONFIG_MX51 || CONFIG_MX50)
+#if (defined CONFIG_MX51 || defined CONFIG_MX50 || defined CONFIG_MX6Q \
+ || defined CONFIG_MX53 || defined CONFIG_MX6DL || defined CONFIG_MX6SL)
#define USB_H3REGS_BASE (OTG_BASE_ADDR + 0x600)
#define USB_OTHERREGS_BASE (OTG_BASE_ADDR + 0x800)
#else