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author | Wolfgang Denk <wd@denx.de> | 2009-06-15 11:15:54 +0200 |
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committer | Wolfgang Denk <wd@denx.de> | 2009-06-15 11:15:54 +0200 |
commit | c9005a72fee4231e30fe93c1741cea2342c54504 (patch) | |
tree | 50ae6edb28698df98211f99a8178f06a8b7ab50f /include | |
parent | 9ff67e5e4c719556d57f136a6453f8e4798d85c0 (diff) | |
parent | 60f61e6d7655400bb785a2ef637581679941f6d1 (diff) | |
download | u-boot-imx-c9005a72fee4231e30fe93c1741cea2342c54504.zip u-boot-imx-c9005a72fee4231e30fe93c1741cea2342c54504.tar.gz u-boot-imx-c9005a72fee4231e30fe93c1741cea2342c54504.tar.bz2 |
Merge branch 'master' of git://git.denx.de/u-boot-net
Diffstat (limited to 'include')
-rw-r--r-- | include/asm-arm/arch-davinci/emac_defs.h | 32 | ||||
-rw-r--r-- | include/configs/M5253DEMO.h | 1 | ||||
-rw-r--r-- | include/configs/at91sam9261ek.h | 1 | ||||
-rw-r--r-- | include/configs/davinci_dvevm.h | 1 | ||||
-rw-r--r-- | include/configs/davinci_schmoogie.h | 1 | ||||
-rw-r--r-- | include/configs/davinci_sffsdr.h | 1 | ||||
-rw-r--r-- | include/configs/davinci_sonata.h | 1 | ||||
-rw-r--r-- | include/configs/scb9328.h | 1 | ||||
-rw-r--r-- | include/configs/trizepsiv.h | 1 | ||||
-rw-r--r-- | include/netdev.h | 50 | ||||
-rw-r--r-- | include/tsec.h | 2 |
11 files changed, 91 insertions, 1 deletions
diff --git a/include/asm-arm/arch-davinci/emac_defs.h b/include/asm-arm/arch-davinci/emac_defs.h index c11161f..ae75f84 100644 --- a/include/asm-arm/arch-davinci/emac_defs.h +++ b/include/asm-arm/arch-davinci/emac_defs.h @@ -38,15 +38,38 @@ #include <asm/arch/hardware.h> +#ifdef CONFIG_SOC_DM365 +#define EMAC_BASE_ADDR (0x01d07000) +#define EMAC_WRAPPER_BASE_ADDR (0x01d0a000) +#define EMAC_WRAPPER_RAM_ADDR (0x01d08000) +#define EMAC_MDIO_BASE_ADDR (0x01d0b000) +#else #define EMAC_BASE_ADDR (0x01c80000) #define EMAC_WRAPPER_BASE_ADDR (0x01c81000) #define EMAC_WRAPPER_RAM_ADDR (0x01c82000) #define EMAC_MDIO_BASE_ADDR (0x01c84000) +#endif +#ifdef CONFIG_SOC_DM646x +/* MDIO module input frequency */ +#define EMAC_MDIO_BUS_FREQ 76500000 +/* MDIO clock output frequency */ +#define EMAC_MDIO_CLOCK_FREQ 2500000 /* 2.5 MHz */ +#elif defined(CONFIG_SOC_DM365) +/* MDIO module input frequency */ +#define EMAC_MDIO_BUS_FREQ 121500000 +/* MDIO clock output frequency */ +#define EMAC_MDIO_CLOCK_FREQ 2200000 /* 2.2 MHz */ +#else /* MDIO module input frequency */ #define EMAC_MDIO_BUS_FREQ 99000000 /* PLL/6 - 99 MHz */ /* MDIO clock output frequency */ #define EMAC_MDIO_CLOCK_FREQ 2000000 /* 2.0 MHz */ +#endif + +/* PHY mask - set only those phy number bits where phy is/can be connected */ +#define EMAC_MDIO_PHY_NUM 1 +#define EMAC_MDIO_PHY_MASK (1 << EMAC_MDIO_PHY_NUM) /* Ethernet Min/Max packet size */ #define EMAC_MIN_ETHERNET_PKT_SIZE 60 @@ -103,6 +126,8 @@ typedef volatile struct _emac_desc #define EMAC_MACCONTROL_MIIEN_ENABLE (0x20) #define EMAC_MACCONTROL_FULLDUPLEX_ENABLE (0x1) +#define EMAC_MACCONTROL_GIGABIT_ENABLE (1 << 7) +#define EMAC_MACCONTROL_GIGFORCE (1 << 17) #define EMAC_RXMBPENABLE_RXCAFEN_ENABLE (0x200000) #define EMAC_RXMBPENABLE_RXBROADEN (0x2000) @@ -258,12 +283,17 @@ typedef struct { /* EMAC Wrapper Registers Structure */ typedef struct { +#if defined(CONFIG_SOC_DM646x) || defined(CONFIG_SOC_DM365) + dv_reg IDVER; + dv_reg SOFTRST; + dv_reg EMCTRL; +#else u_int8_t RSVD0[4100]; dv_reg EWCTL; dv_reg EWINTTCNT; +#endif } ewrap_regs; - /* EMAC MDIO Registers Structure */ typedef struct { dv_reg VERSION; diff --git a/include/configs/M5253DEMO.h b/include/configs/M5253DEMO.h index 1fea6c3..50b3a03 100644 --- a/include/configs/M5253DEMO.h +++ b/include/configs/M5253DEMO.h @@ -88,6 +88,7 @@ # define _IO_BASE 0 #endif +#define CONFIG_NET_MULTI 1 #define CONFIG_DRIVER_DM9000 #ifdef CONFIG_DRIVER_DM9000 # define CONFIG_DM9000_BASE (CONFIG_SYS_CS1_BASE | 0x300) diff --git a/include/configs/at91sam9261ek.h b/include/configs/at91sam9261ek.h index 4f6b640..83e05b3 100644 --- a/include/configs/at91sam9261ek.h +++ b/include/configs/at91sam9261ek.h @@ -131,6 +131,7 @@ #define CONFIG_SYS_NO_FLASH 1 /* Ethernet */ +#define CONFIG_NET_MULTI 1 #define CONFIG_DRIVER_DM9000 1 #define CONFIG_DM9000_BASE 0x30000000 #define DM9000_IO CONFIG_DM9000_BASE diff --git a/include/configs/davinci_dvevm.h b/include/configs/davinci_dvevm.h index 6c5d065..96b6afc 100644 --- a/include/configs/davinci_dvevm.h +++ b/include/configs/davinci_dvevm.h @@ -109,6 +109,7 @@ #define CONFIG_BOOTP_DNS2 #define CONFIG_BOOTP_SEND_HOSTNAME #define CONFIG_NET_RETRY_COUNT 10 +#define CONFIG_NET_MULTI /*=====================*/ /* Flash & Environment */ /*=====================*/ diff --git a/include/configs/davinci_schmoogie.h b/include/configs/davinci_schmoogie.h index 6612cb3..9cb9838 100644 --- a/include/configs/davinci_schmoogie.h +++ b/include/configs/davinci_schmoogie.h @@ -77,6 +77,7 @@ #define CONFIG_BOOTP_SEND_HOSTNAME #define CONFIG_NET_RETRY_COUNT 10 #define CONFIG_OVERWRITE_ETHADDR_ONCE +#define CONFIG_NET_MULTI /*=====================*/ /* Flash & Environment */ /*=====================*/ diff --git a/include/configs/davinci_sffsdr.h b/include/configs/davinci_sffsdr.h index 6c1dc11..a47620f 100644 --- a/include/configs/davinci_sffsdr.h +++ b/include/configs/davinci_sffsdr.h @@ -74,6 +74,7 @@ #define CONFIG_BOOTP_SEND_HOSTNAME #define CONFIG_NET_RETRY_COUNT 10 #define CONFIG_OVERWRITE_ETHADDR_ONCE +#define CONFIG_NET_MULTI /* Flash & Environment */ #undef CONFIG_ENV_IS_IN_FLASH #define CONFIG_SYS_NO_FLASH diff --git a/include/configs/davinci_sonata.h b/include/configs/davinci_sonata.h index 893729c..82901b3 100644 --- a/include/configs/davinci_sonata.h +++ b/include/configs/davinci_sonata.h @@ -109,6 +109,7 @@ #define CONFIG_BOOTP_DNS2 #define CONFIG_BOOTP_SEND_HOSTNAME #define CONFIG_NET_RETRY_COUNT 10 +#define CONFIG_NET_MULTI /*=====================*/ /* Flash & Environment */ /*=====================*/ diff --git a/include/configs/scb9328.h b/include/configs/scb9328.h index 893c3d3..5556714 100644 --- a/include/configs/scb9328.h +++ b/include/configs/scb9328.h @@ -255,6 +255,7 @@ #define CONFIG_SYS_CS5U_VAL 0x00008400 #define CONFIG_SYS_CS5L_VAL 0x00000D03 +#define CONFIG_NET_MULTI 1 #define CONFIG_DRIVER_DM9000 1 #define CONFIG_DM9000_BASE 0x16000000 #define DM9000_IO CONFIG_DM9000_BASE diff --git a/include/configs/trizepsiv.h b/include/configs/trizepsiv.h index 49045fd..bfa7157 100644 --- a/include/configs/trizepsiv.h +++ b/include/configs/trizepsiv.h @@ -278,6 +278,7 @@ #define CONFIG_SYS_MCIO0_VAL 0x00008407 #define CONFIG_SYS_MCIO1_VAL 0x0000c108 +#define CONFIG_NET_MULTI 1 #define CONFIG_DRIVER_DM9000 1 #define CONFIG_DM9000_BASE 0x08000000 #define DM9000_IO CONFIG_DM9000_BASE diff --git a/include/netdev.h b/include/netdev.h index 63cf730..aed5c4c 100644 --- a/include/netdev.h +++ b/include/netdev.h @@ -44,6 +44,7 @@ int cpu_eth_init(bd_t *bis); int au1x00_enet_initialize(bd_t*); int bfin_EMAC_initialize(bd_t *bis); int dc21x4x_initialize(bd_t *bis); +int davinci_emac_initialize(void); int dnet_eth_initialize(int id, void *regs, unsigned int phy_addr); int e1000_initialize(bd_t *bis); int eepro100_initialize(bd_t *bis); @@ -52,6 +53,7 @@ int fec_initialize (bd_t *bis); int greth_initialize(bd_t *bis); void gt6426x_eth_initialize(bd_t *bis); int inca_switch_initialize(bd_t *bis); +int kirkwood_egiga_initialize(bd_t *bis); int macb_eth_initialize(int id, void *regs, unsigned int phy_addr); int mcdmafec_initialize(bd_t *bis); int mcffec_initialize(bd_t *bis); @@ -73,6 +75,7 @@ int tsi108_eth_initialize(bd_t *bis); int uec_initialize(int index); int uli526x_initialize(bd_t *bis); int sh_eth_initialize(bd_t *bis); +int dm9000_initialize(bd_t *bis); /* Boards with PCI network controllers can call this from their board_eth_init() * function to initialize whatever's on board. @@ -116,4 +119,51 @@ static inline int pci_eth_init(bd_t *bis) return num; } +/* + * Boards with mv88e61xx switch can use this by defining + * CONFIG_MV88E61XX_SWITCH in respective board configheader file + * the stuct and enums here are used to specify switch configuration params + */ +#if defined(CONFIG_MV88E61XX_SWITCH) +enum mv88e61xx_cfg_vlan { + MV88E61XX_VLANCFG_DEFAULT, + MV88E61XX_VLANCFG_ROUTER +}; + +enum mv88e61xx_cfg_mdip { + MV88E61XX_MDIP_NOCHANGE, + MV88E61XX_MDIP_REVERSE +}; + +enum mv88e61xx_cfg_ledinit { + MV88E61XX_LED_INIT_DIS, + MV88E61XX_LED_INIT_EN +}; + +enum mv88e61xx_cfg_rgmiid { + MV88E61XX_RGMII_DELAY_DIS, + MV88E61XX_RGMII_DELAY_EN +}; + +enum mv88e61xx_cfg_prtstt { + MV88E61XX_PORTSTT_DISABLED, + MV88E61XX_PORTSTT_BLOCKING, + MV88E61XX_PORTSTT_LEARNING, + MV88E61XX_PORTSTT_FORWARDING +}; + +struct mv88e61xx_config { + char *name; + enum mv88e61xx_cfg_vlan vlancfg; + enum mv88e61xx_cfg_rgmiid rgmii_delay; + enum mv88e61xx_cfg_prtstt portstate; + enum mv88e61xx_cfg_ledinit led_init; + enum mv88e61xx_cfg_mdip mdip; + u32 ports_enabled; + u8 cpuport; +}; + +int mv88e61xx_switch_initialize(struct mv88e61xx_config *swconfig); +#endif /* CONFIG_MV88E61XX_SWITCH */ + #endif /* _NETDEV_H_ */ diff --git a/include/tsec.h b/include/tsec.h index 9184256..0ac3034 100644 --- a/include/tsec.h +++ b/include/tsec.h @@ -152,6 +152,8 @@ #define MIIM_EXT_PAGE_ACCESS 0x1f /* Broadcom BCM54xx -- taken from linux sungem_phy */ +#define MIIM_BCM54xx_AUXCNTL 0x18 +#define MIIM_BCM54xx_AUXCNTL_ENCODE(val) ((val & 0x7) << 12)|(val & 0x7) #define MIIM_BCM54xx_AUXSTATUS 0x19 #define MIIM_BCM54xx_AUXSTATUS_LINKMODE_MASK 0x0700 #define MIIM_BCM54xx_AUXSTATUS_LINKMODE_SHIFT 8 |