diff options
author | Terry Lv <r65388@freescale.com> | 2010-05-12 22:49:24 +0800 |
---|---|---|
committer | Terry Lv <r65388@freescale.com> | 2010-06-24 16:54:31 +0800 |
commit | 90bfe6af18c84a7e3ba424cba0c2602d883bd286 (patch) | |
tree | 815e35b0cefc847806cef9a8df09bdad1c3955ad /include | |
parent | 6fa1a0ea0c589b327e8106d13ffff115d2553284 (diff) | |
download | u-boot-imx-90bfe6af18c84a7e3ba424cba0c2602d883bd286.zip u-boot-imx-90bfe6af18c84a7e3ba424cba0c2602d883bd286.tar.gz u-boot-imx-90bfe6af18c84a7e3ba424cba0c2602d883bd286.tar.bz2 |
ENGR00122651: Add dwc_ahsata support
Add dwc_ahsata support.
Signed-off-by: Terry Lv <r65388@freescale.com>
Diffstat (limited to 'include')
-rw-r--r-- | include/ahci.h | 14 | ||||
-rw-r--r-- | include/asm-arm/arch-mx35/mmu.h | 8 | ||||
-rw-r--r-- | include/asm-arm/arch-mx51/mmu.h | 18 | ||||
-rw-r--r-- | include/asm-arm/arch-mx53/mmu.h | 10 | ||||
-rw-r--r-- | include/asm-arm/arch-mx53/mx53.h | 8 | ||||
-rw-r--r-- | include/configs/mx53_arm2.h | 18 | ||||
-rw-r--r-- | include/configs/mx53_evk.h | 14 |
7 files changed, 66 insertions, 24 deletions
diff --git a/include/ahci.h b/include/ahci.h index 0c6bbbd..12f653a 100644 --- a/include/ahci.h +++ b/include/ahci.h @@ -1,4 +1,7 @@ /* + * (C) Copyright 2008-2010 Freescale Semiconductor, Inc. + * Terry Lv <r65388@freescale.com> + * * Copyright (C) Freescale Semiconductor, Inc. 2006. * Author: Jason Jin<Jason.jin@freescale.com> * Zhang Wei<wei.zhang@freescale.com> @@ -25,15 +28,18 @@ #ifndef _AHCI_H_ #define _AHCI_H_ +#include <pci.h> + #define AHCI_PCI_BAR 0x24 #define AHCI_MAX_SG 56 /* hardware max is 64K */ +#define AHCI_MAX_CMD_SLOT 32 #define AHCI_CMD_SLOT_SZ 32 #define AHCI_RX_FIS_SZ 256 #define AHCI_CMD_TBL_HDR 0x80 #define AHCI_CMD_TBL_CDB 0x40 -#define AHCI_CMD_TBL_SZ AHCI_CMD_TBL_HDR + (AHCI_MAX_SG * 16) -#define AHCI_PORT_PRIV_DMA_SZ AHCI_CMD_SLOT_SZ + AHCI_CMD_TBL_SZ \ - + AHCI_RX_FIS_SZ +#define AHCI_CMD_TBL_SZ (AHCI_CMD_TBL_HDR + (AHCI_MAX_SG * 16)) +#define AHCI_PORT_PRIV_DMA_SZ (AHCI_CMD_SLOT_SZ * AHCI_MAX_CMD_SLOT + \ + AHCI_CMD_TBL_SZ + AHCI_RX_FIS_SZ) #define AHCI_CMD_ATAPI (1 << 5) #define AHCI_CMD_WRITE (1 << 6) #define AHCI_CMD_PREFETCH (1 << 7) @@ -179,7 +185,7 @@ struct ahci_probe_ent { u32 host_flags; u32 host_set_flags; u32 mmio_base; - u32 pio_mask; + u32 pio_mask; u32 udma_mask; u32 flags; u32 cap; /* cache of HOST_CAP register */ diff --git a/include/asm-arm/arch-mx35/mmu.h b/include/asm-arm/arch-mx35/mmu.h index 1e9a96f..1b15dba 100644 --- a/include/asm-arm/arch-mx35/mmu.h +++ b/include/asm-arm/arch-mx35/mmu.h @@ -136,15 +136,15 @@ union ARM_MMU_FIRST_LEVEL_DESCRIPTOR { * Translate the virtual address of ram space to physical address * It is dependent on the implementation of mmu_init */ -inline void *iomem_to_phys(unsigned long virt) +inline unsigned long iomem_to_phys(unsigned long virt) { if (virt < 0x08000000) - return (void *)(virt | PHYS_SDRAM_1); + return (unsigned long)(virt | PHYS_SDRAM_1); if ((virt & 0xF0000000) == PHYS_SDRAM_1) - return (void *)(virt & (~0x08000000)); + return (unsigned long)(virt & (~0x08000000)); - return (void *)virt; + return (unsigned long)virt; } /* diff --git a/include/asm-arm/arch-mx51/mmu.h b/include/asm-arm/arch-mx51/mmu.h index e80cfc9..1c58977 100644 --- a/include/asm-arm/arch-mx51/mmu.h +++ b/include/asm-arm/arch-mx51/mmu.h @@ -140,15 +140,15 @@ union ARM_MMU_FIRST_LEVEL_DESCRIPTOR { * Translate the virtual address of ram space to physical address * It is dependent on the implementation of mmu_init */ -inline void *iomem_to_phys(unsigned long virt) +inline unsigned long iomem_to_phys(unsigned long virt) { if (virt < 0x08000000) - return (void *)(virt | PHYS_SDRAM_1); + return (unsigned long)(virt | PHYS_SDRAM_1); if ((virt & 0xF0000000) == PHYS_SDRAM_1) - return (void *)(virt & (~0x08000000)); + return (unsigned long)(virt & (~0x08000000)); - return (void *)virt; + return (unsigned long)virt; } /* @@ -174,15 +174,15 @@ void *__ioremap(unsigned long offset, size_t size, unsigned long flags) * Translate the virtual address of ram space to physical address * It is dependent on the implementation of mmu_init */ -inline void *iomem_to_phys(unsigned long virt) +inline unsigned long iomem_to_phys(unsigned long virt) { if (virt < (PHYS_SDRAM_1_SIZE - 0x100000)) - return (void *)(virt + PHYS_SDRAM_1); + return (unsigned long)(virt + PHYS_SDRAM_1); if (virt >= 0xE0000000) - return (void *)((virt - 0xE0000000) + PHYS_SDRAM_1); + return (unsigned long)((virt - 0xE0000000) + PHYS_SDRAM_1); - return (void *)virt; + return (unsigned long)virt; } /* @@ -201,7 +201,7 @@ void *__ioremap(unsigned long offset, size_t size, unsigned long flags) meory space which is mapped to SDRAM */ if (offset >= PHYS_SDRAM_1 && offset < (PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE)) - return (void *)(offset - PHYS_SDRAM_1) + 0xE0000000; + return (void *)((offset - PHYS_SDRAM_1) + 0xE0000000); else return NULL; } else diff --git a/include/asm-arm/arch-mx53/mmu.h b/include/asm-arm/arch-mx53/mmu.h index 5fa2fc0..5063528 100644 --- a/include/asm-arm/arch-mx53/mmu.h +++ b/include/asm-arm/arch-mx53/mmu.h @@ -138,12 +138,12 @@ union ARM_MMU_FIRST_LEVEL_DESCRIPTOR { * Translate the virtual address of ram space to physical address * It is dependent on the implementation of mmu_init */ -inline void *iomem_to_phys(unsigned long virt) +inline unsigned long iomem_to_phys(unsigned long virt) { if (virt >= 0xB0000000) - return (void *)((virt - 0xB0000000) + PHYS_SDRAM_1); + return (unsigned long)((virt - 0xB0000000) + PHYS_SDRAM_1); - return (void *)virt; + return (unsigned long)virt; } /* @@ -154,8 +154,8 @@ void *__ioremap(unsigned long offset, size_t size, unsigned long flags) { if (1 == flags) { if (offset >= PHYS_SDRAM_1 && - offset < (PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE)) - return (void *)(offset - PHYS_SDRAM_1) + 0xB0000000; + offset < (unsigned long)(PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE)) + return (void *)((offset - PHYS_SDRAM_1) + 0xB0000000); else return NULL; } else diff --git a/include/asm-arm/arch-mx53/mx53.h b/include/asm-arm/arch-mx53/mx53.h index 6586b9c..ea04877 100644 --- a/include/asm-arm/arch-mx53/mx53.h +++ b/include/asm-arm/arch-mx53/mx53.h @@ -23,7 +23,12 @@ #define __REG16(x) (*((volatile u16 *)(x))) #define __REG8(x) (*((volatile u8 *)(x))) - /* +/* + * SATA + */ +#define SATA_BASE_ADDR 0x10000000 + +/* * IRAM */ #define IRAM_BASE_ADDR 0xF8000000 /* internal ram */ @@ -407,6 +412,7 @@ enum mxc_clock { MXC_ESDHC2_CLK, MXC_ESDHC3_CLK, MXC_ESDHC4_CLK, + MXC_SATA_CLK }; enum mxc_peri_clocks { diff --git a/include/configs/mx53_arm2.h b/include/configs/mx53_arm2.h index 7265062..c28f6d3 100644 --- a/include/configs/mx53_arm2.h +++ b/include/configs/mx53_arm2.h @@ -100,6 +100,8 @@ #define CONFIG_CMD_CLOCK #define CONFIG_REF_CLK_FREQ CONFIG_MX53_HCLK_FREQ +#define CONFIG_CMD_SATA + #undef CONFIG_CMD_IMLS #define CONFIG_BOOTDELAY 3 @@ -198,6 +200,19 @@ #define CONFIG_CMD_FAT 1 #define CONFIG_CMD_EXT2 1 #endif + +/* + * SATA Configs + */ +#ifdef CONFIG_CMD_SATA + #define CONFIG_DWC_AHSATA + #define CONFIG_SYS_SATA_MAX_DEVICE 1 + #define CONFIG_DWC_AHSATA_PORT_ID 0 + #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_BASE_ADDR + #define CONFIG_LBA48 + #define CONFIG_LIBATA +#endif + /*----------------------------------------------------------------------- * Stack sizes * @@ -212,7 +227,8 @@ #define PHYS_SDRAM_1 CSD0_BASE_ADDR #define PHYS_SDRAM_1_SIZE (1024 * 1024 * 1024) #define iomem_valid_addr(addr, size) \ - (addr >= PHYS_SDRAM_1 && addr <= (PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE)) + (addr >= PHYS_SDRAM_1 && addr <= \ + (unsigned long)(PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE)) /*----------------------------------------------------------------------- * FLASH and environment organization diff --git a/include/configs/mx53_evk.h b/include/configs/mx53_evk.h index 760d4ac..4fa66f2 100644 --- a/include/configs/mx53_evk.h +++ b/include/configs/mx53_evk.h @@ -100,6 +100,7 @@ #define CONFIG_CMD_CLOCK #define CONFIG_REF_CLK_FREQ CONFIG_MX53_HCLK_FREQ +#define CONFIG_CMD_SATA #undef CONFIG_CMD_IMLS #define CONFIG_BOOTDELAY 3 @@ -198,6 +199,19 @@ #define CONFIG_CMD_FAT 1 #define CONFIG_CMD_EXT2 1 #endif + +/* + * SATA Configs + */ +#ifdef CONFIG_CMD_SATA + #define CONFIG_DWC_AHSATA + #define CONFIG_SYS_SATA_MAX_DEVICE 1 + #define CONFIG_DWC_AHSATA_PORT_ID 0 + #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_BASE_ADDR + #define CONFIG_LBA48 + #define CONFIG_LIBATA +#endif + /*----------------------------------------------------------------------- * Stack sizes * |