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author | Kumar Gala <galak@kernel.crashing.org> | 2008-10-23 01:47:38 -0500 |
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committer | Andrew Fleming-AFLEMING <afleming@freescale.com> | 2008-10-24 15:10:47 -0500 |
commit | 0f060c3bf82832331a509f2e5d2442539e7aad09 (patch) | |
tree | 08d890ed38595a17dc4b126847a7dce31c69cd5d /include | |
parent | a38a5b6edd30f29fd5fdb1d7f674521906c0e677 (diff) | |
download | u-boot-imx-0f060c3bf82832331a509f2e5d2442539e7aad09.zip u-boot-imx-0f060c3bf82832331a509f2e5d2442539e7aad09.tar.gz u-boot-imx-0f060c3bf82832331a509f2e5d2442539e7aad09.tar.bz2 |
85xx: Add basic e500mc core support
Introduce CONFIG_E500MC to deal with the minor differences between
e500v2 and e500mc.
* Certain fields of HID0/1 don't exist anymore on e500mc
* Cache line size is 64-bytes on e500mc
* reset value of PIR is different
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'include')
-rw-r--r-- | include/asm-ppc/cache.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/include/asm-ppc/cache.h b/include/asm-ppc/cache.h index 7252be7..53e8d05 100644 --- a/include/asm-ppc/cache.h +++ b/include/asm-ppc/cache.h @@ -12,6 +12,8 @@ #define L1_CACHE_SHIFT 4 #elif defined(CONFIG_PPC64BRIDGE) #define L1_CACHE_SHIFT 7 +#elif defined(CONFIG_E500MC) +#define L1_CACHE_SHIFT 6 #else #define L1_CACHE_SHIFT 5 #endif |